/* Based on CPU DB MC68HC908JW32_48, version 2.87.039 (RegistersPrg V2.30) */
/*
** ###################################################################
**     Filename  : mc68hc908jw32.h
**     Processor : MC68HC908JW32FC
**     FileFormat: V2.30
**     DataSheet : MC68HC908JW32 Rev. 3 3/2005
**     Compiler  : CodeWarrior compiler
**     Date/Time : 11.9.2009, 14:08
**     Abstract  :
**         This header implements the mapping of I/O devices.
**
**     Copyright : 1997 - 2009 Freescale Semiconductor, Inc. All Rights Reserved.
**     
**     http      : www.freescale.com
**     mail      : support@freescale.com
**
**     CPU Registers Revisions:
**      - 15.02.2006, V2.87.026:
**              - Removed DCM modules (removed DC* registers and Alternate Data Control Register ADATCR, used for DCM pin routing),
**              - Renamed register SBFCRSTR ==> BFCRSTR, Renamed bit USIMR_USBRSTIE ==> USIMR_USBRESETIE,Removed bit CONFIG2_CLKS,
**              - Renamed bits in UE0D0..UE0D7 registers (UE0Rxx_UE0Txx ==> UE0Dxx_OUT_UE0Dxx_IN).
**              - REASON: Changes in data sheet (from rev 2 to 3)
**
**     File-Format-Revisions:
**      - 14.11.2005, V2.00 :
**               - Deprecated symbols added for backward compatibility (section at the end of this file)
**      - 15.11.2005, V2.01 :
**               - Changes have not affected this file (because they are related to another family)
**      - 17.12.2005, V2.02 :
**               - Arrays (symbols xx_ARR) are defined as pointer to volatile, see issue #2778
**      - 16.01.2006, V2.03 :
**               - Fixed declaration of non volatile registers. Now it does not require (but allows) their initialization, see issue #2920.
**               - "volatile" modifier removed from declaration of non volatile registers (that contain modifier "const")
**      - 08.03.2006, V2.04 :
**               - Support for bit(s) names duplicated with any register name in .h header files
**      - 24.03.2006, V2.05 :
**               - Changes have not affected this file (because they are related to another family)
**      - 26.04.2006, V2.06 :
**               - Absolute assembly supported (depreciated symbols are not defined)
**      - 27.04.2006, V2.07 :
**               - Fixed macro __RESET_WATCHDOG for HCS12, HCS12X ,HCS08 DZ and HCS08 EN derivatives (write 0x55,0xAA).
**      - 07.06.2006, V2.08 :
**               - For .inc files added constants "RAMStart" and "RAMEnd" even there is only Z_RAM.
**      - 03.07.2006, V2.09 :
**               - Flash commands constants supported
**      - 27.10.2006, V2.10 :
**               - __RESET_WATCHDOG improved formating and re-definition
**      - 23.11.2006, V2.11 :
**               - Changes have not affected this file (because they are related to another family)
**      - 22.01.2007, V2.12 :
**               - Changes have not affected this file (because they are related to another family)
**      - 01.03.2007, V2.13 :
**               - Flash commands constants values converted to HEX format
**      - 02.03.2007, V2.14 :
**               - Interrupt vector numbers added into .H, see VectorNumber_*
**      - 26.03.2007, V2.15 :
**               - Changes have not affected this file (because they are related to another family)
**      - 10.05.2007, V2.16 :
**               - Fixed flash commands definition for ColdFireV1 assembler (equ -> .equ)
**      - 05.06.2007, V2.17 :
**               - Changes have not affected this file (because they are related to another family)
**      - 19.07.2007, V2.18 :
**               - Improved number of blanked lines inside register structures
**      - 06.08.2007, V2.19 :
**               - CPUDB revisions generated ahead of the file-format revisions.
**      - 11.09.2007, V2.20 :
**               - Added comment about initialization of unbonded pins.
**      - 02.01.2008, V2.21 :
**               - Changes have not affected this file (because they are related to another family)
**      - 13.02.2008, V2.22 :
**               - Changes have not affected this file (because they are related to another family)
**      - 20.02.2008, V2.23 :
**               - Changes have not affected this file (because they are related to another family)
**      - 03.07.2008, V2.24 :
**               - Added support for bits with name starting with number (like "1HZ")
**      - 28.11.2008, V2.25 :
**               - StandBy RAM array declaration for ANSI-C added
**      - 1.12.2008, V2.26 :
**               - Duplication of bit (or bit-group) name with register name is not marked as a problem, is register is internal only and it is not displayed in I/O map.
**      - 17.3.2009, V2.27 :
**               - Merged bit-group is not generated, if the name matches with another bit name in the register
**      - 6.4.2009, V2.28 :
**               - Fixed generation of merged bits for bit-groups with a digit at the end, if group-name is defined in CPUDB
**      - 3.8.2009, V2.29 :
**               - If there is just one bits group matching register name, single bits are not generated
**      - 10.9.2009, V2.30 :
**               - Fixed generation of registers arrays.
**
**     Not all general-purpose I/O pins are available on all packages or on all mask sets of a specific
**     derivative device. To avoid extra current drain from floating input pins, the user’s reset
**     initialization routine in the application program must either enable on-chip pull-up devices
**     or change the direction of unconnected pins to outputs so the pins do not float.
** ###################################################################
*/

#ifndef _MC68HC908JW32_H
#define _MC68HC908JW32_H

/* Types definition */
typedef unsigned char byte;
typedef unsigned int word;
typedef unsigned long dword;
typedef unsigned long dlong[2];

/* Watchdog reset macro */
#ifndef __RESET_WATCHDOG
#ifdef _lint
  #define __RESET_WATCHDOG()  /* empty */
#else
  #define __RESET_WATCHDOG() {asm sta COPCTL;}
#endif
#endif /* __RESET_WATCHDOG */

#define REG_BASE 0x0000                /* Base address for the I/O register block */


#pragma MESSAGE DISABLE C1106 /* WARNING C1106: Non-standard bitfield type */

/**************** interrupt vector numbers ****************/
#define VectorNumber_TBM                16
#define VectorNumber_KBI                15
#define VectorNumber_SPITransmit        14
#define VectorNumber_SPIReceive         13
#define VectorNumber_Reserved4          12
#define VectorNumber_Reserved5          11
#define VectorNumber_Reserved6          10
#define VectorNumber_PS2                9
#define VectorNumber_TIM1Ovr            8
#define VectorNumber_TIM1CH1            7
#define VectorNumber_TIM1CH0            6
#define VectorNumber_PLL                5
#define VectorNumber_IRQ                4
#define VectorNumber_USBEndpoint        3
#define VectorNumber_USBSystem          2
#define VectorNumber_SWI                1
#define VectorNumber_RESET              0

/**************** interrupt vector table ****************/
#define INT_TBM                         0x0000FFDE
#define INT_KBI                         0x0000FFE0
#define INT_SPITransmit                 0x0000FFE2
#define INT_SPIReceive                  0x0000FFE4
#define Reserved4                       0x0000FFE6
#define Reserved5                       0x0000FFE8
#define Reserved6                       0x0000FFEA
#define INT_PS2                         0x0000FFEC
#define INT_TIM1Ovr                     0x0000FFEE
#define INT_TIM1CH1                     0x0000FFF0
#define INT_TIM1CH0                     0x0000FFF2
#define INT_PLL                         0x0000FFF4
#define INT_IRQ                         0x0000FFF6
#define INT_USBEndpoint                 0x0000FFF8
#define INT_USBSystem                   0x0000FFFA
#define INT_SWI                         0x0000FFFC
#define INT_RESET                       0x0000FFFE

/**************** registers I/O map ****************/

/*** PTA - Port A Data Register; 0x00000000 ***/
typedef union {
  byte Byte;
  struct {
    byte PTA0        :1;                                       /* Port A Data Bit 0 */
    byte PTA1        :1;                                       /* Port A Data Bit 1 */
    byte PTA2        :1;                                       /* Port A Data Bit 2 */
    byte PTA3        :1;                                       /* Port A Data Bit 3 */
    byte PTA4        :1;                                       /* Port A Data Bit 4 */
    byte PTA5        :1;                                       /* Port A Data Bit 5 */
    byte PTA6        :1;                                       /* Port A Data Bit 6 */
    byte PTA7        :1;                                       /* Port A Data Bit 7 */
  } Bits;
} PTASTR;
extern volatile PTASTR _PTA;
#define PTA                             _PTA.Byte
#define PTA_PTA0                        _PTA.Bits.PTA0
#define PTA_PTA1                        _PTA.Bits.PTA1
#define PTA_PTA2                        _PTA.Bits.PTA2
#define PTA_PTA3                        _PTA.Bits.PTA3
#define PTA_PTA4                        _PTA.Bits.PTA4
#define PTA_PTA5                        _PTA.Bits.PTA5
#define PTA_PTA6                        _PTA.Bits.PTA6
#define PTA_PTA7                        _PTA.Bits.PTA7

#define PTA_PTA0_MASK                   1
#define PTA_PTA1_MASK                   2
#define PTA_PTA2_MASK                   4
#define PTA_PTA3_MASK                   8
#define PTA_PTA4_MASK                   16
#define PTA_PTA5_MASK                   32
#define PTA_PTA6_MASK                   64
#define PTA_PTA7_MASK                   128


/*** PTB - Port B Data Register; 0x00000001 ***/
typedef union {
  byte Byte;
  struct {
    byte PTB0        :1;                                       /* Port B Data Bit 0 */
    byte PTB1        :1;                                       /* Port B Data Bit 1 */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte PTB5        :1;                                       /* Port B Data Bit 5 */
    byte             :1; 
    byte             :1; 
  } Bits;
  struct {
    byte grpPTB  :2;
    byte         :1;
    byte         :1;
    byte         :1;
    byte grpPTB_5 :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} PTBSTR;
extern volatile PTBSTR _PTB;
#define PTB                             _PTB.Byte
#define PTB_PTB0                        _PTB.Bits.PTB0
#define PTB_PTB1                        _PTB.Bits.PTB1
#define PTB_PTB5                        _PTB.Bits.PTB5
#define PTB_PTB                         _PTB.MergedBits.grpPTB

#define PTB_PTB0_MASK                   1
#define PTB_PTB1_MASK                   2
#define PTB_PTB5_MASK                   32
#define PTB_PTB_MASK                    3
#define PTB_PTB_BITNUM                  0


/*** PTC - Port C Data Register; 0x00000002 ***/
typedef union {
  byte Byte;
  struct {
    byte PTC0        :1;                                       /* Port C Data Bit 0 */
    byte PTC1        :1;                                       /* Port C Data Bit 1 */
    byte PTC2        :1;                                       /* Port C Data Bit 2 */
    byte PTC3        :1;                                       /* Port C Data Bit 3 */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
  struct {
    byte grpPTC  :4;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} PTCSTR;
extern volatile PTCSTR _PTC;
#define PTC                             _PTC.Byte
#define PTC_PTC0                        _PTC.Bits.PTC0
#define PTC_PTC1                        _PTC.Bits.PTC1
#define PTC_PTC2                        _PTC.Bits.PTC2
#define PTC_PTC3                        _PTC.Bits.PTC3
#define PTC_PTC                         _PTC.MergedBits.grpPTC

#define PTC_PTC0_MASK                   1
#define PTC_PTC1_MASK                   2
#define PTC_PTC2_MASK                   4
#define PTC_PTC3_MASK                   8
#define PTC_PTC_MASK                    15
#define PTC_PTC_BITNUM                  0


/*** PTD - Port D Data Register; 0x00000003 ***/
typedef union {
  byte Byte;
  struct {
    byte PTD0        :1;                                       /* Port D Data Bit 0 */
    byte PTD1        :1;                                       /* Port D Data Bit 1 */
    byte PTD2        :1;                                       /* Port D Data Bit 2 */
    byte PTD3        :1;                                       /* Port D Data Bit 3 */
    byte PTD4        :1;                                       /* Port D Data Bit 4 */
    byte PTD5        :1;                                       /* Port D Data Bit 5 */
    byte PTD6        :1;                                       /* Port D Data Bit 6 */
    byte PTD7        :1;                                       /* Port D Data Bit 7 */
  } Bits;
} PTDSTR;
extern volatile PTDSTR _PTD;
#define PTD                             _PTD.Byte
#define PTD_PTD0                        _PTD.Bits.PTD0
#define PTD_PTD1                        _PTD.Bits.PTD1
#define PTD_PTD2                        _PTD.Bits.PTD2
#define PTD_PTD3                        _PTD.Bits.PTD3
#define PTD_PTD4                        _PTD.Bits.PTD4
#define PTD_PTD5                        _PTD.Bits.PTD5
#define PTD_PTD6                        _PTD.Bits.PTD6
#define PTD_PTD7                        _PTD.Bits.PTD7

#define PTD_PTD0_MASK                   1
#define PTD_PTD1_MASK                   2
#define PTD_PTD2_MASK                   4
#define PTD_PTD3_MASK                   8
#define PTD_PTD4_MASK                   16
#define PTD_PTD5_MASK                   32
#define PTD_PTD6_MASK                   64
#define PTD_PTD7_MASK                   128


/*** DDRA - Data Direction Register A; 0x00000004 ***/
typedef union {
  byte Byte;
  struct {
    byte DDRA0       :1;                                       /* Data Direction Register A Bit 0 */
    byte DDRA1       :1;                                       /* Data Direction Register A Bit 1 */
    byte DDRA2       :1;                                       /* Data Direction Register A Bit 2 */
    byte DDRA3       :1;                                       /* Data Direction Register A Bit 3 */
    byte DDRA4       :1;                                       /* Data Direction Register A Bit 4 */
    byte DDRA5       :1;                                       /* Data Direction Register A Bit 5 */
    byte DDRA6       :1;                                       /* Data Direction Register A Bit 6 */
    byte DDRA7       :1;                                       /* Data Direction Register A Bit 7 */
  } Bits;
} DDRASTR;
extern volatile DDRASTR _DDRA;
#define DDRA                            _DDRA.Byte
#define DDRA_DDRA0                      _DDRA.Bits.DDRA0
#define DDRA_DDRA1                      _DDRA.Bits.DDRA1
#define DDRA_DDRA2                      _DDRA.Bits.DDRA2
#define DDRA_DDRA3                      _DDRA.Bits.DDRA3
#define DDRA_DDRA4                      _DDRA.Bits.DDRA4
#define DDRA_DDRA5                      _DDRA.Bits.DDRA5
#define DDRA_DDRA6                      _DDRA.Bits.DDRA6
#define DDRA_DDRA7                      _DDRA.Bits.DDRA7

#define DDRA_DDRA0_MASK                 1
#define DDRA_DDRA1_MASK                 2
#define DDRA_DDRA2_MASK                 4
#define DDRA_DDRA3_MASK                 8
#define DDRA_DDRA4_MASK                 16
#define DDRA_DDRA5_MASK                 32
#define DDRA_DDRA6_MASK                 64
#define DDRA_DDRA7_MASK                 128


/*** DDRB - Data Direction Register B; 0x00000005 ***/
typedef union {
  byte Byte;
  struct {
    byte DDRB0       :1;                                       /* Data Direction Register B Bit 0 */
    byte DDRB1       :1;                                       /* Data Direction Register B Bit 1 */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte DDRB5       :1;                                       /* Data Direction Register B Bit 5 */
    byte             :1; 
    byte             :1; 
  } Bits;
  struct {
    byte grpDDRB :2;
    byte         :1;
    byte         :1;
    byte         :1;
    byte grpDDRB_5 :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} DDRBSTR;
extern volatile DDRBSTR _DDRB;
#define DDRB                            _DDRB.Byte
#define DDRB_DDRB0                      _DDRB.Bits.DDRB0
#define DDRB_DDRB1                      _DDRB.Bits.DDRB1
#define DDRB_DDRB5                      _DDRB.Bits.DDRB5
#define DDRB_DDRB                       _DDRB.MergedBits.grpDDRB

#define DDRB_DDRB0_MASK                 1
#define DDRB_DDRB1_MASK                 2
#define DDRB_DDRB5_MASK                 32
#define DDRB_DDRB_MASK                  3
#define DDRB_DDRB_BITNUM                0


/*** DDRC - Data Direction Register C; 0x00000006 ***/
typedef union {
  byte Byte;
  struct {
    byte DDRC0       :1;                                       /* Data Direction Register C Bit 0 */
    byte DDRC1       :1;                                       /* Data Direction Register C Bit 1 */
    byte DDRC2       :1;                                       /* Data Direction Register C Bit 2 */
    byte DDRC3       :1;                                       /* Data Direction Register C Bit 3 */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
  struct {
    byte grpDDRC :4;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} DDRCSTR;
extern volatile DDRCSTR _DDRC;
#define DDRC                            _DDRC.Byte
#define DDRC_DDRC0                      _DDRC.Bits.DDRC0
#define DDRC_DDRC1                      _DDRC.Bits.DDRC1
#define DDRC_DDRC2                      _DDRC.Bits.DDRC2
#define DDRC_DDRC3                      _DDRC.Bits.DDRC3
#define DDRC_DDRC                       _DDRC.MergedBits.grpDDRC

#define DDRC_DDRC0_MASK                 1
#define DDRC_DDRC1_MASK                 2
#define DDRC_DDRC2_MASK                 4
#define DDRC_DDRC3_MASK                 8
#define DDRC_DDRC_MASK                  15
#define DDRC_DDRC_BITNUM                0


/*** DDRD - Data Direction Register D; 0x00000007 ***/
typedef union {
  byte Byte;
  struct {
    byte DDRD0       :1;                                       /* Data Direction Register D Bit 0 */
    byte DDRD1       :1;                                       /* Data Direction Register D Bit 1 */
    byte DDRD2       :1;                                       /* Data Direction Register D Bit 2 */
    byte DDRD3       :1;                                       /* Data Direction Register D Bit 3 */
    byte DDRD4       :1;                                       /* Data Direction Register D Bit 4 */
    byte DDRD5       :1;                                       /* Data Direction Register D Bit 5 */
    byte DDRD6       :1;                                       /* Data Direction Register D Bit 6 */
    byte DDRD7       :1;                                       /* Data Direction Register D Bit 7 */
  } Bits;
} DDRDSTR;
extern volatile DDRDSTR _DDRD;
#define DDRD                            _DDRD.Byte
#define DDRD_DDRD0                      _DDRD.Bits.DDRD0
#define DDRD_DDRD1                      _DDRD.Bits.DDRD1
#define DDRD_DDRD2                      _DDRD.Bits.DDRD2
#define DDRD_DDRD3                      _DDRD.Bits.DDRD3
#define DDRD_DDRD4                      _DDRD.Bits.DDRD4
#define DDRD_DDRD5                      _DDRD.Bits.DDRD5
#define DDRD_DDRD6                      _DDRD.Bits.DDRD6
#define DDRD_DDRD7                      _DDRD.Bits.DDRD7

#define DDRD_DDRD0_MASK                 1
#define DDRD_DDRD1_MASK                 2
#define DDRD_DDRD2_MASK                 4
#define DDRD_DDRD3_MASK                 8
#define DDRD_DDRD4_MASK                 16
#define DDRD_DDRD5_MASK                 32
#define DDRD_DDRD6_MASK                 64
#define DDRD_DDRD7_MASK                 128


/*** PTE - Port E Data Register; 0x00000008 ***/
typedef union {
  byte Byte;
  struct {
    byte             :1; 
    byte             :1; 
    byte PTE2        :1;                                       /* Port E Data Bit 2 */
    byte PTE3        :1;                                       /* Port E Data Bit 3 */
    byte PTE4        :1;                                       /* Port E Data Bit 4 */
    byte PTE5        :1;                                       /* Port E Data Bit 5 */
    byte PTE6        :1;                                       /* Port E Data Bit 6 */
    byte PTE7        :1;                                       /* Port E Data Bit 7 */
  } Bits;
  struct {
    byte         :1;
    byte         :1;
    byte grpPTE_2 :6;
  } MergedBits;
} PTESTR;
extern volatile PTESTR _PTE;
#define PTE                             _PTE.Byte
#define PTE_PTE2                        _PTE.Bits.PTE2
#define PTE_PTE3                        _PTE.Bits.PTE3
#define PTE_PTE4                        _PTE.Bits.PTE4
#define PTE_PTE5                        _PTE.Bits.PTE5
#define PTE_PTE6                        _PTE.Bits.PTE6
#define PTE_PTE7                        _PTE.Bits.PTE7
#define PTE_PTE_2                       _PTE.MergedBits.grpPTE_2

#define PTE_PTE2_MASK                   4
#define PTE_PTE3_MASK                   8
#define PTE_PTE4_MASK                   16
#define PTE_PTE5_MASK                   32
#define PTE_PTE6_MASK                   64
#define PTE_PTE7_MASK                   128
#define PTE_PTE_2_MASK                  252
#define PTE_PTE_2_BITNUM                2


/*** DDRE - Data Direction Register E; 0x00000009 ***/
typedef union {
  byte Byte;
  struct {
    byte             :1; 
    byte             :1; 
    byte DDRE2       :1;                                       /* Data Direction Register E Bit 2 */
    byte DDRE3       :1;                                       /* Data Direction Register E Bit 3 */
    byte DDRE4       :1;                                       /* Data Direction Register E Bit 4 */
    byte DDRE5       :1;                                       /* Data Direction Register E Bit 5 */
    byte DDRE6       :1;                                       /* Data Direction Register E Bit 6 */
    byte DDRE7       :1;                                       /* Data Direction Register E Bit 7 */
  } Bits;
  struct {
    byte         :1;
    byte         :1;
    byte grpDDRE_2 :6;
  } MergedBits;
} DDRESTR;
extern volatile DDRESTR _DDRE;
#define DDRE                            _DDRE.Byte
#define DDRE_DDRE2                      _DDRE.Bits.DDRE2
#define DDRE_DDRE3                      _DDRE.Bits.DDRE3
#define DDRE_DDRE4                      _DDRE.Bits.DDRE4
#define DDRE_DDRE5                      _DDRE.Bits.DDRE5
#define DDRE_DDRE6                      _DDRE.Bits.DDRE6
#define DDRE_DDRE7                      _DDRE.Bits.DDRE7
#define DDRE_DDRE_2                     _DDRE.MergedBits.grpDDRE_2

#define DDRE_DDRE2_MASK                 4
#define DDRE_DDRE3_MASK                 8
#define DDRE_DDRE4_MASK                 16
#define DDRE_DDRE5_MASK                 32
#define DDRE_DDRE6_MASK                 64
#define DDRE_DDRE7_MASK                 128
#define DDRE_DDRE_2_MASK                252
#define DDRE_DDRE_2_BITNUM              2


/*** T1SC - TIM1 Status and Control Register TSC; 0x0000000A ***/
typedef union {
  byte Byte;
  struct {
    byte PS0         :1;                                       /* Prescaler Select Bit */
    byte PS1         :1;                                       /* Prescaler Select Bit 1 */
    byte PS2         :1;                                       /* Prescaler Select Bit 2 */
    byte             :1; 
    byte TRST        :1;                                       /* TIM1 Reset Bit */
    byte TSTOP       :1;                                       /* TIM1 Stop Bit */
    byte TOIE        :1;                                       /* TIM1 Overflow Interrupt Enable Bit */
    byte TOF         :1;                                       /* TIM1 Overflow Flag Bit */
  } Bits;
  struct {
    byte grpPS   :3;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} T1SCSTR;
extern volatile T1SCSTR _T1SC;
#define T1SC                            _T1SC.Byte
#define T1SC_PS0                        _T1SC.Bits.PS0
#define T1SC_PS1                        _T1SC.Bits.PS1
#define T1SC_PS2                        _T1SC.Bits.PS2
#define T1SC_TRST                       _T1SC.Bits.TRST
#define T1SC_TSTOP                      _T1SC.Bits.TSTOP
#define T1SC_TOIE                       _T1SC.Bits.TOIE
#define T1SC_TOF                        _T1SC.Bits.TOF
#define T1SC_PS                         _T1SC.MergedBits.grpPS

#define T1SC_PS0_MASK                   1
#define T1SC_PS1_MASK                   2
#define T1SC_PS2_MASK                   4
#define T1SC_TRST_MASK                  16
#define T1SC_TSTOP_MASK                 32
#define T1SC_TOIE_MASK                  64
#define T1SC_TOF_MASK                   128
#define T1SC_PS_MASK                    7
#define T1SC_PS_BITNUM                  0


/*** T1CNT - TIM1 Counter Register; 0x0000000C ***/
typedef union {
  word Word;
   /* Overlapped registers: */
  struct {
    /*** T1CNTH - TIM1 Counter Register High; 0x0000000C ***/
    union {
      byte Byte;
    } T1CNTHSTR;
    #define T1CNTH                      _T1CNT.Overlap_STR.T1CNTHSTR.Byte
    

    /*** T1CNTL - TIM1 Counter Register Low; 0x0000000D ***/
    union {
      byte Byte;
    } T1CNTLSTR;
    #define T1CNTL                      _T1CNT.Overlap_STR.T1CNTLSTR.Byte
    
  } Overlap_STR;

} T1CNTSTR;
extern volatile T1CNTSTR _T1CNT;
#define T1CNT                           _T1CNT.Word


/*** T1MOD - TIM1 Counter Modulo Register; 0x0000000E ***/
typedef union {
  word Word;
   /* Overlapped registers: */
  struct {
    /*** T1MODH - TIM1 Counter Modulo Register High; 0x0000000E ***/
    union {
      byte Byte;
    } T1MODHSTR;
    #define T1MODH                      _T1MOD.Overlap_STR.T1MODHSTR.Byte
    

    /*** T1MODL - TIM1 Counter Modulo Register Low; 0x0000000F ***/
    union {
      byte Byte;
    } T1MODLSTR;
    #define T1MODL                      _T1MOD.Overlap_STR.T1MODLSTR.Byte
    
  } Overlap_STR;

} T1MODSTR;
extern volatile T1MODSTR _T1MOD;
#define T1MOD                           _T1MOD.Word


/*** T1SC0 - TIM1 Channel 0 Status and Control Register; 0x00000010 ***/
typedef union {
  byte Byte;
  struct {
    byte CH0MAX      :1;                                       /* Channel 0 Maximum Duty Cycle Bit */
    byte TOV0        :1;                                       /* Toggle-On-Overflow Bit */
    byte ELS0A       :1;                                       /* Edge/Level Select Bit A */
    byte ELS0B       :1;                                       /* Edge/Level Select Bit B */
    byte MS0A        :1;                                       /* Mode Select Bit A */
    byte MS0B        :1;                                       /* Mode Select Bit B */
    byte CH0IE       :1;                                       /* Channel 0 Interrupt Enable Bit */
    byte CH0F        :1;                                       /* Channel 0 Flag Bit */
  } Bits;
  struct {
    byte         :1;
    byte grpTOV  :1;
    byte grpELS0x :2;
    byte grpMS0x :2;
    byte         :1;
    byte         :1;
  } MergedBits;
} T1SC0STR;
extern volatile T1SC0STR _T1SC0;
#define T1SC0                           _T1SC0.Byte
#define T1SC0_CH0MAX                    _T1SC0.Bits.CH0MAX
#define T1SC0_TOV0                      _T1SC0.Bits.TOV0
#define T1SC0_ELS0A                     _T1SC0.Bits.ELS0A
#define T1SC0_ELS0B                     _T1SC0.Bits.ELS0B
#define T1SC0_MS0A                      _T1SC0.Bits.MS0A
#define T1SC0_MS0B                      _T1SC0.Bits.MS0B
#define T1SC0_CH0IE                     _T1SC0.Bits.CH0IE
#define T1SC0_CH0F                      _T1SC0.Bits.CH0F
#define T1SC0_ELS0x                     _T1SC0.MergedBits.grpELS0x
#define T1SC0_MS0x                      _T1SC0.MergedBits.grpMS0x

#define T1SC0_CH0MAX_MASK               1
#define T1SC0_TOV0_MASK                 2
#define T1SC0_ELS0A_MASK                4
#define T1SC0_ELS0B_MASK                8
#define T1SC0_MS0A_MASK                 16
#define T1SC0_MS0B_MASK                 32
#define T1SC0_CH0IE_MASK                64
#define T1SC0_CH0F_MASK                 128
#define T1SC0_ELS0x_MASK                12
#define T1SC0_ELS0x_BITNUM              2
#define T1SC0_MS0x_MASK                 48
#define T1SC0_MS0x_BITNUM               4


/*** T1CH0 - TIM1 Channel 0 Register; 0x00000011 ***/
typedef union {
  word Word;
   /* Overlapped registers: */
  struct {
    /*** T1CH0H - TIM1 Channel 0 Register High; 0x00000011 ***/
    union {
      byte Byte;
    } T1CH0HSTR;
    #define T1CH0H                      _T1CH0.Overlap_STR.T1CH0HSTR.Byte
    

    /*** T1CH0L - TIM1 Channel 0 Register Low; 0x00000012 ***/
    union {
      byte Byte;
    } T1CH0LSTR;
    #define T1CH0L                      _T1CH0.Overlap_STR.T1CH0LSTR.Byte
    
  } Overlap_STR;

} T1CH0STR;
extern volatile T1CH0STR _T1CH0;
#define T1CH0                           _T1CH0.Word


/*** T1SC1 - TIM1 Channel 1 Status and Control Register; 0x00000013 ***/
typedef union {
  byte Byte;
  struct {
    byte CH1MAX      :1;                                       /* Channel 1 Maximum Duty Cycle Bit */
    byte TOV1        :1;                                       /* Toggle-On-Overflow Bit */
    byte ELS1A       :1;                                       /* Edge/Level Select Bit A */
    byte ELS1B       :1;                                       /* Edge/Level Select Bit B */
    byte MS1A        :1;                                       /* Mode Select Bit A */
    byte             :1; 
    byte CH1IE       :1;                                       /* Channel 1 Interrupt Enable Bit */
    byte CH1F        :1;                                       /* Channel 1 Flag Bit */
  } Bits;
  struct {
    byte         :1;
    byte grpTOV_1 :1;
    byte grpELS1x :2;
    byte grpMS1x :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} T1SC1STR;
extern volatile T1SC1STR _T1SC1;
#define T1SC1                           _T1SC1.Byte
#define T1SC1_CH1MAX                    _T1SC1.Bits.CH1MAX
#define T1SC1_TOV1                      _T1SC1.Bits.TOV1
#define T1SC1_ELS1A                     _T1SC1.Bits.ELS1A
#define T1SC1_ELS1B                     _T1SC1.Bits.ELS1B
#define T1SC1_MS1A                      _T1SC1.Bits.MS1A
#define T1SC1_CH1IE                     _T1SC1.Bits.CH1IE
#define T1SC1_CH1F                      _T1SC1.Bits.CH1F
#define T1SC1_ELS1x                     _T1SC1.MergedBits.grpELS1x

#define T1SC1_CH1MAX_MASK               1
#define T1SC1_TOV1_MASK                 2
#define T1SC1_ELS1A_MASK                4
#define T1SC1_ELS1B_MASK                8
#define T1SC1_MS1A_MASK                 16
#define T1SC1_CH1IE_MASK                64
#define T1SC1_CH1F_MASK                 128
#define T1SC1_ELS1x_MASK                12
#define T1SC1_ELS1x_BITNUM              2


/*** T1CH1 - TIM1 Channel 1 Register; 0x00000014 ***/
typedef union {
  word Word;
   /* Overlapped registers: */
  struct {
    /*** T1CH1H - TIM1 Channel 1 Register High; 0x00000014 ***/
    union {
      byte Byte;
    } T1CH1HSTR;
    #define T1CH1H                      _T1CH1.Overlap_STR.T1CH1HSTR.Byte
    

    /*** T1CH1L - TIM1 Channel 1 Register Low; 0x00000015 ***/
    union {
      byte Byte;
    } T1CH1LSTR;
    #define T1CH1L                      _T1CH1.Overlap_STR.T1CH1LSTR.Byte
    
  } Overlap_STR;

} T1CH1STR;
extern volatile T1CH1STR _T1CH1;
#define T1CH1                           _T1CH1.Word


/*** KBSCR - Keyboard Status and Control Register; 0x00000016 ***/
typedef union {
  byte Byte;
  struct {
    byte MODEK       :1;                                       /* Keyboard Triggering Sensitivity Bit */
    byte IMASKK      :1;                                       /* Keyboard Interrupt Mask Bit */
    byte ACKK        :1;                                       /* Keyboard Acknowledge Bit */
    byte KEYF        :1;                                       /* Keyboard Flag Bit */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
} KBSCRSTR;
extern volatile KBSCRSTR _KBSCR;
#define KBSCR                           _KBSCR.Byte
#define KBSCR_MODEK                     _KBSCR.Bits.MODEK
#define KBSCR_IMASKK                    _KBSCR.Bits.IMASKK
#define KBSCR_ACKK                      _KBSCR.Bits.ACKK
#define KBSCR_KEYF                      _KBSCR.Bits.KEYF

#define KBSCR_MODEK_MASK                1
#define KBSCR_IMASKK_MASK               2
#define KBSCR_ACKK_MASK                 4
#define KBSCR_KEYF_MASK                 8


/*** KBIER - Keyboard Interrrupt Enable Register KBIER; 0x00000017 ***/
typedef union {
  byte Byte;
  struct {
    byte KBIE0       :1;                                       /* Keyboard Interrupt Enable Bit 0 */
    byte KBIE1       :1;                                       /* Keyboard Interrupt Enable Bit 1 */
    byte KBIE2       :1;                                       /* Keyboard Interrupt Enable Bit 2 */
    byte KBIE3       :1;                                       /* Keyboard Interrupt Enable Bit 3 */
    byte KBIE4       :1;                                       /* Keyboard Interrupt Enable Bit 4 */
    byte KBIE5       :1;                                       /* Keyboard Interrupt Enable Bit 5 */
    byte KBIE6       :1;                                       /* Keyboard Interrupt Enable Bit 6 */
    byte KBIE7       :1;                                       /* Keyboard Interrupt Enable Bit 7 */
  } Bits;
} KBIERSTR;
extern volatile KBIERSTR _KBIER;
#define KBIER                           _KBIER.Byte
#define KBIER_KBIE0                     _KBIER.Bits.KBIE0
#define KBIER_KBIE1                     _KBIER.Bits.KBIE1
#define KBIER_KBIE2                     _KBIER.Bits.KBIE2
#define KBIER_KBIE3                     _KBIER.Bits.KBIE3
#define KBIER_KBIE4                     _KBIER.Bits.KBIE4
#define KBIER_KBIE5                     _KBIER.Bits.KBIE5
#define KBIER_KBIE6                     _KBIER.Bits.KBIE6
#define KBIER_KBIE7                     _KBIER.Bits.KBIE7

#define KBIER_KBIE0_MASK                1
#define KBIER_KBIE1_MASK                2
#define KBIER_KBIE2_MASK                4
#define KBIER_KBIE3_MASK                8
#define KBIER_KBIE4_MASK                16
#define KBIER_KBIE5_MASK                32
#define KBIER_KBIE6_MASK                64
#define KBIER_KBIE7_MASK                128


/*** TBCR - Timebase Control Register; 0x00000018 ***/
typedef union {
  byte Byte;
  struct {
    byte             :1; 
    byte TBON        :1;                                       /* Timebase Enabled */
    byte TBIE        :1;                                       /* Timebase Interrupt Enable */
    byte TACK        :1;                                       /* Timebase ACKnowledge */
    byte TBR0        :1;                                       /* Timebase Rate Selection Bit 0 */
    byte TBR1        :1;                                       /* Timebase Rate Selection Bit 1 */
    byte TBR2        :1;                                       /* Timebase Rate Selection Bit 2 */
    byte TBIF        :1;                                       /* Timebase Interrupt Flag */
  } Bits;
  struct {
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
    byte grpTBR  :3;
    byte         :1;
  } MergedBits;
} TBCRSTR;
extern volatile TBCRSTR _TBCR;
#define TBCR                            _TBCR.Byte
#define TBCR_TBON                       _TBCR.Bits.TBON
#define TBCR_TBIE                       _TBCR.Bits.TBIE
#define TBCR_TACK                       _TBCR.Bits.TACK
#define TBCR_TBR0                       _TBCR.Bits.TBR0
#define TBCR_TBR1                       _TBCR.Bits.TBR1
#define TBCR_TBR2                       _TBCR.Bits.TBR2
#define TBCR_TBIF                       _TBCR.Bits.TBIF
#define TBCR_TBR                        _TBCR.MergedBits.grpTBR

#define TBCR_TBON_MASK                  2
#define TBCR_TBIE_MASK                  4
#define TBCR_TACK_MASK                  8
#define TBCR_TBR0_MASK                  16
#define TBCR_TBR1_MASK                  32
#define TBCR_TBR2_MASK                  64
#define TBCR_TBIF_MASK                  128
#define TBCR_TBR_MASK                   112
#define TBCR_TBR_BITNUM                 4


/*** PS2CSR - I/O Control Register ; 0x00000019 ***/
typedef union {
  byte Byte;
  struct {
    byte PS2EN       :1;                                       /* PS2 Clock Generator Module Enable */
    byte CLKEN       :1;                                       /* Clock Output Enable bit */
    byte PS2IEN      :1;                                       /* PS2 Interrupt Mask */
    byte CSEL0       :1;                                       /* Clock Frequency Selection bit 0 */
    byte CSEL1       :1;                                       /* Clock Frequency Selection bit 1 */
    byte PRE         :1;                                       /* Prescalar Selection */
    byte PS2IF       :1;                                       /* PS2 Interrupt Flag */
    byte PSTATUS     :1;                                       /* Port Status Flag */
  } Bits;
  struct {
    byte         :1;
    byte         :1;
    byte         :1;
    byte grpCSEL :2;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} PS2CSRSTR;
extern volatile PS2CSRSTR _PS2CSR;
#define PS2CSR                          _PS2CSR.Byte
#define PS2CSR_PS2EN                    _PS2CSR.Bits.PS2EN
#define PS2CSR_CLKEN                    _PS2CSR.Bits.CLKEN
#define PS2CSR_PS2IEN                   _PS2CSR.Bits.PS2IEN
#define PS2CSR_CSEL0                    _PS2CSR.Bits.CSEL0
#define PS2CSR_CSEL1                    _PS2CSR.Bits.CSEL1
#define PS2CSR_PRE                      _PS2CSR.Bits.PRE
#define PS2CSR_PS2IF                    _PS2CSR.Bits.PS2IF
#define PS2CSR_PSTATUS                  _PS2CSR.Bits.PSTATUS
#define PS2CSR_CSEL                     _PS2CSR.MergedBits.grpCSEL

#define PS2CSR_PS2EN_MASK               1
#define PS2CSR_CLKEN_MASK               2
#define PS2CSR_PS2IEN_MASK              4
#define PS2CSR_CSEL0_MASK               8
#define PS2CSR_CSEL1_MASK               16
#define PS2CSR_PRE_MASK                 32
#define PS2CSR_PS2IF_MASK               64
#define PS2CSR_PSTATUS_MASK             128
#define PS2CSR_CSEL_MASK                24
#define PS2CSR_CSEL_BITNUM              3


/*** POCR1 - Port Option Control Register 1; 0x0000001A ***/
typedef union {
  byte Byte;
  struct {
    byte LEDB0       :1;                                       /* Port B LED Drive Enable Bit 0 */
    byte LEDB1       :1;                                       /* Port B LED Drive Enable Bit 1 */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte LEDB5       :1;                                       /* Port B LED Drive Enable Bit 5 */
    byte             :1; 
    byte             :1; 
  } Bits;
  struct {
    byte grpLEDB :2;
    byte         :1;
    byte         :1;
    byte         :1;
    byte grpLEDB_5 :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} POCR1STR;
extern volatile POCR1STR _POCR1;
#define POCR1                           _POCR1.Byte
#define POCR1_LEDB0                     _POCR1.Bits.LEDB0
#define POCR1_LEDB1                     _POCR1.Bits.LEDB1
#define POCR1_LEDB5                     _POCR1.Bits.LEDB5
#define POCR1_LEDB                      _POCR1.MergedBits.grpLEDB

#define POCR1_LEDB0_MASK                1
#define POCR1_LEDB1_MASK                2
#define POCR1_LEDB5_MASK                32
#define POCR1_LEDB_MASK                 3
#define POCR1_LEDB_BITNUM               0


/*** POCR2 - Port Option Control Register 2; 0x0000001B ***/
typedef union {
  byte Byte;
  struct {
    byte PTE2P       :1;                                       /* Pin PTE2 Pullup Enable */
    byte PTE3P       :1;                                       /* Pin PTE3 Pullup Enable */
    byte DPPULLEN    :1;                                       /* D+ Pullup Enable */
    byte PTD2PD      :1;                                       /* Pin PTD2 Pullup Disable */
    byte PTD3PD      :1;                                       /* Pin PTD3 Pullup Disable */
    byte PTD7PD      :1;                                       /* Pin PTD7 Pullup Disable */
    byte             :1; 
    byte             :1; 
  } Bits;
} POCR2STR;
extern volatile POCR2STR _POCR2;
#define POCR2                           _POCR2.Byte
#define POCR2_PTE2P                     _POCR2.Bits.PTE2P
#define POCR2_PTE3P                     _POCR2.Bits.PTE3P
#define POCR2_DPPULLEN                  _POCR2.Bits.DPPULLEN
#define POCR2_PTD2PD                    _POCR2.Bits.PTD2PD
#define POCR2_PTD3PD                    _POCR2.Bits.PTD3PD
#define POCR2_PTD7PD                    _POCR2.Bits.PTD7PD

#define POCR2_PTE2P_MASK                1
#define POCR2_PTE3P_MASK                2
#define POCR2_DPPULLEN_MASK             4
#define POCR2_PTD2PD_MASK               8
#define POCR2_PTD3PD_MASK               16
#define POCR2_PTD7PD_MASK               32


/*** IOCR - IRQ Option Register; 0x0000001C ***/
typedef union {
  byte Byte;
  struct {
    byte IRQPD       :1;                                       /* IRQ Pullup Disable */
    byte PTE3IE      :1;                                       /* PTE3 Interrupt Enable */
    byte PTE3IF      :1;                                       /* PTE3 Interrupt Flag */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
} IOCRSTR;
extern volatile IOCRSTR _IOCR;
#define IOCR                            _IOCR.Byte
#define IOCR_IRQPD                      _IOCR.Bits.IRQPD
#define IOCR_PTE3IE                     _IOCR.Bits.PTE3IE
#define IOCR_PTE3IF                     _IOCR.Bits.PTE3IF

#define IOCR_IRQPD_MASK                 1
#define IOCR_PTE3IE_MASK                2
#define IOCR_PTE3IF_MASK                4


/*** CONFIG2 - Configuration Register 2; 0x0000001D ***/
typedef union {
  byte Byte;
  struct {
    byte URSTD       :1;                                       /* USB Reset Disable Bit */
    byte VREG33D     :1;                                       /* 3.3V USB Regulator Disable Bit */
    byte             :1; 
    byte             :1; 
    byte STOP_RCCLKEN :1;                                      /* RC clock Stop Mode Enable */
    byte STOP_XCLKEN :1;                                       /* Crystal Oscillator Stop Mode Enable */
    byte             :1; 
    byte             :1; 
  } Bits;
} CONFIG2STR;
extern volatile CONFIG2STR _CONFIG2;
#define CONFIG2                         _CONFIG2.Byte
#define CONFIG2_URSTD                   _CONFIG2.Bits.URSTD
#define CONFIG2_VREG33D                 _CONFIG2.Bits.VREG33D
#define CONFIG2_STOP_RCCLKEN            _CONFIG2.Bits.STOP_RCCLKEN
#define CONFIG2_STOP_XCLKEN             _CONFIG2.Bits.STOP_XCLKEN

#define CONFIG2_URSTD_MASK              1
#define CONFIG2_VREG33D_MASK            2
#define CONFIG2_STOP_RCCLKEN_MASK       16
#define CONFIG2_STOP_XCLKEN_MASK        32


/*** ISCR - IRQ Status and Control Register; 0x0000001E ***/
typedef union {
  byte Byte;
  struct {
    byte MODE        :1;                                       /* IRQ Edge/Level Select Bit */
    byte IMASK       :1;                                       /* IRQ Interrupt Mask Bit */
    byte ACK         :1;                                       /* IRQ Interrupt Request Acknowledge Bit */
    byte IRQF        :1;                                       /* IRQ Flag Bit */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
} ISCRSTR;
extern volatile ISCRSTR _ISCR;
#define ISCR                            _ISCR.Byte
#define ISCR_MODE                       _ISCR.Bits.MODE
#define ISCR_IMASK                      _ISCR.Bits.IMASK
#define ISCR_ACK                        _ISCR.Bits.ACK
#define ISCR_IRQF                       _ISCR.Bits.IRQF

#define ISCR_MODE_MASK                  1
#define ISCR_IMASK_MASK                 2
#define ISCR_ACK_MASK                   4
#define ISCR_IRQF_MASK                  8


/*** CONFIG1 - Configuration Register 1; 0x0000001F ***/
typedef union {
  byte Byte;
  struct {
    byte COPD        :1;                                       /* COP Disable Bit */
    byte STOP        :1;                                       /* STOP Instruction Enable Bit */
    byte SSREC       :1;                                       /* Short Stop Recovery Bit */
    byte             :1; 
    byte LVIPWRD     :1;                                       /* LVI Power Disable Bit */
    byte LVIRSTD     :1;                                       /* LVI Reset Disable Bit */
    byte LVISTOP     :1;                                       /* LVI Enable in Stop Mode Bit */
    byte COPRS       :1;                                       /* COP rate Select Bit */
  } Bits;
} CONFIG1STR;
extern volatile CONFIG1STR _CONFIG1;
#define CONFIG1                         _CONFIG1.Byte
#define CONFIG1_COPD                    _CONFIG1.Bits.COPD
#define CONFIG1_STOP                    _CONFIG1.Bits.STOP
#define CONFIG1_SSREC                   _CONFIG1.Bits.SSREC
#define CONFIG1_LVIPWRD                 _CONFIG1.Bits.LVIPWRD
#define CONFIG1_LVIRSTD                 _CONFIG1.Bits.LVIRSTD
#define CONFIG1_LVISTOP                 _CONFIG1.Bits.LVISTOP
#define CONFIG1_COPRS                   _CONFIG1.Bits.COPRS

#define CONFIG1_COPD_MASK               1
#define CONFIG1_STOP_MASK               2
#define CONFIG1_SSREC_MASK              4
#define CONFIG1_LVIPWRD_MASK            16
#define CONFIG1_LVIRSTD_MASK            32
#define CONFIG1_LVISTOP_MASK            64
#define CONFIG1_COPRS_MASK              128


/*** PULLCR - Pullup Control Register; 0x0000003E ***/
typedef union {
  byte Byte;
  struct {
    byte PULL0EN     :1;                                       /* Pullup enable bit 0 */
    byte PULL1EN     :1;                                       /* Pullup enable bit 1 */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte PULL5EN     :1;                                       /* Pullup enable bit 5 */
    byte             :1; 
    byte             :1; 
  } Bits;
} PULLCRSTR;
extern volatile PULLCRSTR _PULLCR;
#define PULLCR                          _PULLCR.Byte
#define PULLCR_PULL0EN                  _PULLCR.Bits.PULL0EN
#define PULLCR_PULL1EN                  _PULLCR.Bits.PULL1EN
#define PULLCR_PULL5EN                  _PULLCR.Bits.PULL5EN

#define PULLCR_PULL0EN_MASK             1
#define PULLCR_PULL1EN_MASK             2
#define PULLCR_PULL5EN_MASK             32


/*** UE0D0 - USB Endpoint 0 Data Register 0; 0x00000040 ***/
typedef union {
  byte Byte;
  struct {
    byte UE0D00_OUT_UE0D00_IN :1;                              /* Endpoint 0 Transmit Data Buffer 0 Bit 0, Endpoint 0 Receive Data Buffer 0 Bit 0 */
    byte UE0D01_OUT_UE0D01_IN :1;                              /* Endpoint 0 Transmit Data Buffer 0 Bit 1, Endpoint 0 Receive Data Buffer 0 Bit 1 */
    byte UE0D02_OUT_UE0D02_IN :1;                              /* Endpoint 0 Transmit Data Buffer 0 Bit 2, Endpoint 0 Receive Data Buffer 0 Bit 2 */
    byte UE0D03_OUT_UE0D03_IN :1;                              /* Endpoint 0 Transmit Data Buffer 0 Bit 3, Endpoint 0 Receive Data Buffer 0 Bit 3 */
    byte UE0D04_OUT_UE0D04_IN :1;                              /* Endpoint 0 Transmit Data Buffer 0 Bit 4, Endpoint 0 Receive Data Buffer 0 Bit 4 */
    byte UE0D05_OUT_UE0D05_IN :1;                              /* Endpoint 0 Transmit Data Buffer 0 Bit 5, Endpoint 0 Receive Data Buffer 0 Bit 5 */
    byte UE0D06_OUT_UE0D06_IN :1;                              /* Endpoint 0 Transmit Data Buffer 0 Bit 6, Endpoint 0 Receive Data Buffer 0 Bit 6 */
    byte UE0D07_OUT_UE0D07_IN :1;                              /* Endpoint 0 Transmit Data Buffer 0 Bit 7, Endpoint 0 Receive Data Buffer 0 Bit 7 */
  } Bits;
} UE0D0STR;
extern volatile UE0D0STR _UE0D0;
#define UE0D0                           _UE0D0.Byte
#define UE0D0_UE0D00_OUT_UE0D00_IN      _UE0D0.Bits.UE0D00_OUT_UE0D00_IN
#define UE0D0_UE0D01_OUT_UE0D01_IN      _UE0D0.Bits.UE0D01_OUT_UE0D01_IN
#define UE0D0_UE0D02_OUT_UE0D02_IN      _UE0D0.Bits.UE0D02_OUT_UE0D02_IN
#define UE0D0_UE0D03_OUT_UE0D03_IN      _UE0D0.Bits.UE0D03_OUT_UE0D03_IN
#define UE0D0_UE0D04_OUT_UE0D04_IN      _UE0D0.Bits.UE0D04_OUT_UE0D04_IN
#define UE0D0_UE0D05_OUT_UE0D05_IN      _UE0D0.Bits.UE0D05_OUT_UE0D05_IN
#define UE0D0_UE0D06_OUT_UE0D06_IN      _UE0D0.Bits.UE0D06_OUT_UE0D06_IN
#define UE0D0_UE0D07_OUT_UE0D07_IN      _UE0D0.Bits.UE0D07_OUT_UE0D07_IN
/* UE0D_ARR: Access 8 UE0Dx registers in an array */
#define UE0D_ARR                        ((volatile byte * __far) &UE0D0)

#define UE0D0_UE0D00_OUT_UE0D00_IN_MASK 1
#define UE0D0_UE0D01_OUT_UE0D01_IN_MASK 2
#define UE0D0_UE0D02_OUT_UE0D02_IN_MASK 4
#define UE0D0_UE0D03_OUT_UE0D03_IN_MASK 8
#define UE0D0_UE0D04_OUT_UE0D04_IN_MASK 16
#define UE0D0_UE0D05_OUT_UE0D05_IN_MASK 32
#define UE0D0_UE0D06_OUT_UE0D06_IN_MASK 64
#define UE0D0_UE0D07_OUT_UE0D07_IN_MASK 128


/*** UE0D1 - USB Endpoint 0 Data Register 1; 0x00000041 ***/
typedef union {
  byte Byte;
  struct {
    byte UE0D10_OUT_UE0D10_IN :1;                              /* Endpoint 0 Transmit Data Buffer 1 Bit 0, Endpoint 0 Receive Data Buffer 1 Bit 0 */
    byte UE0D11_OUT_UE0D11_IN :1;                              /* Endpoint 0 Transmit Data Buffer 1 Bit 1, Endpoint 0 Receive Data Buffer 1 Bit 1 */
    byte UE0D12_OUT_UE0D12_IN :1;                              /* Endpoint 0 Transmit Data Buffer 1 Bit 2, Endpoint 0 Receive Data Buffer 1 Bit 2 */
    byte UE0D13_OUT_UE0D13_IN :1;                              /* Endpoint 0 Transmit Data Buffer 1 Bit 3, Endpoint 0 Receive Data Buffer 1 Bit 3 */
    byte UE0D14_OUT_UE0D14_IN :1;                              /* Endpoint 0 Transmit Data Buffer 1 Bit 4, Endpoint 0 Receive Data Buffer 1 Bit 4 */
    byte UE0D15_OUT_UE0D15_IN :1;                              /* Endpoint 0 Transmit Data Buffer 1 Bit 5, Endpoint 0 Receive Data Buffer 1 Bit 5 */
    byte UE0D16_OUT_UE0D16_IN :1;                              /* Endpoint 0 Transmit Data Buffer 1 Bit 6, Endpoint 0 Receive Data Buffer 1 Bit 6 */
    byte UE0D17_OUT_UE0D17_IN :1;                              /* Endpoint 0 Transmit Data Buffer 1 Bit 7, Endpoint 0 Receive Data Buffer 1 Bit 7 */
  } Bits;
} UE0D1STR;
extern volatile UE0D1STR _UE0D1;
#define UE0D1                           _UE0D1.Byte
#define UE0D1_UE0D10_OUT_UE0D10_IN      _UE0D1.Bits.UE0D10_OUT_UE0D10_IN
#define UE0D1_UE0D11_OUT_UE0D11_IN      _UE0D1.Bits.UE0D11_OUT_UE0D11_IN
#define UE0D1_UE0D12_OUT_UE0D12_IN      _UE0D1.Bits.UE0D12_OUT_UE0D12_IN
#define UE0D1_UE0D13_OUT_UE0D13_IN      _UE0D1.Bits.UE0D13_OUT_UE0D13_IN
#define UE0D1_UE0D14_OUT_UE0D14_IN      _UE0D1.Bits.UE0D14_OUT_UE0D14_IN
#define UE0D1_UE0D15_OUT_UE0D15_IN      _UE0D1.Bits.UE0D15_OUT_UE0D15_IN
#define UE0D1_UE0D16_OUT_UE0D16_IN      _UE0D1.Bits.UE0D16_OUT_UE0D16_IN
#define UE0D1_UE0D17_OUT_UE0D17_IN      _UE0D1.Bits.UE0D17_OUT_UE0D17_IN

#define UE0D1_UE0D10_OUT_UE0D10_IN_MASK 1
#define UE0D1_UE0D11_OUT_UE0D11_IN_MASK 2
#define UE0D1_UE0D12_OUT_UE0D12_IN_MASK 4
#define UE0D1_UE0D13_OUT_UE0D13_IN_MASK 8
#define UE0D1_UE0D14_OUT_UE0D14_IN_MASK 16
#define UE0D1_UE0D15_OUT_UE0D15_IN_MASK 32
#define UE0D1_UE0D16_OUT_UE0D16_IN_MASK 64
#define UE0D1_UE0D17_OUT_UE0D17_IN_MASK 128


/*** UE0D2 - USB Endpoint 0 Data Register 2; 0x00000042 ***/
typedef union {
  byte Byte;
  struct {
    byte UE0D20_OUT_UE0D20_IN :1;                              /* Endpoint 0 Transmit Data Buffer 2 Bit 0, Endpoint 0 Receive Data Buffer 2 Bit 0 */
    byte UE0D21_OUT_UE0D21_IN :1;                              /* Endpoint 0 Transmit Data Buffer 2 Bit 1, Endpoint 0 Receive Data Buffer 2 Bit 1 */
    byte UE0D22_OUT_UE0D22_IN :1;                              /* Endpoint 0 Transmit Data Buffer 2 Bit 2, Endpoint 0 Receive Data Buffer 2 Bit 2 */
    byte UE0D23_OUT_UE0D23_IN :1;                              /* Endpoint 0 Transmit Data Buffer 2 Bit 3, Endpoint 0 Receive Data Buffer 2 Bit 3 */
    byte UE0D24_OUT_UE0D24_IN :1;                              /* Endpoint 0 Transmit Data Buffer 2 Bit 4, Endpoint 0 Receive Data Buffer 2 Bit 4 */
    byte UE0D25_OUT_UE0D25_IN :1;                              /* Endpoint 0 Transmit Data Buffer 2 Bit 5, Endpoint 0 Receive Data Buffer 2 Bit 5 */
    byte UE0D26_OUT_UE0D26_IN :1;                              /* Endpoint 0 Transmit Data Buffer 2 Bit 6, Endpoint 0 Receive Data Buffer 2 Bit 6 */
    byte UE0D27_OUT_UE0D27_IN :1;                              /* Endpoint 0 Transmit Data Buffer 2 Bit 7, Endpoint 0 Receive Data Buffer 2 Bit 7 */
  } Bits;
} UE0D2STR;
extern volatile UE0D2STR _UE0D2;
#define UE0D2                           _UE0D2.Byte
#define UE0D2_UE0D20_OUT_UE0D20_IN      _UE0D2.Bits.UE0D20_OUT_UE0D20_IN
#define UE0D2_UE0D21_OUT_UE0D21_IN      _UE0D2.Bits.UE0D21_OUT_UE0D21_IN
#define UE0D2_UE0D22_OUT_UE0D22_IN      _UE0D2.Bits.UE0D22_OUT_UE0D22_IN
#define UE0D2_UE0D23_OUT_UE0D23_IN      _UE0D2.Bits.UE0D23_OUT_UE0D23_IN
#define UE0D2_UE0D24_OUT_UE0D24_IN      _UE0D2.Bits.UE0D24_OUT_UE0D24_IN
#define UE0D2_UE0D25_OUT_UE0D25_IN      _UE0D2.Bits.UE0D25_OUT_UE0D25_IN
#define UE0D2_UE0D26_OUT_UE0D26_IN      _UE0D2.Bits.UE0D26_OUT_UE0D26_IN
#define UE0D2_UE0D27_OUT_UE0D27_IN      _UE0D2.Bits.UE0D27_OUT_UE0D27_IN

#define UE0D2_UE0D20_OUT_UE0D20_IN_MASK 1
#define UE0D2_UE0D21_OUT_UE0D21_IN_MASK 2
#define UE0D2_UE0D22_OUT_UE0D22_IN_MASK 4
#define UE0D2_UE0D23_OUT_UE0D23_IN_MASK 8
#define UE0D2_UE0D24_OUT_UE0D24_IN_MASK 16
#define UE0D2_UE0D25_OUT_UE0D25_IN_MASK 32
#define UE0D2_UE0D26_OUT_UE0D26_IN_MASK 64
#define UE0D2_UE0D27_OUT_UE0D27_IN_MASK 128


/*** UE0D3 - USB Endpoint 0 Data Register 3; 0x00000043 ***/
typedef union {
  byte Byte;
  struct {
    byte UE0D30_OUT_UE0D30_IN :1;                              /* Endpoint 0 Transmit Data Buffer 3 Bit 0, Endpoint 0 Receive Data Buffer 3 Bit 0 */
    byte UE0D31_OUT_UE0D31_IN :1;                              /* Endpoint 0 Transmit Data Buffer 3 Bit 1, Endpoint 0 Receive Data Buffer 3 Bit 1 */
    byte UE0D32_OUT_UE0D32_IN :1;                              /* Endpoint 0 Transmit Data Buffer 3 Bit 2, Endpoint 0 Receive Data Buffer 3 Bit 2 */
    byte UE0D33_OUT_UE0D33_IN :1;                              /* Endpoint 0 Transmit Data Buffer 3 Bit 3, Endpoint 0 Receive Data Buffer 3 Bit 3 */
    byte UE0D34_OUT_UE0D34_IN :1;                              /* Endpoint 0 Transmit Data Buffer 3 Bit 4, Endpoint 0 Receive Data Buffer 3 Bit 4 */
    byte UE0D35_OUT_UE0D35_IN :1;                              /* Endpoint 0 Transmit Data Buffer 3 Bit 5, Endpoint 0 Receive Data Buffer 3 Bit 5 */
    byte UE0D36_OUT_UE0D36_IN :1;                              /* Endpoint 0 Transmit Data Buffer 3 Bit 6, Endpoint 0 Receive Data Buffer 3 Bit 6 */
    byte UE0D37_OUT_UE0D37_IN :1;                              /* Endpoint 0 Transmit Data Buffer 3 Bit 7, Endpoint 0 Receive Data Buffer 3 Bit 7 */
  } Bits;
} UE0D3STR;
extern volatile UE0D3STR _UE0D3;
#define UE0D3                           _UE0D3.Byte
#define UE0D3_UE0D30_OUT_UE0D30_IN      _UE0D3.Bits.UE0D30_OUT_UE0D30_IN
#define UE0D3_UE0D31_OUT_UE0D31_IN      _UE0D3.Bits.UE0D31_OUT_UE0D31_IN
#define UE0D3_UE0D32_OUT_UE0D32_IN      _UE0D3.Bits.UE0D32_OUT_UE0D32_IN
#define UE0D3_UE0D33_OUT_UE0D33_IN      _UE0D3.Bits.UE0D33_OUT_UE0D33_IN
#define UE0D3_UE0D34_OUT_UE0D34_IN      _UE0D3.Bits.UE0D34_OUT_UE0D34_IN
#define UE0D3_UE0D35_OUT_UE0D35_IN      _UE0D3.Bits.UE0D35_OUT_UE0D35_IN
#define UE0D3_UE0D36_OUT_UE0D36_IN      _UE0D3.Bits.UE0D36_OUT_UE0D36_IN
#define UE0D3_UE0D37_OUT_UE0D37_IN      _UE0D3.Bits.UE0D37_OUT_UE0D37_IN

#define UE0D3_UE0D30_OUT_UE0D30_IN_MASK 1
#define UE0D3_UE0D31_OUT_UE0D31_IN_MASK 2
#define UE0D3_UE0D32_OUT_UE0D32_IN_MASK 4
#define UE0D3_UE0D33_OUT_UE0D33_IN_MASK 8
#define UE0D3_UE0D34_OUT_UE0D34_IN_MASK 16
#define UE0D3_UE0D35_OUT_UE0D35_IN_MASK 32
#define UE0D3_UE0D36_OUT_UE0D36_IN_MASK 64
#define UE0D3_UE0D37_OUT_UE0D37_IN_MASK 128


/*** UE0D4 - USB Endpoint 0 Data Register 4; 0x00000044 ***/
typedef union {
  byte Byte;
  struct {
    byte UE0D40_OUT_UE0D40_IN :1;                              /* Endpoint 0 Transmit Data Buffer 4 Bit 0, Endpoint 0 Receive Data Buffer 4 Bit 0 */
    byte UE0D41_OUT_UE0D41_IN :1;                              /* Endpoint 0 Transmit Data Buffer 4 Bit 1, Endpoint 0 Receive Data Buffer 4 Bit 1 */
    byte UE0D42_OUT_UE0D42_IN :1;                              /* Endpoint 0 Transmit Data Buffer 4 Bit 2, Endpoint 0 Receive Data Buffer 4 Bit 2 */
    byte UE0D43_OUT_UE0D43_IN :1;                              /* Endpoint 0 Transmit Data Buffer 4 Bit 3, Endpoint 0 Receive Data Buffer 4 Bit 3 */
    byte UE0D44_OUT_UE0D44_IN :1;                              /* Endpoint 0 Transmit Data Buffer 4 Bit 4, Endpoint 0 Receive Data Buffer 4 Bit 4 */
    byte UE0D45_OUT_UE0D45_IN :1;                              /* Endpoint 0 Transmit Data Buffer 4 Bit 5, Endpoint 0 Receive Data Buffer 4 Bit 5 */
    byte UE0D46_OUT_UE0D46_IN :1;                              /* Endpoint 0 Transmit Data Buffer 4 Bit 6, Endpoint 0 Receive Data Buffer 4 Bit 6 */
    byte UE0D47_OUT_UE0D47_IN :1;                              /* Endpoint 0 Transmit Data Buffer 4 Bit 7, Endpoint 0 Receive Data Buffer 4 Bit 7 */
  } Bits;
} UE0D4STR;
extern volatile UE0D4STR _UE0D4;
#define UE0D4                           _UE0D4.Byte
#define UE0D4_UE0D40_OUT_UE0D40_IN      _UE0D4.Bits.UE0D40_OUT_UE0D40_IN
#define UE0D4_UE0D41_OUT_UE0D41_IN      _UE0D4.Bits.UE0D41_OUT_UE0D41_IN
#define UE0D4_UE0D42_OUT_UE0D42_IN      _UE0D4.Bits.UE0D42_OUT_UE0D42_IN
#define UE0D4_UE0D43_OUT_UE0D43_IN      _UE0D4.Bits.UE0D43_OUT_UE0D43_IN
#define UE0D4_UE0D44_OUT_UE0D44_IN      _UE0D4.Bits.UE0D44_OUT_UE0D44_IN
#define UE0D4_UE0D45_OUT_UE0D45_IN      _UE0D4.Bits.UE0D45_OUT_UE0D45_IN
#define UE0D4_UE0D46_OUT_UE0D46_IN      _UE0D4.Bits.UE0D46_OUT_UE0D46_IN
#define UE0D4_UE0D47_OUT_UE0D47_IN      _UE0D4.Bits.UE0D47_OUT_UE0D47_IN

#define UE0D4_UE0D40_OUT_UE0D40_IN_MASK 1
#define UE0D4_UE0D41_OUT_UE0D41_IN_MASK 2
#define UE0D4_UE0D42_OUT_UE0D42_IN_MASK 4
#define UE0D4_UE0D43_OUT_UE0D43_IN_MASK 8
#define UE0D4_UE0D44_OUT_UE0D44_IN_MASK 16
#define UE0D4_UE0D45_OUT_UE0D45_IN_MASK 32
#define UE0D4_UE0D46_OUT_UE0D46_IN_MASK 64
#define UE0D4_UE0D47_OUT_UE0D47_IN_MASK 128


/*** UE0D5 - USB Endpoint 0 Data Register 5; 0x00000045 ***/
typedef union {
  byte Byte;
  struct {
    byte UE0D50_OUT_UE0D50_IN :1;                              /* Endpoint 0 Transmit Data Buffer 5 Bit 0, Endpoint 0 Receive Data Buffer 5 Bit 0 */
    byte UE0D51_OUT_UE0D51_IN :1;                              /* Endpoint 0 Transmit Data Buffer 5 Bit 1, Endpoint 0 Receive Data Buffer 5 Bit 1 */
    byte UE0D52_OUT_UE0D52_IN :1;                              /* Endpoint 0 Transmit Data Buffer 5 Bit 2, Endpoint 0 Receive Data Buffer 5 Bit 2 */
    byte UE0D53_OUT_UE0D53_IN :1;                              /* Endpoint 0 Transmit Data Buffer 5 Bit 3, Endpoint 0 Receive Data Buffer 5 Bit 3 */
    byte UE0D54_OUT_UE0D54_IN :1;                              /* Endpoint 0 Transmit Data Buffer 5 Bit 4, Endpoint 0 Receive Data Buffer 5 Bit 4 */
    byte UE0D55_OUT_UE0D55_IN :1;                              /* Endpoint 0 Transmit Data Buffer 5 Bit 5, Endpoint 0 Receive Data Buffer 5 Bit 5 */
    byte UE0D56_OUT_UE0D56_IN :1;                              /* Endpoint 0 Transmit Data Buffer 5 Bit 6, Endpoint 0 Receive Data Buffer 5 Bit 6 */
    byte UE0D57_OUT_UE0D57_IN :1;                              /* Endpoint 0 Transmit Data Buffer 5 Bit 7, Endpoint 0 Receive Data Buffer 5 Bit 7 */
  } Bits;
} UE0D5STR;
extern volatile UE0D5STR _UE0D5;
#define UE0D5                           _UE0D5.Byte
#define UE0D5_UE0D50_OUT_UE0D50_IN      _UE0D5.Bits.UE0D50_OUT_UE0D50_IN
#define UE0D5_UE0D51_OUT_UE0D51_IN      _UE0D5.Bits.UE0D51_OUT_UE0D51_IN
#define UE0D5_UE0D52_OUT_UE0D52_IN      _UE0D5.Bits.UE0D52_OUT_UE0D52_IN
#define UE0D5_UE0D53_OUT_UE0D53_IN      _UE0D5.Bits.UE0D53_OUT_UE0D53_IN
#define UE0D5_UE0D54_OUT_UE0D54_IN      _UE0D5.Bits.UE0D54_OUT_UE0D54_IN
#define UE0D5_UE0D55_OUT_UE0D55_IN      _UE0D5.Bits.UE0D55_OUT_UE0D55_IN
#define UE0D5_UE0D56_OUT_UE0D56_IN      _UE0D5.Bits.UE0D56_OUT_UE0D56_IN
#define UE0D5_UE0D57_OUT_UE0D57_IN      _UE0D5.Bits.UE0D57_OUT_UE0D57_IN

#define UE0D5_UE0D50_OUT_UE0D50_IN_MASK 1
#define UE0D5_UE0D51_OUT_UE0D51_IN_MASK 2
#define UE0D5_UE0D52_OUT_UE0D52_IN_MASK 4
#define UE0D5_UE0D53_OUT_UE0D53_IN_MASK 8
#define UE0D5_UE0D54_OUT_UE0D54_IN_MASK 16
#define UE0D5_UE0D55_OUT_UE0D55_IN_MASK 32
#define UE0D5_UE0D56_OUT_UE0D56_IN_MASK 64
#define UE0D5_UE0D57_OUT_UE0D57_IN_MASK 128


/*** UE0D6 - USB Endpoint 0 Data Register 6; 0x00000046 ***/
typedef union {
  byte Byte;
  struct {
    byte UE0D60_OUT_UE0D60_IN :1;                              /* Endpoint 0 Transmit Data Buffer 6 Bit 0, Endpoint 0 Receive Data Buffer 6 Bit 0 */
    byte UE0D61_OUT_UE0D61_IN :1;                              /* Endpoint 0 Transmit Data Buffer 6 Bit 1, Endpoint 0 Receive Data Buffer 6 Bit 1 */
    byte UE0D62_OUT_UE0D62_IN :1;                              /* Endpoint 0 Transmit Data Buffer 6 Bit 2, Endpoint 0 Receive Data Buffer 6 Bit 2 */
    byte UE0D63_OUT_UE0D63_IN :1;                              /* Endpoint 0 Transmit Data Buffer 6 Bit 3, Endpoint 0 Receive Data Buffer 6 Bit 3 */
    byte UE0D64_OUT_UE0D64_IN :1;                              /* Endpoint 0 Transmit Data Buffer 6 Bit 4, Endpoint 0 Receive Data Buffer 6 Bit 4 */
    byte UE0D65_OUT_UE0D65_IN :1;                              /* Endpoint 0 Transmit Data Buffer 6 Bit 5, Endpoint 0 Receive Data Buffer 6 Bit 5 */
    byte UE0D66_OUT_UE0D66_IN :1;                              /* Endpoint 0 Transmit Data Buffer 6 Bit 6, Endpoint 0 Receive Data Buffer 6 Bit 6 */
    byte UE0D67_OUT_UE0D67_IN :1;                              /* Endpoint 0 Transmit Data Buffer 6 Bit 7, Endpoint 0 Receive Data Buffer 6 Bit 7 */
  } Bits;
} UE0D6STR;
extern volatile UE0D6STR _UE0D6;
#define UE0D6                           _UE0D6.Byte
#define UE0D6_UE0D60_OUT_UE0D60_IN      _UE0D6.Bits.UE0D60_OUT_UE0D60_IN
#define UE0D6_UE0D61_OUT_UE0D61_IN      _UE0D6.Bits.UE0D61_OUT_UE0D61_IN
#define UE0D6_UE0D62_OUT_UE0D62_IN      _UE0D6.Bits.UE0D62_OUT_UE0D62_IN
#define UE0D6_UE0D63_OUT_UE0D63_IN      _UE0D6.Bits.UE0D63_OUT_UE0D63_IN
#define UE0D6_UE0D64_OUT_UE0D64_IN      _UE0D6.Bits.UE0D64_OUT_UE0D64_IN
#define UE0D6_UE0D65_OUT_UE0D65_IN      _UE0D6.Bits.UE0D65_OUT_UE0D65_IN
#define UE0D6_UE0D66_OUT_UE0D66_IN      _UE0D6.Bits.UE0D66_OUT_UE0D66_IN
#define UE0D6_UE0D67_OUT_UE0D67_IN      _UE0D6.Bits.UE0D67_OUT_UE0D67_IN

#define UE0D6_UE0D60_OUT_UE0D60_IN_MASK 1
#define UE0D6_UE0D61_OUT_UE0D61_IN_MASK 2
#define UE0D6_UE0D62_OUT_UE0D62_IN_MASK 4
#define UE0D6_UE0D63_OUT_UE0D63_IN_MASK 8
#define UE0D6_UE0D64_OUT_UE0D64_IN_MASK 16
#define UE0D6_UE0D65_OUT_UE0D65_IN_MASK 32
#define UE0D6_UE0D66_OUT_UE0D66_IN_MASK 64
#define UE0D6_UE0D67_OUT_UE0D67_IN_MASK 128


/*** UE0D7 - USB Endpoint 0 Data Register 7; 0x00000047 ***/
typedef union {
  byte Byte;
  struct {
    byte UE0D70_OUT_UE0D70_IN :1;                              /* Endpoint 0 Transmit Data Buffer 7 Bit 0, Endpoint 0 Receive Data Buffer 7 Bit 0 */
    byte UE0D71_OUT_UE0D71_IN :1;                              /* Endpoint 0 Transmit Data Buffer 7 Bit 1, Endpoint 0 Receive Data Buffer 7 Bit 1 */
    byte UE0D72_OUT_UE0D72_IN :1;                              /* Endpoint 0 Transmit Data Buffer 7 Bit 2, Endpoint 0 Receive Data Buffer 7 Bit 2 */
    byte UE0D73_OUT_UE0D73_IN :1;                              /* Endpoint 0 Transmit Data Buffer 7 Bit 3, Endpoint 0 Receive Data Buffer 7 Bit 3 */
    byte UE0D74_OUT_UE0D74_IN :1;                              /* Endpoint 0 Transmit Data Buffer 7 Bit 4, Endpoint 0 Receive Data Buffer 7 Bit 4 */
    byte UE0D75_OUT_UE0D75_IN :1;                              /* Endpoint 0 Transmit Data Buffer 7 Bit 5, Endpoint 0 Receive Data Buffer 7 Bit 5 */
    byte UE0D76_OUT_UE0D76_IN :1;                              /* Endpoint 0 Transmit Data Buffer 7 Bit 6, Endpoint 0 Receive Data Buffer 7 Bit 6 */
    byte UE0D77_OUT_UE0D77_IN :1;                              /* Endpoint 0 Transmit Data Buffer 7 Bit 7, Endpoint 0 Receive Data Buffer 7 Bit 7 */
  } Bits;
} UE0D7STR;
extern volatile UE0D7STR _UE0D7;
#define UE0D7                           _UE0D7.Byte
#define UE0D7_UE0D70_OUT_UE0D70_IN      _UE0D7.Bits.UE0D70_OUT_UE0D70_IN
#define UE0D7_UE0D71_OUT_UE0D71_IN      _UE0D7.Bits.UE0D71_OUT_UE0D71_IN
#define UE0D7_UE0D72_OUT_UE0D72_IN      _UE0D7.Bits.UE0D72_OUT_UE0D72_IN
#define UE0D7_UE0D73_OUT_UE0D73_IN      _UE0D7.Bits.UE0D73_OUT_UE0D73_IN
#define UE0D7_UE0D74_OUT_UE0D74_IN      _UE0D7.Bits.UE0D74_OUT_UE0D74_IN
#define UE0D7_UE0D75_OUT_UE0D75_IN      _UE0D7.Bits.UE0D75_OUT_UE0D75_IN
#define UE0D7_UE0D76_OUT_UE0D76_IN      _UE0D7.Bits.UE0D76_OUT_UE0D76_IN
#define UE0D7_UE0D77_OUT_UE0D77_IN      _UE0D7.Bits.UE0D77_OUT_UE0D77_IN

#define UE0D7_UE0D70_OUT_UE0D70_IN_MASK 1
#define UE0D7_UE0D71_OUT_UE0D71_IN_MASK 2
#define UE0D7_UE0D72_OUT_UE0D72_IN_MASK 4
#define UE0D7_UE0D73_OUT_UE0D73_IN_MASK 8
#define UE0D7_UE0D74_OUT_UE0D74_IN_MASK 16
#define UE0D7_UE0D75_OUT_UE0D75_IN_MASK 32
#define UE0D7_UE0D76_OUT_UE0D76_IN_MASK 64
#define UE0D7_UE0D77_OUT_UE0D77_IN_MASK 128


/*** SPCR - SPI Control Register; 0x0000004C ***/
typedef union {
  byte Byte;
  struct {
    byte SPTIE       :1;                                       /* SPI Transmit Interrupt Enable Bit */
    byte SPE         :1;                                       /* SPI Enable Bit */
    byte SPWOM       :1;                                       /* SPI Wired-OR Mode Bit */
    byte CPHA        :1;                                       /* Clock Phase Bit */
    byte CPOL        :1;                                       /* Clock Polarity Bit */
    byte SPMSTR      :1;                                       /* SPI Master Bit */
    byte             :1; 
    byte SPRIE       :1;                                       /* SPI Receiver Interrupt Enable Bit */
  } Bits;
} SPCRSTR;
extern volatile SPCRSTR _SPCR;
#define SPCR                            _SPCR.Byte
#define SPCR_SPTIE                      _SPCR.Bits.SPTIE
#define SPCR_SPE                        _SPCR.Bits.SPE
#define SPCR_SPWOM                      _SPCR.Bits.SPWOM
#define SPCR_CPHA                       _SPCR.Bits.CPHA
#define SPCR_CPOL                       _SPCR.Bits.CPOL
#define SPCR_SPMSTR                     _SPCR.Bits.SPMSTR
#define SPCR_SPRIE                      _SPCR.Bits.SPRIE

#define SPCR_SPTIE_MASK                 1
#define SPCR_SPE_MASK                   2
#define SPCR_SPWOM_MASK                 4
#define SPCR_CPHA_MASK                  8
#define SPCR_CPOL_MASK                  16
#define SPCR_SPMSTR_MASK                32
#define SPCR_SPRIE_MASK                 128


/*** SPSCR - SPI Status and Control Register; 0x0000004D ***/
typedef union {
  byte Byte;
  struct {
    byte SPR0        :1;                                       /* SPI Baud Rate Select Bit 0 */
    byte SPR1        :1;                                       /* SPI Baud Rate Select Bit 1 */
    byte MODFEN      :1;                                       /* Mode Fault Enable Bit */
    byte SPTE        :1;                                       /* SPI Transmitter Empty Bit */
    byte MODF        :1;                                       /* Mode Fault Bit */
    byte OVRF        :1;                                       /* Overflow Bit */
    byte ERRIE       :1;                                       /* Error Interrupt Enable Bit */
    byte SPRF        :1;                                       /* SPI Receiver Full Bit */
  } Bits;
  struct {
    byte grpSPR  :2;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} SPSCRSTR;
extern volatile SPSCRSTR _SPSCR;
#define SPSCR                           _SPSCR.Byte
#define SPSCR_SPR0                      _SPSCR.Bits.SPR0
#define SPSCR_SPR1                      _SPSCR.Bits.SPR1
#define SPSCR_MODFEN                    _SPSCR.Bits.MODFEN
#define SPSCR_SPTE                      _SPSCR.Bits.SPTE
#define SPSCR_MODF                      _SPSCR.Bits.MODF
#define SPSCR_OVRF                      _SPSCR.Bits.OVRF
#define SPSCR_ERRIE                     _SPSCR.Bits.ERRIE
#define SPSCR_SPRF                      _SPSCR.Bits.SPRF
#define SPSCR_SPR                       _SPSCR.MergedBits.grpSPR

#define SPSCR_SPR0_MASK                 1
#define SPSCR_SPR1_MASK                 2
#define SPSCR_MODFEN_MASK               4
#define SPSCR_SPTE_MASK                 8
#define SPSCR_MODF_MASK                 16
#define SPSCR_OVRF_MASK                 32
#define SPSCR_ERRIE_MASK                64
#define SPSCR_SPRF_MASK                 128
#define SPSCR_SPR_MASK                  3
#define SPSCR_SPR_BITNUM                0


/*** SPDR - SPI Data Register; 0x0000004E ***/
typedef union {
  byte Byte;
  struct {
    byte R0_T0       :1;                                       /* Receive/Transmit Data Bit 0 */
    byte R1_T1       :1;                                       /* Receive/Transmit Data Bit 1 */
    byte R2_T2       :1;                                       /* Receive/Transmit Data Bit 2 */
    byte R3_T3       :1;                                       /* Receive/Transmit Data Bit 3 */
    byte R4_T4       :1;                                       /* Receive/Transmit Data Bit 4 */
    byte R5_T5       :1;                                       /* Receive/Transmit Data Bit 5 */
    byte R6_T6       :1;                                       /* Receive/Transmit Data Bit 6 */
    byte R7_T7       :1;                                       /* Receive/Transmit Data Bit 7 */
  } Bits;
} SPDRSTR;
extern volatile SPDRSTR _SPDR;
#define SPDR                            _SPDR.Byte
#define SPDR_R0_T0                      _SPDR.Bits.R0_T0
#define SPDR_R1_T1                      _SPDR.Bits.R1_T1
#define SPDR_R2_T2                      _SPDR.Bits.R2_T2
#define SPDR_R3_T3                      _SPDR.Bits.R3_T3
#define SPDR_R4_T4                      _SPDR.Bits.R4_T4
#define SPDR_R5_T5                      _SPDR.Bits.R5_T5
#define SPDR_R6_T6                      _SPDR.Bits.R6_T6
#define SPDR_R7_T7                      _SPDR.Bits.R7_T7

#define SPDR_R0_T0_MASK                 1
#define SPDR_R1_T1_MASK                 2
#define SPDR_R2_T2_MASK                 4
#define SPDR_R3_T3_MASK                 8
#define SPDR_R4_T4_MASK                 16
#define SPDR_R5_T5_MASK                 32
#define SPDR_R6_T6_MASK                 64
#define SPDR_R7_T7_MASK                 128


/*** USBCR - USB Control Register; 0x00000051 ***/
typedef union {
  byte Byte;
  struct {
    byte RESUME      :1;                                       /* Force RESUME condition */
    byte TFC0IE      :1;                                       /* Transfer complete interrupt enable for endpoint 0 */
    byte TFC1IE      :1;                                       /* Transfer complete interrupt enable for endpoint 1 */
    byte TFC2IE      :1;                                       /* Transfer complete interrupt enable for endpoint 2 */
    byte TFC3IE      :1;                                       /* Transfer complete interrupt enable for endpoint 3 */
    byte TFC4IE      :1;                                       /* Transfer complete interrupt enable for endpoint 4 */
    byte USBCLKEN    :1;                                       /* USB Clock Enable */
    byte USBEN       :1;                                       /* USB Module Enable */
  } Bits;
} USBCRSTR;
extern volatile USBCRSTR _USBCR;
#define USBCR                           _USBCR.Byte
#define USBCR_RESUME                    _USBCR.Bits.RESUME
#define USBCR_TFC0IE                    _USBCR.Bits.TFC0IE
#define USBCR_TFC1IE                    _USBCR.Bits.TFC1IE
#define USBCR_TFC2IE                    _USBCR.Bits.TFC2IE
#define USBCR_TFC3IE                    _USBCR.Bits.TFC3IE
#define USBCR_TFC4IE                    _USBCR.Bits.TFC4IE
#define USBCR_USBCLKEN                  _USBCR.Bits.USBCLKEN
#define USBCR_USBEN                     _USBCR.Bits.USBEN

#define USBCR_RESUME_MASK               1
#define USBCR_TFC0IE_MASK               2
#define USBCR_TFC1IE_MASK               4
#define USBCR_TFC2IE_MASK               8
#define USBCR_TFC3IE_MASK               16
#define USBCR_TFC4IE_MASK               32
#define USBCR_USBCLKEN_MASK             64
#define USBCR_USBEN_MASK                128


/*** USBSR - USB Status Register; 0x00000052 ***/
typedef union {
  byte Byte;
  struct {
    byte SUSPND      :1;                                       /* SUSPEND Detection Flag */
    byte RESUMEF     :1;                                       /* RESUME Detection Flag */
    byte USBRST      :1;                                       /* USB Reset Detection Flag */
    byte CONFIG_CHG  :1;                                       /* Change of Configuration Detection Flag */
    byte SOF         :1;                                       /* Start of Frame Detection Flag */
    byte SETUP       :1;                                       /* SETUP Request Received */
    byte             :1; 
    byte CONFIG      :1;                                       /* Configuration Number */
  } Bits;
} USBSRSTR;
extern volatile USBSRSTR _USBSR;
#define USBSR                           _USBSR.Byte
#define USBSR_SUSPND                    _USBSR.Bits.SUSPND
#define USBSR_RESUMEF                   _USBSR.Bits.RESUMEF
#define USBSR_USBRST                    _USBSR.Bits.USBRST
#define USBSR_CONFIG_CHG                _USBSR.Bits.CONFIG_CHG
#define USBSR_SOF                       _USBSR.Bits.SOF
#define USBSR_SETUP                     _USBSR.Bits.SETUP
#define USBSR_CONFIG                    _USBSR.Bits.CONFIG

#define USBSR_SUSPND_MASK               1
#define USBSR_RESUMEF_MASK              2
#define USBSR_USBRST_MASK               4
#define USBSR_CONFIG_CHG_MASK           8
#define USBSR_SOF_MASK                  16
#define USBSR_SETUP_MASK                32
#define USBSR_CONFIG_MASK               128


/*** USIMR - USB Status Interrupt Mask Register; 0x00000053 ***/
typedef union {
  byte Byte;
  struct {
    byte SUSPNDIE    :1;                                       /* Suspend Mode Interrupt Mask */
    byte RESUMEFIE   :1;                                       /* Resume Interrupt Mask */
    byte USBRESETIE  :1;                                       /* USB RESET Interrupt Mask */
    byte CONFIG_CHGIE :1;                                      /* Configuration Change Interrupt Mask */
    byte SOFIE       :1;                                       /* Start-of-frame Interrupt Mask */
    byte SETUPIE     :1;                                       /* SETUP Request Interrupt Mask */
    byte EP0_STALL   :1;                                       /* Forced EP0 STALL Handshake Enable */
    byte             :1; 
  } Bits;
} USIMRSTR;
extern volatile USIMRSTR _USIMR;
#define USIMR                           _USIMR.Byte
#define USIMR_SUSPNDIE                  _USIMR.Bits.SUSPNDIE
#define USIMR_RESUMEFIE                 _USIMR.Bits.RESUMEFIE
#define USIMR_USBRESETIE                _USIMR.Bits.USBRESETIE
#define USIMR_CONFIG_CHGIE              _USIMR.Bits.CONFIG_CHGIE
#define USIMR_SOFIE                     _USIMR.Bits.SOFIE
#define USIMR_SETUPIE                   _USIMR.Bits.SETUPIE
#define USIMR_EP0_STALL                 _USIMR.Bits.EP0_STALL

#define USIMR_SUSPNDIE_MASK             1
#define USIMR_RESUMEFIE_MASK            2
#define USIMR_USBRESETIE_MASK           4
#define USIMR_CONFIG_CHGIE_MASK         8
#define USIMR_SOFIE_MASK                16
#define USIMR_SETUPIE_MASK              32
#define USIMR_EP0_STALL_MASK            64


/*** UEP0CSR - USB Endpoint 0 Control/Status Register; 0x00000054 ***/
typedef union {
  byte Byte;
  struct {
    byte TFRC_OUT    :1;                                       /* Transfer Complete Flag for OUT packet */
    byte DVALID_OUT  :1;                                       /* Data valid enable bit for OUT packet */
    byte TFRC_IN     :1;                                       /* Transfer Complete Flag for IN packet */
    byte DVALID_IN   :1;                                       /* Data valid enable bit for IN packet */
    byte DSIZE0_OUT_DSIZE0_IN :1;                              /* Endpoint 0 Data Size for OUT packet, Endpoint 0 Data Size for IN packet, Bit 0 */
    byte DSIZE1_OUT_DSIZE1_IN :1;                              /* Endpoint 0 Data Size for OUT packet, Endpoint 0 Data Size for IN packet, Bit 1 */
    byte DSIZE2_OUT_DSIZE2_IN :1;                              /* Endpoint 0 Data Size for OUT packet, Endpoint 0 Data Size for IN packet, Bit 2 */
    byte DSIZE3_OUT_DSIZE3_IN :1;                              /* Endpoint 0 Data Size for OUT packet, Endpoint 0 Data Size for IN packet, Bit 3 */
  } Bits;
} UEP0CSRSTR;
extern volatile UEP0CSRSTR _UEP0CSR;
#define UEP0CSR                         _UEP0CSR.Byte
#define UEP0CSR_TFRC_OUT                _UEP0CSR.Bits.TFRC_OUT
#define UEP0CSR_DVALID_OUT              _UEP0CSR.Bits.DVALID_OUT
#define UEP0CSR_TFRC_IN                 _UEP0CSR.Bits.TFRC_IN
#define UEP0CSR_DVALID_IN               _UEP0CSR.Bits.DVALID_IN
#define UEP0CSR_DSIZE0_OUT_DSIZE0_IN    _UEP0CSR.Bits.DSIZE0_OUT_DSIZE0_IN
#define UEP0CSR_DSIZE1_OUT_DSIZE1_IN    _UEP0CSR.Bits.DSIZE1_OUT_DSIZE1_IN
#define UEP0CSR_DSIZE2_OUT_DSIZE2_IN    _UEP0CSR.Bits.DSIZE2_OUT_DSIZE2_IN
#define UEP0CSR_DSIZE3_OUT_DSIZE3_IN    _UEP0CSR.Bits.DSIZE3_OUT_DSIZE3_IN

#define UEP0CSR_TFRC_OUT_MASK           1
#define UEP0CSR_DVALID_OUT_MASK         2
#define UEP0CSR_TFRC_IN_MASK            4
#define UEP0CSR_DVALID_IN_MASK          8
#define UEP0CSR_DSIZE0_OUT_DSIZE0_IN_MASK 16
#define UEP0CSR_DSIZE1_OUT_DSIZE1_IN_MASK 32
#define UEP0CSR_DSIZE2_OUT_DSIZE2_IN_MASK 64
#define UEP0CSR_DSIZE3_OUT_DSIZE3_IN_MASK 128


/*** UEP1CSR - USB Endpoint 1 Control/Status Register; 0x00000055 ***/
typedef union {
  byte Byte;
  struct {
    byte TFRC        :1;                                       /* Transfer Complete Flag */
    byte DVALID      :1;                                       /* Data valid bit */
    byte SIZE0       :1;                                       /* Buffer size Selection bit 0 */
    byte SIZE1       :1;                                       /* Buffer size Selection bit 1 */
    byte DIR         :1;                                       /* Endpoint Direction Bit */
    byte STALL       :1;                                       /* Forced STALL Handshake Enable */
    byte MODE0       :1;                                       /* Endpoint Type selection bit 0 */
    byte MODE1       :1;                                       /* Endpoint Type selection bit 1 */
  } Bits;
  struct {
    byte         :1;
    byte         :1;
    byte grpSIZE :2;
    byte         :1;
    byte         :1;
    byte grpMODE :2;
  } MergedBits;
} UEP1CSRSTR;
extern volatile UEP1CSRSTR _UEP1CSR;
#define UEP1CSR                         _UEP1CSR.Byte
#define UEP1CSR_TFRC                    _UEP1CSR.Bits.TFRC
#define UEP1CSR_DVALID                  _UEP1CSR.Bits.DVALID
#define UEP1CSR_SIZE0                   _UEP1CSR.Bits.SIZE0
#define UEP1CSR_SIZE1                   _UEP1CSR.Bits.SIZE1
#define UEP1CSR_DIR                     _UEP1CSR.Bits.DIR
#define UEP1CSR_STALL                   _UEP1CSR.Bits.STALL
#define UEP1CSR_MODE0                   _UEP1CSR.Bits.MODE0
#define UEP1CSR_MODE1                   _UEP1CSR.Bits.MODE1
#define UEP1CSR_SIZE                    _UEP1CSR.MergedBits.grpSIZE
#define UEP1CSR_MODE                    _UEP1CSR.MergedBits.grpMODE

#define UEP1CSR_TFRC_MASK               1
#define UEP1CSR_DVALID_MASK             2
#define UEP1CSR_SIZE0_MASK              4
#define UEP1CSR_SIZE1_MASK              8
#define UEP1CSR_DIR_MASK                16
#define UEP1CSR_STALL_MASK              32
#define UEP1CSR_MODE0_MASK              64
#define UEP1CSR_MODE1_MASK              128
#define UEP1CSR_SIZE_MASK               12
#define UEP1CSR_SIZE_BITNUM             2
#define UEP1CSR_MODE_MASK               192
#define UEP1CSR_MODE_BITNUM             6


/*** UEP2CSR - USB Endpoint 2 Control/Status Register; 0x00000056 ***/
typedef union {
  byte Byte;
  struct {
    byte TFRC        :1;                                       /* Transfer Complete Flag */
    byte DVALID      :1;                                       /* Data valid bit */
    byte SIZE0       :1;                                       /* Buffer size Selection bit 0 */
    byte SIZE1       :1;                                       /* Buffer size Selection bit 1 */
    byte DIR         :1;                                       /* Endpoint Direction Bit */
    byte STALL       :1;                                       /* Forced STALL Handshake Enable */
    byte MODE0       :1;                                       /* Endpoint Type selection bit 0 */
    byte MODE1       :1;                                       /* Endpoint Type selection bit 1 */
  } Bits;
  struct {
    byte         :1;
    byte         :1;
    byte grpSIZE :2;
    byte         :1;
    byte         :1;
    byte grpMODE :2;
  } MergedBits;
} UEP2CSRSTR;
extern volatile UEP2CSRSTR _UEP2CSR;
#define UEP2CSR                         _UEP2CSR.Byte
#define UEP2CSR_TFRC                    _UEP2CSR.Bits.TFRC
#define UEP2CSR_DVALID                  _UEP2CSR.Bits.DVALID
#define UEP2CSR_SIZE0                   _UEP2CSR.Bits.SIZE0
#define UEP2CSR_SIZE1                   _UEP2CSR.Bits.SIZE1
#define UEP2CSR_DIR                     _UEP2CSR.Bits.DIR
#define UEP2CSR_STALL                   _UEP2CSR.Bits.STALL
#define UEP2CSR_MODE0                   _UEP2CSR.Bits.MODE0
#define UEP2CSR_MODE1                   _UEP2CSR.Bits.MODE1
#define UEP2CSR_SIZE                    _UEP2CSR.MergedBits.grpSIZE
#define UEP2CSR_MODE                    _UEP2CSR.MergedBits.grpMODE

#define UEP2CSR_TFRC_MASK               1
#define UEP2CSR_DVALID_MASK             2
#define UEP2CSR_SIZE0_MASK              4
#define UEP2CSR_SIZE1_MASK              8
#define UEP2CSR_DIR_MASK                16
#define UEP2CSR_STALL_MASK              32
#define UEP2CSR_MODE0_MASK              64
#define UEP2CSR_MODE1_MASK              128
#define UEP2CSR_SIZE_MASK               12
#define UEP2CSR_SIZE_BITNUM             2
#define UEP2CSR_MODE_MASK               192
#define UEP2CSR_MODE_BITNUM             6


/*** UEP3CSR - USB Endpoint 3 Control/Status Register; 0x00000057 ***/
typedef union {
  byte Byte;
  struct {
    byte TFRC        :1;                                       /* Transfer Complete Flag */
    byte DVALID      :1;                                       /* Data valid bit */
    byte SIZE0       :1;                                       /* Buffer size Selection bit 0 */
    byte SIZE1       :1;                                       /* Buffer size Selection bit 1 */
    byte DIR         :1;                                       /* Endpoint Direction Bit */
    byte STALL       :1;                                       /* Forced STALL Handshake Enable */
    byte MODE0       :1;                                       /* Endpoint Type selection bit 0 */
    byte MODE1       :1;                                       /* Endpoint Type selection bit 1 */
  } Bits;
  struct {
    byte         :1;
    byte         :1;
    byte grpSIZE :2;
    byte         :1;
    byte         :1;
    byte grpMODE :2;
  } MergedBits;
} UEP3CSRSTR;
extern volatile UEP3CSRSTR _UEP3CSR;
#define UEP3CSR                         _UEP3CSR.Byte
#define UEP3CSR_TFRC                    _UEP3CSR.Bits.TFRC
#define UEP3CSR_DVALID                  _UEP3CSR.Bits.DVALID
#define UEP3CSR_SIZE0                   _UEP3CSR.Bits.SIZE0
#define UEP3CSR_SIZE1                   _UEP3CSR.Bits.SIZE1
#define UEP3CSR_DIR                     _UEP3CSR.Bits.DIR
#define UEP3CSR_STALL                   _UEP3CSR.Bits.STALL
#define UEP3CSR_MODE0                   _UEP3CSR.Bits.MODE0
#define UEP3CSR_MODE1                   _UEP3CSR.Bits.MODE1
#define UEP3CSR_SIZE                    _UEP3CSR.MergedBits.grpSIZE
#define UEP3CSR_MODE                    _UEP3CSR.MergedBits.grpMODE

#define UEP3CSR_TFRC_MASK               1
#define UEP3CSR_DVALID_MASK             2
#define UEP3CSR_SIZE0_MASK              4
#define UEP3CSR_SIZE1_MASK              8
#define UEP3CSR_DIR_MASK                16
#define UEP3CSR_STALL_MASK              32
#define UEP3CSR_MODE0_MASK              64
#define UEP3CSR_MODE1_MASK              128
#define UEP3CSR_SIZE_MASK               12
#define UEP3CSR_SIZE_BITNUM             2
#define UEP3CSR_MODE_MASK               192
#define UEP3CSR_MODE_BITNUM             6


/*** UEP4CSR - USB Endpoint 4 Control/Status Register; 0x00000058 ***/
typedef union {
  byte Byte;
  struct {
    byte TFRC        :1;                                       /* Transfer Complete Flag */
    byte DVALID      :1;                                       /* Data valid bit */
    byte SIZE0       :1;                                       /* Buffer size Selection bit 0 */
    byte SIZE1       :1;                                       /* Buffer size Selection bit 1 */
    byte DIR         :1;                                       /* Endpoint Direction Bit */
    byte STALL       :1;                                       /* Forced STALL Handshake Enable */
    byte MODE0       :1;                                       /* Endpoint Type selection bit 0 */
    byte MODE1       :1;                                       /* Endpoint Type selection bit 1 */
  } Bits;
  struct {
    byte         :1;
    byte         :1;
    byte grpSIZE :2;
    byte         :1;
    byte         :1;
    byte grpMODE :2;
  } MergedBits;
} UEP4CSRSTR;
extern volatile UEP4CSRSTR _UEP4CSR;
#define UEP4CSR                         _UEP4CSR.Byte
#define UEP4CSR_TFRC                    _UEP4CSR.Bits.TFRC
#define UEP4CSR_DVALID                  _UEP4CSR.Bits.DVALID
#define UEP4CSR_SIZE0                   _UEP4CSR.Bits.SIZE0
#define UEP4CSR_SIZE1                   _UEP4CSR.Bits.SIZE1
#define UEP4CSR_DIR                     _UEP4CSR.Bits.DIR
#define UEP4CSR_STALL                   _UEP4CSR.Bits.STALL
#define UEP4CSR_MODE0                   _UEP4CSR.Bits.MODE0
#define UEP4CSR_MODE1                   _UEP4CSR.Bits.MODE1
#define UEP4CSR_SIZE                    _UEP4CSR.MergedBits.grpSIZE
#define UEP4CSR_MODE                    _UEP4CSR.MergedBits.grpMODE

#define UEP4CSR_TFRC_MASK               1
#define UEP4CSR_DVALID_MASK             2
#define UEP4CSR_SIZE0_MASK              4
#define UEP4CSR_SIZE1_MASK              8
#define UEP4CSR_DIR_MASK                16
#define UEP4CSR_STALL_MASK              32
#define UEP4CSR_MODE0_MASK              64
#define UEP4CSR_MODE1_MASK              128
#define UEP4CSR_SIZE_MASK               12
#define UEP4CSR_SIZE_BITNUM             2
#define UEP4CSR_MODE_MASK               192
#define UEP4CSR_MODE_BITNUM             6


/*** UEP1DSR - USB Endpoint 1 Data Size Register; 0x00000059 ***/
typedef union {
  byte Byte;
  struct {
    byte DSIZE0      :1;                                       /* Packet Data Size Bit 0 */
    byte DSIZE1      :1;                                       /* Packet Data Size Bit 1 */
    byte DSIZE2      :1;                                       /* Packet Data Size Bit 2 */
    byte DSIZE3      :1;                                       /* Packet Data Size Bit 3 */
    byte DSIZE4      :1;                                       /* Packet Data Size Bit 4 */
    byte DSIZE5      :1;                                       /* Packet Data Size Bit 5 */
    byte DSIZE6      :1;                                       /* Packet Data Size Bit 6 */
    byte             :1; 
  } Bits;
  struct {
    byte grpDSIZE :7;
    byte         :1;
  } MergedBits;
} UEP1DSRSTR;
extern volatile UEP1DSRSTR _UEP1DSR;
#define UEP1DSR                         _UEP1DSR.Byte
#define UEP1DSR_DSIZE0                  _UEP1DSR.Bits.DSIZE0
#define UEP1DSR_DSIZE1                  _UEP1DSR.Bits.DSIZE1
#define UEP1DSR_DSIZE2                  _UEP1DSR.Bits.DSIZE2
#define UEP1DSR_DSIZE3                  _UEP1DSR.Bits.DSIZE3
#define UEP1DSR_DSIZE4                  _UEP1DSR.Bits.DSIZE4
#define UEP1DSR_DSIZE5                  _UEP1DSR.Bits.DSIZE5
#define UEP1DSR_DSIZE6                  _UEP1DSR.Bits.DSIZE6
#define UEP1DSR_DSIZE                   _UEP1DSR.MergedBits.grpDSIZE

#define UEP1DSR_DSIZE0_MASK             1
#define UEP1DSR_DSIZE1_MASK             2
#define UEP1DSR_DSIZE2_MASK             4
#define UEP1DSR_DSIZE3_MASK             8
#define UEP1DSR_DSIZE4_MASK             16
#define UEP1DSR_DSIZE5_MASK             32
#define UEP1DSR_DSIZE6_MASK             64
#define UEP1DSR_DSIZE_MASK              127
#define UEP1DSR_DSIZE_BITNUM            0


/*** UEP2DSR - USB Endpoint 2 Data Size Register; 0x0000005A ***/
typedef union {
  byte Byte;
  struct {
    byte DSIZE0      :1;                                       /* Packet Data Size Bit 0 */
    byte DSIZE1      :1;                                       /* Packet Data Size Bit 1 */
    byte DSIZE2      :1;                                       /* Packet Data Size Bit 2 */
    byte DSIZE3      :1;                                       /* Packet Data Size Bit 3 */
    byte DSIZE4      :1;                                       /* Packet Data Size Bit 4 */
    byte DSIZE5      :1;                                       /* Packet Data Size Bit 5 */
    byte DSIZE6      :1;                                       /* Packet Data Size Bit 6 */
    byte             :1; 
  } Bits;
  struct {
    byte grpDSIZE :7;
    byte         :1;
  } MergedBits;
} UEP2DSRSTR;
extern volatile UEP2DSRSTR _UEP2DSR;
#define UEP2DSR                         _UEP2DSR.Byte
#define UEP2DSR_DSIZE0                  _UEP2DSR.Bits.DSIZE0
#define UEP2DSR_DSIZE1                  _UEP2DSR.Bits.DSIZE1
#define UEP2DSR_DSIZE2                  _UEP2DSR.Bits.DSIZE2
#define UEP2DSR_DSIZE3                  _UEP2DSR.Bits.DSIZE3
#define UEP2DSR_DSIZE4                  _UEP2DSR.Bits.DSIZE4
#define UEP2DSR_DSIZE5                  _UEP2DSR.Bits.DSIZE5
#define UEP2DSR_DSIZE6                  _UEP2DSR.Bits.DSIZE6
#define UEP2DSR_DSIZE                   _UEP2DSR.MergedBits.grpDSIZE

#define UEP2DSR_DSIZE0_MASK             1
#define UEP2DSR_DSIZE1_MASK             2
#define UEP2DSR_DSIZE2_MASK             4
#define UEP2DSR_DSIZE3_MASK             8
#define UEP2DSR_DSIZE4_MASK             16
#define UEP2DSR_DSIZE5_MASK             32
#define UEP2DSR_DSIZE6_MASK             64
#define UEP2DSR_DSIZE_MASK              127
#define UEP2DSR_DSIZE_BITNUM            0


/*** UEP3DSR - USB Endpoint 3 Data Size Register; 0x0000005B ***/
typedef union {
  byte Byte;
  struct {
    byte DSIZE0      :1;                                       /* Packet Data Size Bit 0 */
    byte DSIZE1      :1;                                       /* Packet Data Size Bit 1 */
    byte DSIZE2      :1;                                       /* Packet Data Size Bit 2 */
    byte DSIZE3      :1;                                       /* Packet Data Size Bit 3 */
    byte DSIZE4      :1;                                       /* Packet Data Size Bit 4 */
    byte DSIZE5      :1;                                       /* Packet Data Size Bit 5 */
    byte DSIZE6      :1;                                       /* Packet Data Size Bit 6 */
    byte             :1; 
  } Bits;
  struct {
    byte grpDSIZE :7;
    byte         :1;
  } MergedBits;
} UEP3DSRSTR;
extern volatile UEP3DSRSTR _UEP3DSR;
#define UEP3DSR                         _UEP3DSR.Byte
#define UEP3DSR_DSIZE0                  _UEP3DSR.Bits.DSIZE0
#define UEP3DSR_DSIZE1                  _UEP3DSR.Bits.DSIZE1
#define UEP3DSR_DSIZE2                  _UEP3DSR.Bits.DSIZE2
#define UEP3DSR_DSIZE3                  _UEP3DSR.Bits.DSIZE3
#define UEP3DSR_DSIZE4                  _UEP3DSR.Bits.DSIZE4
#define UEP3DSR_DSIZE5                  _UEP3DSR.Bits.DSIZE5
#define UEP3DSR_DSIZE6                  _UEP3DSR.Bits.DSIZE6
#define UEP3DSR_DSIZE                   _UEP3DSR.MergedBits.grpDSIZE

#define UEP3DSR_DSIZE0_MASK             1
#define UEP3DSR_DSIZE1_MASK             2
#define UEP3DSR_DSIZE2_MASK             4
#define UEP3DSR_DSIZE3_MASK             8
#define UEP3DSR_DSIZE4_MASK             16
#define UEP3DSR_DSIZE5_MASK             32
#define UEP3DSR_DSIZE6_MASK             64
#define UEP3DSR_DSIZE_MASK              127
#define UEP3DSR_DSIZE_BITNUM            0


/*** UEP4DSR - USB Endpoint 4 Data Size Register; 0x0000005C ***/
typedef union {
  byte Byte;
  struct {
    byte DSIZE0      :1;                                       /* Packet Data Size Bit 0 */
    byte DSIZE1      :1;                                       /* Packet Data Size Bit 1 */
    byte DSIZE2      :1;                                       /* Packet Data Size Bit 2 */
    byte DSIZE3      :1;                                       /* Packet Data Size Bit 3 */
    byte DSIZE4      :1;                                       /* Packet Data Size Bit 4 */
    byte DSIZE5      :1;                                       /* Packet Data Size Bit 5 */
    byte DSIZE6      :1;                                       /* Packet Data Size Bit 6 */
    byte             :1; 
  } Bits;
  struct {
    byte grpDSIZE :7;
    byte         :1;
  } MergedBits;
} UEP4DSRSTR;
extern volatile UEP4DSRSTR _UEP4DSR;
#define UEP4DSR                         _UEP4DSR.Byte
#define UEP4DSR_DSIZE0                  _UEP4DSR.Bits.DSIZE0
#define UEP4DSR_DSIZE1                  _UEP4DSR.Bits.DSIZE1
#define UEP4DSR_DSIZE2                  _UEP4DSR.Bits.DSIZE2
#define UEP4DSR_DSIZE3                  _UEP4DSR.Bits.DSIZE3
#define UEP4DSR_DSIZE4                  _UEP4DSR.Bits.DSIZE4
#define UEP4DSR_DSIZE5                  _UEP4DSR.Bits.DSIZE5
#define UEP4DSR_DSIZE6                  _UEP4DSR.Bits.DSIZE6
#define UEP4DSR_DSIZE                   _UEP4DSR.MergedBits.grpDSIZE

#define UEP4DSR_DSIZE0_MASK             1
#define UEP4DSR_DSIZE1_MASK             2
#define UEP4DSR_DSIZE2_MASK             4
#define UEP4DSR_DSIZE3_MASK             8
#define UEP4DSR_DSIZE4_MASK             16
#define UEP4DSR_DSIZE5_MASK             32
#define UEP4DSR_DSIZE6_MASK             64
#define UEP4DSR_DSIZE_MASK              127
#define UEP4DSR_DSIZE_BITNUM            0


/*** UEP12BPR - USB Endpoint 1/2 Base Pointer Register; 0x0000005D ***/
typedef union {
  byte Byte;
  struct {
    byte BASE10      :1;                                       /* Base Location Pointer 1 Bit 0 */
    byte BASE11      :1;                                       /* Base Location Pointer 1 Bit 1 */
    byte BASE12      :1;                                       /* Base Location Pointer 1 Bit 2 */
    byte             :1; 
    byte BASE20      :1;                                       /* Base Location Pointer 2 Bit 0 */
    byte BASE21      :1;                                       /* Base Location Pointer 2 Bit 1 */
    byte BASE22      :1;                                       /* Base Location Pointer 2 Bit 2 */
    byte             :1; 
  } Bits;
  struct {
    byte grpBASE_10 :3;
    byte         :1;
    byte grpBASE_20 :3;
    byte         :1;
  } MergedBits;
} UEP12BPRSTR;
extern volatile UEP12BPRSTR _UEP12BPR;
#define UEP12BPR                        _UEP12BPR.Byte
#define UEP12BPR_BASE10                 _UEP12BPR.Bits.BASE10
#define UEP12BPR_BASE11                 _UEP12BPR.Bits.BASE11
#define UEP12BPR_BASE12                 _UEP12BPR.Bits.BASE12
#define UEP12BPR_BASE20                 _UEP12BPR.Bits.BASE20
#define UEP12BPR_BASE21                 _UEP12BPR.Bits.BASE21
#define UEP12BPR_BASE22                 _UEP12BPR.Bits.BASE22
#define UEP12BPR_BASE_10                _UEP12BPR.MergedBits.grpBASE_10
#define UEP12BPR_BASE_20                _UEP12BPR.MergedBits.grpBASE_20
#define UEP12BPR_BASE                   UEP12BPR_BASE_10

#define UEP12BPR_BASE10_MASK            1
#define UEP12BPR_BASE11_MASK            2
#define UEP12BPR_BASE12_MASK            4
#define UEP12BPR_BASE20_MASK            16
#define UEP12BPR_BASE21_MASK            32
#define UEP12BPR_BASE22_MASK            64
#define UEP12BPR_BASE_10_MASK           7
#define UEP12BPR_BASE_10_BITNUM         0
#define UEP12BPR_BASE_20_MASK           112
#define UEP12BPR_BASE_20_BITNUM         4


/*** UEP34BPR - USB Endpoint 3/4 Base Pointer Register; 0x0000005E ***/
typedef union {
  byte Byte;
  struct {
    byte BASE30      :1;                                       /* Base Location Pointer 3 Bit 0 */
    byte BASE31      :1;                                       /* Base Location Pointer 3 Bit 1 */
    byte BASE32      :1;                                       /* Base Location Pointer 3 Bit 2 */
    byte             :1; 
    byte BASE40      :1;                                       /* Base Location Pointer 4 Bit 0 */
    byte BASE41      :1;                                       /* Base Location Pointer 4 Bit 1 */
    byte BASE42      :1;                                       /* Base Location Pointer 4 Bit 2 */
    byte             :1; 
  } Bits;
  struct {
    byte grpBASE_30 :3;
    byte         :1;
    byte grpBASE_40 :3;
    byte         :1;
  } MergedBits;
} UEP34BPRSTR;
extern volatile UEP34BPRSTR _UEP34BPR;
#define UEP34BPR                        _UEP34BPR.Byte
#define UEP34BPR_BASE30                 _UEP34BPR.Bits.BASE30
#define UEP34BPR_BASE31                 _UEP34BPR.Bits.BASE31
#define UEP34BPR_BASE32                 _UEP34BPR.Bits.BASE32
#define UEP34BPR_BASE40                 _UEP34BPR.Bits.BASE40
#define UEP34BPR_BASE41                 _UEP34BPR.Bits.BASE41
#define UEP34BPR_BASE42                 _UEP34BPR.Bits.BASE42
#define UEP34BPR_BASE_30                _UEP34BPR.MergedBits.grpBASE_30
#define UEP34BPR_BASE_40                _UEP34BPR.MergedBits.grpBASE_40
#define UEP34BPR_BASE                   UEP34BPR_BASE_30

#define UEP34BPR_BASE30_MASK            1
#define UEP34BPR_BASE31_MASK            2
#define UEP34BPR_BASE32_MASK            4
#define UEP34BPR_BASE40_MASK            16
#define UEP34BPR_BASE41_MASK            32
#define UEP34BPR_BASE42_MASK            64
#define UEP34BPR_BASE_30_MASK           7
#define UEP34BPR_BASE_30_BITNUM         0
#define UEP34BPR_BASE_40_MASK           112
#define UEP34BPR_BASE_40_BITNUM         4


/*** UINTFCR - USB Interface Control Register; 0x0000005F ***/
typedef union {
  byte Byte;
  struct {
    byte EP1INT      :1;                                       /* Endpoint 1 Interface number */
    byte             :1; 
    byte EP2INT      :1;                                       /* Endpoint 2 Interface number */
    byte             :1; 
    byte EP3INT      :1;                                       /* Endpoint 3 Interface number */
    byte             :1; 
    byte EP4INT      :1;                                       /* Endpoint 4 Interface number */
    byte             :1; 
  } Bits;
} UINTFCRSTR;
extern volatile UINTFCRSTR _UINTFCR;
#define UINTFCR                         _UINTFCR.Byte
#define UINTFCR_EP1INT                  _UINTFCR.Bits.EP1INT
#define UINTFCR_EP2INT                  _UINTFCR.Bits.EP2INT
#define UINTFCR_EP3INT                  _UINTFCR.Bits.EP3INT
#define UINTFCR_EP4INT                  _UINTFCR.Bits.EP4INT

#define UINTFCR_EP1INT_MASK             1
#define UINTFCR_EP2INT_MASK             4
#define UINTFCR_EP3INT_MASK             16
#define UINTFCR_EP4INT_MASK             64


/*** PCTL - PLL Control Register; 0x00001090 ***/
typedef union {
  byte Byte;
  struct {
    byte VPR0        :1;                                       /* VCO Power-of-Two Range Select Bit 0 */
    byte VPR1        :1;                                       /* VCO Power-of-Two Range Select Bit 1 */
    byte PRE0        :1;                                       /* Prescaler Program Bit 0 */
    byte PRE1        :1;                                       /* Prescaler Program Bit 1 */
    byte BCS         :1;                                       /* Base Clock Select Bit */
    byte PLLON       :1;                                       /* PLL On Bit */
    byte PLLF        :1;                                       /* PLL Flag Bit */
    byte PLLIE       :1;                                       /* PLL Interrupt Enable Bit */
  } Bits;
  struct {
    byte grpVPR  :2;
    byte grpPRE  :2;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} PCTLSTR;
extern volatile PCTLSTR _PCTL;
#define PCTL                            _PCTL.Byte
#define PCTL_VPR0                       _PCTL.Bits.VPR0
#define PCTL_VPR1                       _PCTL.Bits.VPR1
#define PCTL_PRE0                       _PCTL.Bits.PRE0
#define PCTL_PRE1                       _PCTL.Bits.PRE1
#define PCTL_BCS                        _PCTL.Bits.BCS
#define PCTL_PLLON                      _PCTL.Bits.PLLON
#define PCTL_PLLF                       _PCTL.Bits.PLLF
#define PCTL_PLLIE                      _PCTL.Bits.PLLIE
#define PCTL_VPR                        _PCTL.MergedBits.grpVPR
#define PCTL_PRE                        _PCTL.MergedBits.grpPRE

#define PCTL_VPR0_MASK                  1
#define PCTL_VPR1_MASK                  2
#define PCTL_PRE0_MASK                  4
#define PCTL_PRE1_MASK                  8
#define PCTL_BCS_MASK                   16
#define PCTL_PLLON_MASK                 32
#define PCTL_PLLF_MASK                  64
#define PCTL_PLLIE_MASK                 128
#define PCTL_VPR_MASK                   3
#define PCTL_VPR_BITNUM                 0
#define PCTL_PRE_MASK                   12
#define PCTL_PRE_BITNUM                 2


/*** PBWC - PLL Bandwidth Control Register; 0x00001091 ***/
typedef union {
  byte Byte;
  struct {
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte ACQ         :1;                                       /* Automatic Bandwidth Control Bit */
    byte LOCK        :1;                                       /* Lock Indicator Bit */
    byte AUTO        :1;                                       /* Acquisiton Mode Bit */
  } Bits;
} PBWCSTR;
extern volatile PBWCSTR _PBWC;
#define PBWC                            _PBWC.Byte
#define PBWC_ACQ                        _PBWC.Bits.ACQ
#define PBWC_LOCK                       _PBWC.Bits.LOCK
#define PBWC_AUTO                       _PBWC.Bits.AUTO

#define PBWC_ACQ_MASK                   32
#define PBWC_LOCK_MASK                  64
#define PBWC_AUTO_MASK                  128


/*** PMS - PLL Multiplier Select Register; 0x00001092 ***/
typedef union {
  word Word;
   /* Overlapped registers: */
  struct {
    /*** PMSH - PLL Multiplier Select Register High; 0x00001092 ***/
    union {
      byte Byte;
      struct {
        byte MUL8        :1;                                       /* PLL Multiplier Select Bit 8 */
        byte MUL9        :1;                                       /* PLL Multiplier Select Bit 9 */
        byte MUL10       :1;                                       /* PLL Multiplier Select Bit 10 */
        byte MUL11       :1;                                       /* PLL Multiplier Select Bit 11 */
        byte             :1; 
        byte             :1; 
        byte             :1; 
        byte             :1; 
      } Bits;
      struct {
        byte grpMUL_8 :4;
        byte     :1;
        byte     :1;
        byte     :1;
        byte     :1;
      } MergedBits;
    } PMSHSTR;
    #define PMSH                        _PMS.Overlap_STR.PMSHSTR.Byte
    #define PMSH_MUL8                   _PMS.Overlap_STR.PMSHSTR.Bits.MUL8
    #define PMSH_MUL9                   _PMS.Overlap_STR.PMSHSTR.Bits.MUL9
    #define PMSH_MUL10                  _PMS.Overlap_STR.PMSHSTR.Bits.MUL10
    #define PMSH_MUL11                  _PMS.Overlap_STR.PMSHSTR.Bits.MUL11
    #define PMSH_MUL_8                  _PMS.Overlap_STR.PMSHSTR.MergedBits.grpMUL_8
    #define PMSH_MUL                    PMSH_MUL_8
    
    #define PMSH_MUL8_MASK              1
    #define PMSH_MUL9_MASK              2
    #define PMSH_MUL10_MASK             4
    #define PMSH_MUL11_MASK             8
    #define PMSH_MUL_8_MASK             15
    #define PMSH_MUL_8_BITNUM           0
    

    /*** PMSL - PLL Multiplier Select Register Low; 0x00001093 ***/
    union {
      byte Byte;
      struct {
        byte MUL0        :1;                                       /* PLL Multiplier Select Bit 0 */
        byte MUL1        :1;                                       /* PLL Multiplier Select Bit 1 */
        byte MUL2        :1;                                       /* PLL Multiplier Select Bit 2 */
        byte MUL3        :1;                                       /* PLL Multiplier Select Bit 3 */
        byte MUL4        :1;                                       /* PLL Multiplier Select Bit 4 */
        byte MUL5        :1;                                       /* PLL Multiplier Select Bit 5 */
        byte MUL6        :1;                                       /* PLL Multiplier Select Bit 6 */
        byte MUL7        :1;                                       /* PLL Multiplier Select Bit 7 */
      } Bits;
    } PMSLSTR;
    #define PMSL                        _PMS.Overlap_STR.PMSLSTR.Byte
    #define PMSL_MUL0                   _PMS.Overlap_STR.PMSLSTR.Bits.MUL0
    #define PMSL_MUL1                   _PMS.Overlap_STR.PMSLSTR.Bits.MUL1
    #define PMSL_MUL2                   _PMS.Overlap_STR.PMSLSTR.Bits.MUL2
    #define PMSL_MUL3                   _PMS.Overlap_STR.PMSLSTR.Bits.MUL3
    #define PMSL_MUL4                   _PMS.Overlap_STR.PMSLSTR.Bits.MUL4
    #define PMSL_MUL5                   _PMS.Overlap_STR.PMSLSTR.Bits.MUL5
    #define PMSL_MUL6                   _PMS.Overlap_STR.PMSLSTR.Bits.MUL6
    #define PMSL_MUL7                   _PMS.Overlap_STR.PMSLSTR.Bits.MUL7
    
    #define PMSL_MUL0_MASK              1
    #define PMSL_MUL1_MASK              2
    #define PMSL_MUL2_MASK              4
    #define PMSL_MUL3_MASK              8
    #define PMSL_MUL4_MASK              16
    #define PMSL_MUL5_MASK              32
    #define PMSL_MUL6_MASK              64
    #define PMSL_MUL7_MASK              128
    
  } Overlap_STR;

} PMSSTR;
extern volatile PMSSTR _PMS;
#define PMS                             _PMS.Word


/*** PMRS - PLL VCO Range Select; 0x00001094 ***/
typedef union {
  byte Byte;
  struct {
    byte VRS0        :1;                                       /* VCO Range Select Bit 0 */
    byte VRS1        :1;                                       /* VCO Range Select Bit 1 */
    byte VRS2        :1;                                       /* VCO Range Select Bit 2 */
    byte VRS3        :1;                                       /* VCO Range Select Bit 3 */
    byte VRS4        :1;                                       /* VCO Range Select Bit 4 */
    byte VRS5        :1;                                       /* VCO Range Select Bit 5 */
    byte VRS6        :1;                                       /* VCO Range Select Bit 6 */
    byte VRS7        :1;                                       /* VCO Range Select Bit 7 */
  } Bits;
} PMRSSTR;
extern volatile PMRSSTR _PMRS;
#define PMRS                            _PMRS.Byte
#define PMRS_VRS0                       _PMRS.Bits.VRS0
#define PMRS_VRS1                       _PMRS.Bits.VRS1
#define PMRS_VRS2                       _PMRS.Bits.VRS2
#define PMRS_VRS3                       _PMRS.Bits.VRS3
#define PMRS_VRS4                       _PMRS.Bits.VRS4
#define PMRS_VRS5                       _PMRS.Bits.VRS5
#define PMRS_VRS6                       _PMRS.Bits.VRS6
#define PMRS_VRS7                       _PMRS.Bits.VRS7

#define PMRS_VRS0_MASK                  1
#define PMRS_VRS1_MASK                  2
#define PMRS_VRS2_MASK                  4
#define PMRS_VRS3_MASK                  8
#define PMRS_VRS4_MASK                  16
#define PMRS_VRS5_MASK                  32
#define PMRS_VRS6_MASK                  64
#define PMRS_VRS7_MASK                  128


/*** PMDS - PLL Reference Divider Select Register; 0x00001095 ***/
typedef union {
  byte Byte;
  struct {
    byte RDS0        :1;                                       /* Reference Divider Select Bit 0 */
    byte RDS1        :1;                                       /* Reference Divider Select Bit 1 */
    byte RDS2        :1;                                       /* Reference Divider Select Bit 2 */
    byte RDS3        :1;                                       /* Reference Divider Select Bit 3 */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
  struct {
    byte grpRDS  :4;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} PMDSSTR;
extern volatile PMDSSTR _PMDS;
#define PMDS                            _PMDS.Byte
#define PMDS_RDS0                       _PMDS.Bits.RDS0
#define PMDS_RDS1                       _PMDS.Bits.RDS1
#define PMDS_RDS2                       _PMDS.Bits.RDS2
#define PMDS_RDS3                       _PMDS.Bits.RDS3
#define PMDS_RDS                        _PMDS.MergedBits.grpRDS

#define PMDS_RDS0_MASK                  1
#define PMDS_RDS1_MASK                  2
#define PMDS_RDS2_MASK                  4
#define PMDS_RDS3_MASK                  8
#define PMDS_RDS_MASK                   15
#define PMDS_RDS_BITNUM                 0


/*** BSR - Break Status Register; 0x0000FE00 ***/
typedef union {
  byte Byte;
  struct {
    byte             :1; 
    byte SBSW        :1;                                       /* SIM Break Stop/Wait Bit */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
} BSRSTR;
extern volatile BSRSTR _BSR;
#define BSR                             _BSR.Byte
#define BSR_SBSW                        _BSR.Bits.SBSW

#define BSR_SBSW_MASK                   2


/*** RSR - Reset Status Register; 0x0000FE01 ***/
typedef union {
  byte Byte;
  struct {
    byte             :1; 
    byte LVI         :1;                                       /* Low-Voltage Inhibit Reset Bit */
    byte USB         :1;                                       /* Universal Serial Bus Reset Bit */
    byte ILAD        :1;                                       /* Illegal Address Reset Bit */
    byte ILOP        :1;                                       /* Illegal Opcode Reset Bit */
    byte COP         :1;                                       /* Computer Operating Properly Reset Bit */
    byte PIN         :1;                                       /* External Reset Bit */
    byte POR         :1;                                       /* Power-On Reset Bit */
  } Bits;
} RSRSTR;
extern volatile RSRSTR _RSR;
#define RSR                             _RSR.Byte
#define RSR_LVI                         _RSR.Bits.LVI
#define RSR_USB                         _RSR.Bits.USB
#define RSR_ILAD                        _RSR.Bits.ILAD
#define RSR_ILOP                        _RSR.Bits.ILOP
#define RSR_COP                         _RSR.Bits.COP
#define RSR_PIN                         _RSR.Bits.PIN
#define RSR_POR                         _RSR.Bits.POR

#define RSR_LVI_MASK                    2
#define RSR_USB_MASK                    4
#define RSR_ILAD_MASK                   8
#define RSR_ILOP_MASK                   16
#define RSR_COP_MASK                    32
#define RSR_PIN_MASK                    64
#define RSR_POR_MASK                    128


/*** BFCR - SIM Break Flag Control Register; 0x0000FE03 ***/
typedef union {
  byte Byte;
  struct {
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte BCFE        :1;                                       /* Break Clear Flag Enable Bit */
  } Bits;
} BFCRSTR;
extern volatile BFCRSTR _BFCR;
#define BFCR                            _BFCR.Byte
#define BFCR_BCFE                       _BFCR.Bits.BCFE

#define BFCR_BCFE_MASK                  128


/*** INT1 - Interrupt Status Register 1; 0x0000FE04 ***/
typedef union {
  byte Byte;
  struct {
    byte             :1; 
    byte             :1; 
    byte IF1         :1;                                       /* Interrupt Flag 1 */
    byte IF2         :1;                                       /* Interrrupt Flag 2 */
    byte IF3         :1;                                       /* Interrupt Flag 3 */
    byte IF4         :1;                                       /* Interrupt Flag 4 */
    byte IF5         :1;                                       /* Interrupt Flag 5 */
    byte IF6         :1;                                       /* Interrupt Flag 6 */
  } Bits;
  struct {
    byte         :1;
    byte         :1;
    byte grpIF_1 :6;
  } MergedBits;
} INT1STR;
extern volatile INT1STR _INT1;
#define INT1                            _INT1.Byte
#define INT1_IF1                        _INT1.Bits.IF1
#define INT1_IF2                        _INT1.Bits.IF2
#define INT1_IF3                        _INT1.Bits.IF3
#define INT1_IF4                        _INT1.Bits.IF4
#define INT1_IF5                        _INT1.Bits.IF5
#define INT1_IF6                        _INT1.Bits.IF6
#define INT1_IF_1                       _INT1.MergedBits.grpIF_1
#define INT1_IF                         INT1_IF_1

#define INT1_IF1_MASK                   4
#define INT1_IF2_MASK                   8
#define INT1_IF3_MASK                   16
#define INT1_IF4_MASK                   32
#define INT1_IF5_MASK                   64
#define INT1_IF6_MASK                   128
#define INT1_IF_1_MASK                  252
#define INT1_IF_1_BITNUM                2


/*** INT2 - Interrupt Status Register 2; 0x0000FE05 ***/
typedef union {
  byte Byte;
  struct {
    byte IF7         :1;                                       /* Interrupt Flag Bit 7 */
    byte IF8         :1;                                       /* Interrupt Flag Bit 8 */
    byte IF9         :1;                                       /* Interrupt Flag Bit 9 */
    byte IF10        :1;                                       /* Interrupt Flag Bit 10 */
    byte IF11        :1;                                       /* Interrupt Flag Bit 11 */
    byte IF12        :1;                                       /* Interrupt Flag Bit 12 */
    byte IF13        :1;                                       /* Interrupt Flag Bit 13 */
    byte IF14        :1;                                       /* Interrupt Flag Bit 14 */
  } Bits;
} INT2STR;
extern volatile INT2STR _INT2;
#define INT2                            _INT2.Byte
#define INT2_IF7                        _INT2.Bits.IF7
#define INT2_IF8                        _INT2.Bits.IF8
#define INT2_IF9                        _INT2.Bits.IF9
#define INT2_IF10                       _INT2.Bits.IF10
#define INT2_IF11                       _INT2.Bits.IF11
#define INT2_IF12                       _INT2.Bits.IF12
#define INT2_IF13                       _INT2.Bits.IF13
#define INT2_IF14                       _INT2.Bits.IF14

#define INT2_IF7_MASK                   1
#define INT2_IF8_MASK                   2
#define INT2_IF9_MASK                   4
#define INT2_IF10_MASK                  8
#define INT2_IF11_MASK                  16
#define INT2_IF12_MASK                  32
#define INT2_IF13_MASK                  64
#define INT2_IF14_MASK                  128


/*** INT3 - Interrupt Status Register 3; 0x0000FE06 ***/
typedef union {
  byte Byte;
  struct {
    byte IF15        :1;                                       /* Interrupt Flag Bit 15 */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
} INT3STR;
extern volatile INT3STR _INT3;
#define INT3                            _INT3.Byte
#define INT3_IF15                       _INT3.Bits.IF15

#define INT3_IF15_MASK                  1


/*** FLCR - FLASH Control Register; 0x0000FE08 ***/
typedef union {
  byte Byte;
  struct {
    byte PGM         :1;                                       /* Program Control Bit */
    byte ERASE       :1;                                       /* Erase Control Bit */
    byte MASS        :1;                                       /* Mass Erase Control Bit */
    byte HVEN        :1;                                       /* High-Voltage Enable Bit */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
} FLCRSTR;
extern volatile FLCRSTR _FLCR;
#define FLCR                            _FLCR.Byte
#define FLCR_PGM                        _FLCR.Bits.PGM
#define FLCR_ERASE                      _FLCR.Bits.ERASE
#define FLCR_MASS                       _FLCR.Bits.MASS
#define FLCR_HVEN                       _FLCR.Bits.HVEN

#define FLCR_PGM_MASK                   1
#define FLCR_ERASE_MASK                 2
#define FLCR_MASS_MASK                  4
#define FLCR_HVEN_MASK                  8


/*** FLBPR - FLASH Block Protect Register; 0x0000FE09 ***/
typedef union {
  byte Byte;
  struct {
    byte BPR0        :1;                                       /* Block Protect Register Bit 0 */
    byte BPR1        :1;                                       /* Block Protect Register Bit 1 */
    byte BPR2        :1;                                       /* Block Protect Register Bit 2 */
    byte BPR3        :1;                                       /* Block Protect Register Bit 3 */
    byte BPR4        :1;                                       /* Block Protect Register Bit 4 */
    byte BPR5        :1;                                       /* Block Protect Register Bit 5 */
    byte BPR6        :1;                                       /* Block Protect Register Bit 6 */
    byte BPR7        :1;                                       /* Block Protect Register Bit 7 */
  } Bits;
} FLBPRSTR;
extern volatile FLBPRSTR _FLBPR;
#define FLBPR                           _FLBPR.Byte
#define FLBPR_BPR0                      _FLBPR.Bits.BPR0
#define FLBPR_BPR1                      _FLBPR.Bits.BPR1
#define FLBPR_BPR2                      _FLBPR.Bits.BPR2
#define FLBPR_BPR3                      _FLBPR.Bits.BPR3
#define FLBPR_BPR4                      _FLBPR.Bits.BPR4
#define FLBPR_BPR5                      _FLBPR.Bits.BPR5
#define FLBPR_BPR6                      _FLBPR.Bits.BPR6
#define FLBPR_BPR7                      _FLBPR.Bits.BPR7

#define FLBPR_BPR0_MASK                 1
#define FLBPR_BPR1_MASK                 2
#define FLBPR_BPR2_MASK                 4
#define FLBPR_BPR3_MASK                 8
#define FLBPR_BPR4_MASK                 16
#define FLBPR_BPR5_MASK                 32
#define FLBPR_BPR6_MASK                 64
#define FLBPR_BPR7_MASK                 128


/*** BRK - Break Address Register; 0x0000FE0C ***/
typedef union {
  word Word;
   /* Overlapped registers: */
  struct {
    /*** BRKH - Break Address Register High; 0x0000FE0C ***/
    union {
      byte Byte;
      struct {
        byte BIT8        :1;                                       /* Break Address Register Bit 8 */
        byte BIT9        :1;                                       /* Break Address Register Bit 9 */
        byte BIT10       :1;                                       /* Break Address Register Bit 10 */
        byte BIT11       :1;                                       /* Break Address Register Bit 11 */
        byte BIT12       :1;                                       /* Break Address Register Bit 12 */
        byte BIT13       :1;                                       /* Break Address Register Bit 13 */
        byte BIT14       :1;                                       /* Break Address Register Bit 14 */
        byte BIT15       :1;                                       /* Break Address Register Bit 15 */
      } Bits;
    } BRKHSTR;
    #define BRKH                        _BRK.Overlap_STR.BRKHSTR.Byte
    #define BRKH_BIT8                   _BRK.Overlap_STR.BRKHSTR.Bits.BIT8
    #define BRKH_BIT9                   _BRK.Overlap_STR.BRKHSTR.Bits.BIT9
    #define BRKH_BIT10                  _BRK.Overlap_STR.BRKHSTR.Bits.BIT10
    #define BRKH_BIT11                  _BRK.Overlap_STR.BRKHSTR.Bits.BIT11
    #define BRKH_BIT12                  _BRK.Overlap_STR.BRKHSTR.Bits.BIT12
    #define BRKH_BIT13                  _BRK.Overlap_STR.BRKHSTR.Bits.BIT13
    #define BRKH_BIT14                  _BRK.Overlap_STR.BRKHSTR.Bits.BIT14
    #define BRKH_BIT15                  _BRK.Overlap_STR.BRKHSTR.Bits.BIT15
    
    #define BRKH_BIT8_MASK              1
    #define BRKH_BIT9_MASK              2
    #define BRKH_BIT10_MASK             4
    #define BRKH_BIT11_MASK             8
    #define BRKH_BIT12_MASK             16
    #define BRKH_BIT13_MASK             32
    #define BRKH_BIT14_MASK             64
    #define BRKH_BIT15_MASK             128
    

    /*** BRKL - Break Address Register Low; 0x0000FE0D ***/
    union {
      byte Byte;
      struct {
        byte BIT0        :1;                                       /* Break Address Register Bit 0 */
        byte BIT1        :1;                                       /* Break Address Register Bit 1 */
        byte BIT2        :1;                                       /* Break Address Register Bit 2 */
        byte BIT3        :1;                                       /* Break Address Register Bit 3 */
        byte BIT4        :1;                                       /* Break Address Register Bit 4 */
        byte BIT5        :1;                                       /* Break Address Register Bit 5 */
        byte BIT6        :1;                                       /* Break Address Register Bit 6 */
        byte BIT7        :1;                                       /* Break Address Register Bit 7 */
      } Bits;
    } BRKLSTR;
    #define BRKL                        _BRK.Overlap_STR.BRKLSTR.Byte
    #define BRKL_BIT0                   _BRK.Overlap_STR.BRKLSTR.Bits.BIT0
    #define BRKL_BIT1                   _BRK.Overlap_STR.BRKLSTR.Bits.BIT1
    #define BRKL_BIT2                   _BRK.Overlap_STR.BRKLSTR.Bits.BIT2
    #define BRKL_BIT3                   _BRK.Overlap_STR.BRKLSTR.Bits.BIT3
    #define BRKL_BIT4                   _BRK.Overlap_STR.BRKLSTR.Bits.BIT4
    #define BRKL_BIT5                   _BRK.Overlap_STR.BRKLSTR.Bits.BIT5
    #define BRKL_BIT6                   _BRK.Overlap_STR.BRKLSTR.Bits.BIT6
    #define BRKL_BIT7                   _BRK.Overlap_STR.BRKLSTR.Bits.BIT7
    
    #define BRKL_BIT0_MASK              1
    #define BRKL_BIT1_MASK              2
    #define BRKL_BIT2_MASK              4
    #define BRKL_BIT3_MASK              8
    #define BRKL_BIT4_MASK              16
    #define BRKL_BIT5_MASK              32
    #define BRKL_BIT6_MASK              64
    #define BRKL_BIT7_MASK              128
    
  } Overlap_STR;

} BRKSTR;
extern volatile BRKSTR _BRK;
#define BRK                             _BRK.Word


/*** BRKSCR - Break Status and Control Register; 0x0000FE0E ***/
typedef union {
  byte Byte;
  struct {
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte BRKA        :1;                                       /* Break Active Bit */
    byte BRKE        :1;                                       /* Break Enable Bit */
  } Bits;
} BRKSCRSTR;
extern volatile BRKSCRSTR _BRKSCR;
#define BRKSCR                          _BRKSCR.Byte
#define BRKSCR_BRKA                     _BRKSCR.Bits.BRKA
#define BRKSCR_BRKE                     _BRKSCR.Bits.BRKE

#define BRKSCR_BRKA_MASK                64
#define BRKSCR_BRKE_MASK                128


/*** LVISR - LVI I/O Register; 0x0000FE0F ***/
typedef union {
  byte Byte;
  struct {
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte LVIOUT      :1;                                       /* LVI Output Bit */
  } Bits;
} LVISRSTR;
extern volatile LVISRSTR _LVISR;
#define LVISR                           _LVISR.Byte
#define LVISR_LVIOUT                    _LVISR.Bits.LVIOUT

#define LVISR_LVIOUT_MASK               128


/*** COPCTL - COP Control Register; 0x0000FFFF ***/
typedef union {
  byte Byte;
  struct {
    byte BIT0        :1;                                       /* Bit 0 */
    byte BIT1        :1;                                       /* Bit 1 */
    byte BIT2        :1;                                       /* Bit 2 */
    byte BIT3        :1;                                       /* Bit 3 */
    byte BIT4        :1;                                       /* Bit 4 */
    byte BIT5        :1;                                       /* Bit 5 */
    byte BIT6        :1;                                       /* Bit 6 */
    byte BIT7        :1;                                       /* Bit 7 */
  } Bits;
} COPCTLSTR;
extern volatile COPCTLSTR _COPCTL;
#define COPCTL                          _COPCTL.Byte
#define COPCTL_BIT0                     _COPCTL.Bits.BIT0
#define COPCTL_BIT1                     _COPCTL.Bits.BIT1
#define COPCTL_BIT2                     _COPCTL.Bits.BIT2
#define COPCTL_BIT3                     _COPCTL.Bits.BIT3
#define COPCTL_BIT4                     _COPCTL.Bits.BIT4
#define COPCTL_BIT5                     _COPCTL.Bits.BIT5
#define COPCTL_BIT6                     _COPCTL.Bits.BIT6
#define COPCTL_BIT7                     _COPCTL.Bits.BIT7

#define COPCTL_BIT0_MASK                1
#define COPCTL_BIT1_MASK                2
#define COPCTL_BIT2_MASK                4
#define COPCTL_BIT3_MASK                8
#define COPCTL_BIT4_MASK                16
#define COPCTL_BIT5_MASK                32
#define COPCTL_BIT6_MASK                64
#define COPCTL_BIT7_MASK                128



/***********************************************/
/**   D E P R E C I A T E D   S Y M B O L S   **/
/***********************************************/
/* ---------------------------------------------------------------------------------------------------
Exceptions in bit names of timer status and control registers
due to backward compatibility with previous releases  */
#define T1SC0_CHxMAX _T1SC0.Bits.CH0MAX
#define T1SC0_TOVx _T1SC0.Bits.TOV0
#define T1SC0_ELSxA _T1SC0.Bits.ELS0A
#define T1SC0_ELSxB _T1SC0.Bits.ELS0B
#define T1SC0_MSxA _T1SC0.Bits.MS0A
#define T1SC0_MSxB _T1SC0.Bits.MS0B
#define T1SC0_CHxIE _T1SC0.Bits.CH0IE
#define T1SC0_CHxF _T1SC0.Bits.CH0F

#define T1SC1_CHxMAX _T1SC1.Bits.CH1MAX
#define T1SC1_TOVx _T1SC1.Bits.TOV1
#define T1SC1_ELSxA _T1SC1.Bits.ELS1A
#define T1SC1_ELSxB _T1SC1.Bits.ELS1B
#define T1SC1_MSxA _T1SC1.Bits.MS1A
#define T1SC1_CHxIE _T1SC1.Bits.CH1IE
#define T1SC1_CHxF _T1SC1.Bits.CH1F

/* --------------------------------------------------------------------------- */
/* The following symbols were removed, because they were invalid or irrelevant */
/* --------------------------------------------------------------------------- */
/*
 * Follows changes from the database 2.87.024 version */
#define SBFCR                            BFCR
#define _SBFCR                           _BFCR
#define SBFCR_BCFE                       BFCR_BCFE
#define SBFCR_BCFE_MASK                  BFCR_BCFE_MASK
#define UE0D0_UE0R00_UE0T00              UE0D0_UE0D00_OUT_UE0D00_IN
#define UE0D0_UE0R00_UE0T00_MASK         UE0D0_UE0D00_OUT_UE0D00_IN_MASK
#define UE0D0_UE0R01_UE0T01              UE0D0_UE0D01_OUT_UE0D01_IN
#define UE0D0_UE0R01_UE0T01_MASK         UE0D0_UE0D01_OUT_UE0D01_IN_MASK
#define UE0D0_UE0R02_UE0T02              UE0D0_UE0D02_OUT_UE0D02_IN
#define UE0D0_UE0R02_UE0T02_MASK         UE0D0_UE0D02_OUT_UE0D02_IN_MASK
#define UE0D0_UE0R03_UE0T03              UE0D0_UE0D03_OUT_UE0D03_IN
#define UE0D0_UE0R03_UE0T03_MASK         UE0D0_UE0D03_OUT_UE0D03_IN_MASK
#define UE0D0_UE0R04_UE0T04              UE0D0_UE0D04_OUT_UE0D04_IN
#define UE0D0_UE0R04_UE0T04_MASK         UE0D0_UE0D04_OUT_UE0D04_IN_MASK
#define UE0D0_UE0R05_UE0T05              UE0D0_UE0D05_OUT_UE0D05_IN
#define UE0D0_UE0R05_UE0T05_MASK         UE0D0_UE0D05_OUT_UE0D05_IN_MASK
#define UE0D0_UE0R06_UE0T06              UE0D0_UE0D06_OUT_UE0D06_IN
#define UE0D0_UE0R06_UE0T06_MASK         UE0D0_UE0D06_OUT_UE0D06_IN_MASK
#define UE0D0_UE0R07_UE0T07              UE0D0_UE0D07_OUT_UE0D07_IN
#define UE0D0_UE0R07_UE0T07_MASK         UE0D0_UE0D07_OUT_UE0D07_IN_MASK
#define UE0D1_UE0R10_UE0T10              UE0D1_UE0D10_OUT_UE0D10_IN
#define UE0D1_UE0R10_UE0T10_MASK         UE0D1_UE0D10_OUT_UE0D10_IN_MASK
#define UE0D1_UE0R11_UE0T11              UE0D1_UE0D11_OUT_UE0D11_IN
#define UE0D1_UE0R11_UE0T11_MASK         UE0D1_UE0D11_OUT_UE0D11_IN_MASK
#define UE0D1_UE0R12_UE0T12              UE0D1_UE0D12_OUT_UE0D12_IN
#define UE0D1_UE0R12_UE0T12_MASK         UE0D1_UE0D12_OUT_UE0D12_IN_MASK
#define UE0D1_UE0R13_UE0T13              UE0D1_UE0D13_OUT_UE0D13_IN
#define UE0D1_UE0R13_UE0T13_MASK         UE0D1_UE0D13_OUT_UE0D13_IN_MASK
#define UE0D1_UE0R14_UE0T14              UE0D1_UE0D14_OUT_UE0D14_IN
#define UE0D1_UE0R14_UE0T14_MASK         UE0D1_UE0D14_OUT_UE0D14_IN_MASK
#define UE0D1_UE0R15_UE0T15              UE0D1_UE0D15_OUT_UE0D15_IN
#define UE0D1_UE0R15_UE0T15_MASK         UE0D1_UE0D15_OUT_UE0D15_IN_MASK
#define UE0D1_UE0R16_UE0T16              UE0D1_UE0D16_OUT_UE0D16_IN
#define UE0D1_UE0R16_UE0T16_MASK         UE0D1_UE0D16_OUT_UE0D16_IN_MASK
#define UE0D1_UE0R17_UE0T17              UE0D1_UE0D17_OUT_UE0D17_IN
#define UE0D1_UE0R17_UE0T17_MASK         UE0D1_UE0D17_OUT_UE0D17_IN_MASK
#define UE0D2_UE0R20_UE0T20              UE0D2_UE0D20_OUT_UE0D20_IN
#define UE0D2_UE0R20_UE0T20_MASK         UE0D2_UE0D20_OUT_UE0D20_IN_MASK
#define UE0D2_UE0R21_UE0T21              UE0D2_UE0D21_OUT_UE0D21_IN
#define UE0D2_UE0R21_UE0T21_MASK         UE0D2_UE0D21_OUT_UE0D21_IN_MASK
#define UE0D2_UE0R22_UE0T22              UE0D2_UE0D22_OUT_UE0D22_IN
#define UE0D2_UE0R22_UE0T22_MASK         UE0D2_UE0D22_OUT_UE0D22_IN_MASK
#define UE0D2_UE0R23_UE0T23              UE0D2_UE0D23_OUT_UE0D23_IN
#define UE0D2_UE0R23_UE0T23_MASK         UE0D2_UE0D23_OUT_UE0D23_IN_MASK
#define UE0D2_UE0R24_UE0T24              UE0D2_UE0D24_OUT_UE0D24_IN
#define UE0D2_UE0R24_UE0T24_MASK         UE0D2_UE0D24_OUT_UE0D24_IN_MASK
#define UE0D2_UE0R25_UE0T25              UE0D2_UE0D25_OUT_UE0D25_IN
#define UE0D2_UE0R25_UE0T25_MASK         UE0D2_UE0D25_OUT_UE0D25_IN_MASK
#define UE0D2_UE0R26_UE0T26              UE0D2_UE0D26_OUT_UE0D26_IN
#define UE0D2_UE0R26_UE0T26_MASK         UE0D2_UE0D26_OUT_UE0D26_IN_MASK
#define UE0D2_UE0R27_UE0T27              UE0D2_UE0D27_OUT_UE0D27_IN
#define UE0D2_UE0R27_UE0T27_MASK         UE0D2_UE0D27_OUT_UE0D27_IN_MASK
#define UE0D3_UE0R30_UE0T30              UE0D3_UE0D30_OUT_UE0D30_IN
#define UE0D3_UE0R30_UE0T30_MASK         UE0D3_UE0D30_OUT_UE0D30_IN_MASK
#define UE0D3_UE0R31_UE0T31              UE0D3_UE0D31_OUT_UE0D31_IN
#define UE0D3_UE0R31_UE0T31_MASK         UE0D3_UE0D31_OUT_UE0D31_IN_MASK
#define UE0D3_UE0R32_UE0T32              UE0D3_UE0D32_OUT_UE0D32_IN
#define UE0D3_UE0R32_UE0T32_MASK         UE0D3_UE0D32_OUT_UE0D32_IN_MASK
#define UE0D3_UE0R33_UE0T33              UE0D3_UE0D33_OUT_UE0D33_IN
#define UE0D3_UE0R33_UE0T33_MASK         UE0D3_UE0D33_OUT_UE0D33_IN_MASK
#define UE0D3_UE0R34_UE0T34              UE0D3_UE0D34_OUT_UE0D34_IN
#define UE0D3_UE0R34_UE0T34_MASK         UE0D3_UE0D34_OUT_UE0D34_IN_MASK
#define UE0D3_UE0R35_UE0T35              UE0D3_UE0D35_OUT_UE0D35_IN
#define UE0D3_UE0R35_UE0T35_MASK         UE0D3_UE0D35_OUT_UE0D35_IN_MASK
#define UE0D3_UE0R36_UE0T36              UE0D3_UE0D36_OUT_UE0D36_IN
#define UE0D3_UE0R36_UE0T36_MASK         UE0D3_UE0D36_OUT_UE0D36_IN_MASK
#define UE0D3_UE0R37_UE0T37              UE0D3_UE0D37_OUT_UE0D37_IN
#define UE0D3_UE0R37_UE0T37_MASK         UE0D3_UE0D37_OUT_UE0D37_IN_MASK
#define UE0D4_UE0R40_UE0T40              UE0D4_UE0D40_OUT_UE0D40_IN
#define UE0D4_UE0R40_UE0T40_MASK         UE0D4_UE0D40_OUT_UE0D40_IN_MASK
#define UE0D4_UE0R41_UE0T41              UE0D4_UE0D41_OUT_UE0D41_IN
#define UE0D4_UE0R41_UE0T41_MASK         UE0D4_UE0D41_OUT_UE0D41_IN_MASK
#define UE0D4_UE0R42_UE0T42              UE0D4_UE0D42_OUT_UE0D42_IN
#define UE0D4_UE0R42_UE0T42_MASK         UE0D4_UE0D42_OUT_UE0D42_IN_MASK
#define UE0D4_UE0R43_UE0T43              UE0D4_UE0D43_OUT_UE0D43_IN
#define UE0D4_UE0R43_UE0T43_MASK         UE0D4_UE0D43_OUT_UE0D43_IN_MASK
#define UE0D4_UE0R44_UE0T44              UE0D4_UE0D44_OUT_UE0D44_IN
#define UE0D4_UE0R44_UE0T44_MASK         UE0D4_UE0D44_OUT_UE0D44_IN_MASK
#define UE0D4_UE0R45_UE0T45              UE0D4_UE0D45_OUT_UE0D45_IN
#define UE0D4_UE0R45_UE0T45_MASK         UE0D4_UE0D45_OUT_UE0D45_IN_MASK
#define UE0D4_UE0R46_UE0T46              UE0D4_UE0D46_OUT_UE0D46_IN
#define UE0D4_UE0R46_UE0T46_MASK         UE0D4_UE0D46_OUT_UE0D46_IN_MASK
#define UE0D4_UE0R47_UE0T47              UE0D4_UE0D47_OUT_UE0D47_IN
#define UE0D4_UE0R47_UE0T47_MASK         UE0D4_UE0D47_OUT_UE0D47_IN_MASK
#define UE0D5_UE0R50_UE0T50              UE0D5_UE0D50_OUT_UE0D50_IN
#define UE0D5_UE0R50_UE0T50_MASK         UE0D5_UE0D50_OUT_UE0D50_IN_MASK
#define UE0D5_UE0R51_UE0T51              UE0D5_UE0D51_OUT_UE0D51_IN
#define UE0D5_UE0R51_UE0T51_MASK         UE0D5_UE0D51_OUT_UE0D51_IN_MASK
#define UE0D5_UE0R52_UE0T52              UE0D5_UE0D52_OUT_UE0D52_IN
#define UE0D5_UE0R52_UE0T52_MASK         UE0D5_UE0D52_OUT_UE0D52_IN_MASK
#define UE0D5_UE0R53_UE0T53              UE0D5_UE0D53_OUT_UE0D53_IN
#define UE0D5_UE0R53_UE0T53_MASK         UE0D5_UE0D53_OUT_UE0D53_IN_MASK
#define UE0D5_UE0R54_UE0T54              UE0D5_UE0D54_OUT_UE0D54_IN
#define UE0D5_UE0R54_UE0T54_MASK         UE0D5_UE0D54_OUT_UE0D54_IN_MASK
#define UE0D5_UE0R55_UE0T55              UE0D5_UE0D55_OUT_UE0D55_IN
#define UE0D5_UE0R55_UE0T55_MASK         UE0D5_UE0D55_OUT_UE0D55_IN_MASK
#define UE0D5_UE0R56_UE0T56              UE0D5_UE0D56_OUT_UE0D56_IN
#define UE0D5_UE0R56_UE0T56_MASK         UE0D5_UE0D56_OUT_UE0D56_IN_MASK
#define UE0D5_UE0R57_UE0T57              UE0D5_UE0D57_OUT_UE0D57_IN
#define UE0D5_UE0R57_UE0T57_MASK         UE0D5_UE0D57_OUT_UE0D57_IN_MASK
#define UE0D6_UE0R60_UE0T60              UE0D6_UE0D60_OUT_UE0D60_IN
#define UE0D6_UE0R60_UE0T60_MASK         UE0D6_UE0D60_OUT_UE0D60_IN_MASK
#define UE0D6_UE0R61_UE0T61              UE0D6_UE0D61_OUT_UE0D61_IN
#define UE0D6_UE0R61_UE0T61_MASK         UE0D6_UE0D61_OUT_UE0D61_IN_MASK
#define UE0D6_UE0R62_UE0T62              UE0D6_UE0D62_OUT_UE0D62_IN
#define UE0D6_UE0R62_UE0T62_MASK         UE0D6_UE0D62_OUT_UE0D62_IN_MASK
#define UE0D6_UE0R63_UE0T63              UE0D6_UE0D63_OUT_UE0D63_IN
#define UE0D6_UE0R63_UE0T63_MASK         UE0D6_UE0D63_OUT_UE0D63_IN_MASK
#define UE0D6_UE0R64_UE0T64              UE0D6_UE0D64_OUT_UE0D64_IN
#define UE0D6_UE0R64_UE0T64_MASK         UE0D6_UE0D64_OUT_UE0D64_IN_MASK
#define UE0D6_UE0R65_UE0T65              UE0D6_UE0D65_OUT_UE0D65_IN
#define UE0D6_UE0R65_UE0T65_MASK         UE0D6_UE0D65_OUT_UE0D65_IN_MASK
#define UE0D6_UE0R66_UE0T66              UE0D6_UE0D66_OUT_UE0D66_IN
#define UE0D6_UE0R66_UE0T66_MASK         UE0D6_UE0D66_OUT_UE0D66_IN_MASK
#define UE0D6_UE0R67_UE0T67              UE0D6_UE0D67_OUT_UE0D67_IN
#define UE0D6_UE0R67_UE0T67_MASK         UE0D6_UE0D67_OUT_UE0D67_IN_MASK
#define UE0D7_UE0R70_UE0T70              UE0D7_UE0D70_OUT_UE0D70_IN
#define UE0D7_UE0R70_UE0T70_MASK         UE0D7_UE0D70_OUT_UE0D70_IN_MASK
#define UE0D7_UE0R71_UE0T71              UE0D7_UE0D71_OUT_UE0D71_IN
#define UE0D7_UE0R71_UE0T71_MASK         UE0D7_UE0D71_OUT_UE0D71_IN_MASK
#define UE0D7_UE0R72_UE0T72              UE0D7_UE0D72_OUT_UE0D72_IN
#define UE0D7_UE0R72_UE0T72_MASK         UE0D7_UE0D72_OUT_UE0D72_IN_MASK
#define UE0D7_UE0R73_UE0T73              UE0D7_UE0D73_OUT_UE0D73_IN
#define UE0D7_UE0R73_UE0T73_MASK         UE0D7_UE0D73_OUT_UE0D73_IN_MASK
#define UE0D7_UE0R74_UE0T74              UE0D7_UE0D74_OUT_UE0D74_IN
#define UE0D7_UE0R74_UE0T74_MASK         UE0D7_UE0D74_OUT_UE0D74_IN_MASK
#define UE0D7_UE0R75_UE0T75              UE0D7_UE0D75_OUT_UE0D75_IN
#define UE0D7_UE0R75_UE0T75_MASK         UE0D7_UE0D75_OUT_UE0D75_IN_MASK
#define UE0D7_UE0R76_UE0T76              UE0D7_UE0D76_OUT_UE0D76_IN
#define UE0D7_UE0R76_UE0T76_MASK         UE0D7_UE0D76_OUT_UE0D76_IN_MASK
#define UE0D7_UE0R77_UE0T77              UE0D7_UE0D77_OUT_UE0D77_IN
#define UE0D7_UE0R77_UE0T77_MASK         UE0D7_UE0D77_OUT_UE0D77_IN_MASK
#define USIMR_USBRSTIE                   USIMR_USBRESETIE
#define USIMR_USBRSTIE_MASK              USIMR_USBRESETIE_MASK
#define CONFIG2_CLKS                     This_symb_has_been_depreciated
#define CONFIG2_CLKS_BITNUM              This_symb_has_been_depreciated
#define CONFIG2_CLKS_MASK                This_symb_has_been_depreciated


/* **** 11.9.2009 12:42:40 */

#define T1CH_ARR                         This_symb_has_been_depreciated
#endif
