/* Based on CPU DB MC68HC908JB16_28, version 2.89.057 (RegistersPrg V2.30) */
/*
** ###################################################################
**     Filename  : mc68hc908jb16.h
**     Processor : MC68HC908JB16DW
**     FileFormat: V2.30
**     DataSheet : MC68HC908JB16/D Rev. 1.1 August 1, 2005
**     Compiler  : CodeWarrior compiler
**     Date/Time : 11.9.2009, 14:08
**     Abstract  :
**         This header implements the mapping of I/O devices.
**
**     Copyright : 1997 - 2009 Freescale Semiconductor, Inc. All Rights Reserved.
**     
**     http      : www.freescale.com
**     mail      : support@freescale.com
**
**     CPU Registers Revisions:
**      - 02.12.2005, V2.89.043:
**              - Added PTD_PTD1..PTD_PTD5, added  DDRD_PTD1..DDRD_PTD5. REASON: Bug-fix (#2820 in Issue Manager) 
**
**     File-Format-Revisions:
**      - 14.11.2005, V2.00 :
**               - Deprecated symbols added for backward compatibility (section at the end of this file)
**      - 15.11.2005, V2.01 :
**               - Changes have not affected this file (because they are related to another family)
**      - 17.12.2005, V2.02 :
**               - Arrays (symbols xx_ARR) are defined as pointer to volatile, see issue #2778
**      - 16.01.2006, V2.03 :
**               - Fixed declaration of non volatile registers. Now it does not require (but allows) their initialization, see issue #2920.
**               - "volatile" modifier removed from declaration of non volatile registers (that contain modifier "const")
**      - 08.03.2006, V2.04 :
**               - Support for bit(s) names duplicated with any register name in .h header files
**      - 24.03.2006, V2.05 :
**               - Changes have not affected this file (because they are related to another family)
**      - 26.04.2006, V2.06 :
**               - Absolute assembly supported (depreciated symbols are not defined)
**      - 27.04.2006, V2.07 :
**               - Fixed macro __RESET_WATCHDOG for HCS12, HCS12X ,HCS08 DZ and HCS08 EN derivatives (write 0x55,0xAA).
**      - 07.06.2006, V2.08 :
**               - For .inc files added constants "RAMStart" and "RAMEnd" even there is only Z_RAM.
**      - 03.07.2006, V2.09 :
**               - Flash commands constants supported
**      - 27.10.2006, V2.10 :
**               - __RESET_WATCHDOG improved formating and re-definition
**      - 23.11.2006, V2.11 :
**               - Changes have not affected this file (because they are related to another family)
**      - 22.01.2007, V2.12 :
**               - Changes have not affected this file (because they are related to another family)
**      - 01.03.2007, V2.13 :
**               - Flash commands constants values converted to HEX format
**      - 02.03.2007, V2.14 :
**               - Interrupt vector numbers added into .H, see VectorNumber_*
**      - 26.03.2007, V2.15 :
**               - Changes have not affected this file (because they are related to another family)
**      - 10.05.2007, V2.16 :
**               - Fixed flash commands definition for ColdFireV1 assembler (equ -> .equ)
**      - 05.06.2007, V2.17 :
**               - Changes have not affected this file (because they are related to another family)
**      - 19.07.2007, V2.18 :
**               - Improved number of blanked lines inside register structures
**      - 06.08.2007, V2.19 :
**               - CPUDB revisions generated ahead of the file-format revisions.
**      - 11.09.2007, V2.20 :
**               - Added comment about initialization of unbonded pins.
**      - 02.01.2008, V2.21 :
**               - Changes have not affected this file (because they are related to another family)
**      - 13.02.2008, V2.22 :
**               - Changes have not affected this file (because they are related to another family)
**      - 20.02.2008, V2.23 :
**               - Changes have not affected this file (because they are related to another family)
**      - 03.07.2008, V2.24 :
**               - Added support for bits with name starting with number (like "1HZ")
**      - 28.11.2008, V2.25 :
**               - StandBy RAM array declaration for ANSI-C added
**      - 1.12.2008, V2.26 :
**               - Duplication of bit (or bit-group) name with register name is not marked as a problem, is register is internal only and it is not displayed in I/O map.
**      - 17.3.2009, V2.27 :
**               - Merged bit-group is not generated, if the name matches with another bit name in the register
**      - 6.4.2009, V2.28 :
**               - Fixed generation of merged bits for bit-groups with a digit at the end, if group-name is defined in CPUDB
**      - 3.8.2009, V2.29 :
**               - If there is just one bits group matching register name, single bits are not generated
**      - 10.9.2009, V2.30 :
**               - Fixed generation of registers arrays.
**
**     Not all general-purpose I/O pins are available on all packages or on all mask sets of a specific
**     derivative device. To avoid extra current drain from floating input pins, the user’s reset
**     initialization routine in the application program must either enable on-chip pull-up devices
**     or change the direction of unconnected pins to outputs so the pins do not float.
** ###################################################################
*/

#ifndef _MC68HC908JB16_H
#define _MC68HC908JB16_H

/* Types definition */
typedef unsigned char byte;
typedef unsigned int word;
typedef unsigned long dword;
typedef unsigned long dlong[2];

/* Watchdog reset macro */
#ifndef __RESET_WATCHDOG
#ifdef _lint
  #define __RESET_WATCHDOG()  /* empty */
#else
  #define __RESET_WATCHDOG() {asm sta COPCTL;}
#endif
#endif /* __RESET_WATCHDOG */

#define REG_BASE 0x0000                /* Base address for the I/O register block */


#pragma MESSAGE DISABLE C1106 /* WARNING C1106: Non-standard bitfield type */

/**************** interrupt vector numbers ****************/
#define VectorNumber_KBI                15
#define VectorNumber_SCITransmit        14
#define VectorNumber_SCIReceive         13
#define VectorNumber_SCIError           12
#define VectorNumber_TIM2Ovr            11
#define VectorNumber_TIM2CH01           10
#define VectorNumber_TIM2CH1            9
#define VectorNumber_TIM2CH0            8
#define VectorNumber_TIM1Ovr            7
#define VectorNumber_TIM1CH01           6
#define VectorNumber_TIM1CH1            5
#define VectorNumber_TIM1CH0            4
#define VectorNumber_IRQ                3
#define VectorNumber_USB                2
#define VectorNumber_SWI                1
#define VectorNumber_RESET              0

/**************** interrupt vector table ****************/
#define INT_KBI                         0x0000FFE0
#define INT_SCITransmit                 0x0000FFE2
#define INT_SCIReceive                  0x0000FFE4
#define INT_SCIError                    0x0000FFE6
#define INT_TIM2Ovr                     0x0000FFE8
#define INT_TIM2CH01                    0x0000FFEA
#define INT_TIM2CH1                     0x0000FFEC
#define INT_TIM2CH0                     0x0000FFEE
#define INT_TIM1Ovr                     0x0000FFF0
#define INT_TIM1CH01                    0x0000FFF2
#define INT_TIM1CH1                     0x0000FFF4
#define INT_TIM1CH0                     0x0000FFF6
#define INT_IRQ                         0x0000FFF8
#define INT_USB                         0x0000FFFA
#define INT_SWI                         0x0000FFFC
#define INT_RESET                       0x0000FFFE

/**************** registers I/O map ****************/

/*** PTA - Port A Data Register; 0x00000000 ***/
typedef union {
  byte Byte;
  struct {
    byte PTA0        :1;                                       /* Port A Data Bit 0 */
    byte PTA1        :1;                                       /* Port A Data Bit 1 */
    byte PTA2        :1;                                       /* Port A Data Bit 2 */
    byte PTA3        :1;                                       /* Port A Data Bit 3 */
    byte PTA4        :1;                                       /* Port A Data Bit 4 */
    byte PTA5        :1;                                       /* Port A Data Bit 5 */
    byte PTA6        :1;                                       /* Port A Data Bit 6 */
    byte PTA7        :1;                                       /* Port A Data Bit 7 */
  } Bits;
} PTASTR;
extern volatile PTASTR _PTA;
#define PTA                             _PTA.Byte
#define PTA_PTA0                        _PTA.Bits.PTA0
#define PTA_PTA1                        _PTA.Bits.PTA1
#define PTA_PTA2                        _PTA.Bits.PTA2
#define PTA_PTA3                        _PTA.Bits.PTA3
#define PTA_PTA4                        _PTA.Bits.PTA4
#define PTA_PTA5                        _PTA.Bits.PTA5
#define PTA_PTA6                        _PTA.Bits.PTA6
#define PTA_PTA7                        _PTA.Bits.PTA7

#define PTA_PTA0_MASK                   1
#define PTA_PTA1_MASK                   2
#define PTA_PTA2_MASK                   4
#define PTA_PTA3_MASK                   8
#define PTA_PTA4_MASK                   16
#define PTA_PTA5_MASK                   32
#define PTA_PTA6_MASK                   64
#define PTA_PTA7_MASK                   128


/*** PTC - Port C Data Register; 0x00000002 ***/
typedef union {
  byte Byte;
  struct {
    byte PTC0        :1;                                       /* Port C Data Bit 0 */
    byte PTC1        :1;                                       /* Port C Data Bit 1 */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
  struct {
    byte grpPTC  :2;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} PTCSTR;
extern volatile PTCSTR _PTC;
#define PTC                             _PTC.Byte
#define PTC_PTC0                        _PTC.Bits.PTC0
#define PTC_PTC1                        _PTC.Bits.PTC1
#define PTC_PTC                         _PTC.MergedBits.grpPTC

#define PTC_PTC0_MASK                   1
#define PTC_PTC1_MASK                   2
#define PTC_PTC_MASK                    3
#define PTC_PTC_BITNUM                  0


/*** PTD - Port D Data Register; 0x00000003 ***/
typedef union {
  byte Byte;
  struct {
    byte PTD0        :1;                                       /* Port D Data Bit 0 */
    byte PTD1        :1;                                       /* Port D Data Bit 1 */
    byte PTD2        :1;                                       /* Port D Data Bit 2 */
    byte PTD3        :1;                                       /* Port D Data Bit 3 */
    byte PTD4        :1;                                       /* Port D Data Bit 4 */
    byte PTD5        :1;                                       /* Port D Data Bit 5 */
    byte             :1; 
    byte             :1; 
  } Bits;
  struct {
    byte grpPTD  :6;
    byte         :1;
    byte         :1;
  } MergedBits;
} PTDSTR;
extern volatile PTDSTR _PTD;
#define PTD                             _PTD.Byte
#define PTD_PTD0                        _PTD.Bits.PTD0
#define PTD_PTD1                        _PTD.Bits.PTD1
#define PTD_PTD2                        _PTD.Bits.PTD2
#define PTD_PTD3                        _PTD.Bits.PTD3
#define PTD_PTD4                        _PTD.Bits.PTD4
#define PTD_PTD5                        _PTD.Bits.PTD5
#define PTD_PTD                         _PTD.MergedBits.grpPTD

#define PTD_PTD0_MASK                   1
#define PTD_PTD1_MASK                   2
#define PTD_PTD2_MASK                   4
#define PTD_PTD3_MASK                   8
#define PTD_PTD4_MASK                   16
#define PTD_PTD5_MASK                   32
#define PTD_PTD_MASK                    63
#define PTD_PTD_BITNUM                  0


/*** DDRA - Data Direction Register A; 0x00000004 ***/
typedef union {
  byte Byte;
  struct {
    byte DDRA0       :1;                                       /* Data Direction Register A Bit 0 */
    byte DDRA1       :1;                                       /* Data Direction Register A Bit 1 */
    byte DDRA2       :1;                                       /* Data Direction Register A Bit 2 */
    byte DDRA3       :1;                                       /* Data Direction Register A Bit 3 */
    byte DDRA4       :1;                                       /* Data Direction Register A Bit 4 */
    byte DDRA5       :1;                                       /* Data Direction Register A Bit 5 */
    byte DDRA6       :1;                                       /* Data Direction Register A Bit 6 */
    byte DDRA7       :1;                                       /* Data Direction Register A Bit 7 */
  } Bits;
} DDRASTR;
extern volatile DDRASTR _DDRA;
#define DDRA                            _DDRA.Byte
#define DDRA_DDRA0                      _DDRA.Bits.DDRA0
#define DDRA_DDRA1                      _DDRA.Bits.DDRA1
#define DDRA_DDRA2                      _DDRA.Bits.DDRA2
#define DDRA_DDRA3                      _DDRA.Bits.DDRA3
#define DDRA_DDRA4                      _DDRA.Bits.DDRA4
#define DDRA_DDRA5                      _DDRA.Bits.DDRA5
#define DDRA_DDRA6                      _DDRA.Bits.DDRA6
#define DDRA_DDRA7                      _DDRA.Bits.DDRA7

#define DDRA_DDRA0_MASK                 1
#define DDRA_DDRA1_MASK                 2
#define DDRA_DDRA2_MASK                 4
#define DDRA_DDRA3_MASK                 8
#define DDRA_DDRA4_MASK                 16
#define DDRA_DDRA5_MASK                 32
#define DDRA_DDRA6_MASK                 64
#define DDRA_DDRA7_MASK                 128


/*** DDRC - Data Direction Register C; 0x00000006 ***/
typedef union {
  byte Byte;
  struct {
    byte DDRC0       :1;                                       /* Data Direction Register C Bit 0 */
    byte DDRC1       :1;                                       /* Data Direction Register C Bit 1 */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
  struct {
    byte grpDDRC :2;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} DDRCSTR;
extern volatile DDRCSTR _DDRC;
#define DDRC                            _DDRC.Byte
#define DDRC_DDRC0                      _DDRC.Bits.DDRC0
#define DDRC_DDRC1                      _DDRC.Bits.DDRC1
#define DDRC_DDRC                       _DDRC.MergedBits.grpDDRC

#define DDRC_DDRC0_MASK                 1
#define DDRC_DDRC1_MASK                 2
#define DDRC_DDRC_MASK                  3
#define DDRC_DDRC_BITNUM                0


/*** DDRD - Data Direction Register D; 0x00000007 ***/
typedef union {
  byte Byte;
  struct {
    byte DDRD0       :1;                                       /* Data Direction Register D Bit 0 */
    byte DDRD1       :1;                                       /* Data Direction Register D Bit 1 */
    byte DDRD2       :1;                                       /* Data Direction Register D Bit 2 */
    byte DDRD3       :1;                                       /* Data Direction Register D Bit 3 */
    byte DDRD4       :1;                                       /* Data Direction Register D Bit 4 */
    byte DDRD5       :1;                                       /* Data Direction Register D Bit 5 */
    byte             :1; 
    byte             :1; 
  } Bits;
  struct {
    byte grpDDRD :6;
    byte         :1;
    byte         :1;
  } MergedBits;
} DDRDSTR;
extern volatile DDRDSTR _DDRD;
#define DDRD                            _DDRD.Byte
#define DDRD_DDRD0                      _DDRD.Bits.DDRD0
#define DDRD_DDRD1                      _DDRD.Bits.DDRD1
#define DDRD_DDRD2                      _DDRD.Bits.DDRD2
#define DDRD_DDRD3                      _DDRD.Bits.DDRD3
#define DDRD_DDRD4                      _DDRD.Bits.DDRD4
#define DDRD_DDRD5                      _DDRD.Bits.DDRD5
#define DDRD_DDRD                       _DDRD.MergedBits.grpDDRD

#define DDRD_DDRD0_MASK                 1
#define DDRD_DDRD1_MASK                 2
#define DDRD_DDRD2_MASK                 4
#define DDRD_DDRD3_MASK                 8
#define DDRD_DDRD4_MASK                 16
#define DDRD_DDRD5_MASK                 32
#define DDRD_DDRD_MASK                  63
#define DDRD_DDRD_BITNUM                0


/*** PTE - Port E Data Register; 0x00000008 ***/
typedef union {
  byte Byte;
  struct {
    byte PTE0        :1;                                       /* Port E Data Bit 0 */
    byte PTE1        :1;                                       /* Port E Data Bit 1 */
    byte PTE2        :1;                                       /* Port E Data Bit 2 */
    byte PTE3        :1;                                       /* Port E Data Bit 3 */
    byte PTE4        :1;                                       /* Port E Data Bit 4 */
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
  struct {
    byte grpPTE  :5;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} PTESTR;
extern volatile PTESTR _PTE;
#define PTE                             _PTE.Byte
#define PTE_PTE0                        _PTE.Bits.PTE0
#define PTE_PTE1                        _PTE.Bits.PTE1
#define PTE_PTE2                        _PTE.Bits.PTE2
#define PTE_PTE3                        _PTE.Bits.PTE3
#define PTE_PTE4                        _PTE.Bits.PTE4
#define PTE_PTE                         _PTE.MergedBits.grpPTE

#define PTE_PTE0_MASK                   1
#define PTE_PTE1_MASK                   2
#define PTE_PTE2_MASK                   4
#define PTE_PTE3_MASK                   8
#define PTE_PTE4_MASK                   16
#define PTE_PTE_MASK                    31
#define PTE_PTE_BITNUM                  0


/*** DDRE - Data Direction Register E; 0x00000009 ***/
typedef union {
  byte Byte;
  struct {
    byte DDRE0       :1;                                       /* Data Direction Register E Bit 0 */
    byte DDRE1       :1;                                       /* Data Direction Register E Bit 1 */
    byte DDRE2       :1;                                       /* Data Direction Register E Bit 2 */
    byte DDRE3       :1;                                       /* Data Direction Register E Bit 3 */
    byte DDRE4       :1;                                       /* Data Direction Register E Bit 4 */
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
  struct {
    byte grpDDRE :5;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} DDRESTR;
extern volatile DDRESTR _DDRE;
#define DDRE                            _DDRE.Byte
#define DDRE_DDRE0                      _DDRE.Bits.DDRE0
#define DDRE_DDRE1                      _DDRE.Bits.DDRE1
#define DDRE_DDRE2                      _DDRE.Bits.DDRE2
#define DDRE_DDRE3                      _DDRE.Bits.DDRE3
#define DDRE_DDRE4                      _DDRE.Bits.DDRE4
#define DDRE_DDRE                       _DDRE.MergedBits.grpDDRE

#define DDRE_DDRE0_MASK                 1
#define DDRE_DDRE1_MASK                 2
#define DDRE_DDRE2_MASK                 4
#define DDRE_DDRE3_MASK                 8
#define DDRE_DDRE4_MASK                 16
#define DDRE_DDRE_MASK                  31
#define DDRE_DDRE_BITNUM                0


/*** T1SC - TIM Status and Control Register TSC; 0x0000000A ***/
typedef union {
  byte Byte;
  struct {
    byte PS0         :1;                                       /* Prescaler Select Bit 0 */
    byte PS1         :1;                                       /* Prescaler Select Bit 1 */
    byte PS2         :1;                                       /* Prescaler Select Bit 2 */
    byte             :1; 
    byte TRST        :1;                                       /* TIM1 Reset Bit */
    byte TSTOP       :1;                                       /* TIM1 Stop Bit */
    byte TOIE        :1;                                       /* TIM1 Overflow Interrupt Enable Bit */
    byte TOF         :1;                                       /* TIM1 Overflow Flag Bit */
  } Bits;
  struct {
    byte grpPS   :3;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} T1SCSTR;
extern volatile T1SCSTR _T1SC;
#define T1SC                            _T1SC.Byte
#define T1SC_PS0                        _T1SC.Bits.PS0
#define T1SC_PS1                        _T1SC.Bits.PS1
#define T1SC_PS2                        _T1SC.Bits.PS2
#define T1SC_TRST                       _T1SC.Bits.TRST
#define T1SC_TSTOP                      _T1SC.Bits.TSTOP
#define T1SC_TOIE                       _T1SC.Bits.TOIE
#define T1SC_TOF                        _T1SC.Bits.TOF
#define T1SC_PS                         _T1SC.MergedBits.grpPS

#define T1SC_PS0_MASK                   1
#define T1SC_PS1_MASK                   2
#define T1SC_PS2_MASK                   4
#define T1SC_TRST_MASK                  16
#define T1SC_TSTOP_MASK                 32
#define T1SC_TOIE_MASK                  64
#define T1SC_TOF_MASK                   128
#define T1SC_PS_MASK                    7
#define T1SC_PS_BITNUM                  0


/*** T1CNT - TIM Counter Register; 0x0000000C ***/
typedef union {
  word Word;
   /* Overlapped registers: */
  struct {
    /*** T1CNTH - TIM Counter Register High; 0x0000000C ***/
    union {
      byte Byte;
    } T1CNTHSTR;
    #define T1CNTH                      _T1CNT.Overlap_STR.T1CNTHSTR.Byte
    

    /*** T1CNTL - TIM Counter Register Low; 0x0000000D ***/
    union {
      byte Byte;
    } T1CNTLSTR;
    #define T1CNTL                      _T1CNT.Overlap_STR.T1CNTLSTR.Byte
    
  } Overlap_STR;

} T1CNTSTR;
extern volatile T1CNTSTR _T1CNT;
#define T1CNT                           _T1CNT.Word


/*** T1MOD - TIM Counter Modulo Register; 0x0000000E ***/
typedef union {
  word Word;
   /* Overlapped registers: */
  struct {
    /*** T1MODH - TIM Counter Modulo Register High; 0x0000000E ***/
    union {
      byte Byte;
    } T1MODHSTR;
    #define T1MODH                      _T1MOD.Overlap_STR.T1MODHSTR.Byte
    

    /*** T1MODL - TIM Counter Modulo Register Low; 0x0000000F ***/
    union {
      byte Byte;
    } T1MODLSTR;
    #define T1MODL                      _T1MOD.Overlap_STR.T1MODLSTR.Byte
    
  } Overlap_STR;

} T1MODSTR;
extern volatile T1MODSTR _T1MOD;
#define T1MOD                           _T1MOD.Word


/*** T1SC0 - TIM Channel 0 Status and Control Register; 0x00000010 ***/
typedef union {
  byte Byte;
  struct {
    byte CH0MAX      :1;                                       /* Channel 0 Maximum Duty Cycle Bit */
    byte TOV0        :1;                                       /* Toggle-On-Overflow Bit */
    byte ELS0A       :1;                                       /* Edge/Level Select Bit A */
    byte ELS0B       :1;                                       /* Edge/Level Select Bit B */
    byte MS0A        :1;                                       /* Mode Select Bit A */
    byte MS0B        :1;                                       /* Mode Select Bit B */
    byte CH0IE       :1;                                       /* Channel 0 Interrupt Enable Bit */
    byte CH0F        :1;                                       /* Channel 0 Flag Bit */
  } Bits;
  struct {
    byte         :1;
    byte grpTOV  :1;
    byte grpELS0x :2;
    byte grpMS0x :2;
    byte         :1;
    byte         :1;
  } MergedBits;
} T1SC0STR;
extern volatile T1SC0STR _T1SC0;
#define T1SC0                           _T1SC0.Byte
#define T1SC0_CH0MAX                    _T1SC0.Bits.CH0MAX
#define T1SC0_TOV0                      _T1SC0.Bits.TOV0
#define T1SC0_ELS0A                     _T1SC0.Bits.ELS0A
#define T1SC0_ELS0B                     _T1SC0.Bits.ELS0B
#define T1SC0_MS0A                      _T1SC0.Bits.MS0A
#define T1SC0_MS0B                      _T1SC0.Bits.MS0B
#define T1SC0_CH0IE                     _T1SC0.Bits.CH0IE
#define T1SC0_CH0F                      _T1SC0.Bits.CH0F
#define T1SC0_ELS0x                     _T1SC0.MergedBits.grpELS0x
#define T1SC0_MS0x                      _T1SC0.MergedBits.grpMS0x

#define T1SC0_CH0MAX_MASK               1
#define T1SC0_TOV0_MASK                 2
#define T1SC0_ELS0A_MASK                4
#define T1SC0_ELS0B_MASK                8
#define T1SC0_MS0A_MASK                 16
#define T1SC0_MS0B_MASK                 32
#define T1SC0_CH0IE_MASK                64
#define T1SC0_CH0F_MASK                 128
#define T1SC0_ELS0x_MASK                12
#define T1SC0_ELS0x_BITNUM              2
#define T1SC0_MS0x_MASK                 48
#define T1SC0_MS0x_BITNUM               4


/*** T1CH0 - TIM Channel 0 Register; 0x00000011 ***/
typedef union {
  word Word;
   /* Overlapped registers: */
  struct {
    /*** T1CH0H - TIM Channel 0 Register High; 0x00000011 ***/
    union {
      byte Byte;
    } T1CH0HSTR;
    #define T1CH0H                      _T1CH0.Overlap_STR.T1CH0HSTR.Byte
    

    /*** T1CH0L - TIM Channel 0 Register Low; 0x00000012 ***/
    union {
      byte Byte;
    } T1CH0LSTR;
    #define T1CH0L                      _T1CH0.Overlap_STR.T1CH0LSTR.Byte
    
  } Overlap_STR;

} T1CH0STR;
extern volatile T1CH0STR _T1CH0;
#define T1CH0                           _T1CH0.Word


/*** T1SC1 - TIM Channel 1 Status and Control Register; 0x00000013 ***/
typedef union {
  byte Byte;
  struct {
    byte CH1MAX      :1;                                       /* Channel 1 Maximum Duty Cycle Bit */
    byte TOV1        :1;                                       /* Toggle-On-Overflow Bit */
    byte ELS1A       :1;                                       /* Edge/Level Select Bit A */
    byte ELS1B       :1;                                       /* Edge/Level Select Bit B */
    byte MS1A        :1;                                       /* Mode Select Bit A */
    byte             :1; 
    byte CH1IE       :1;                                       /* Channel 1 Interrupt Enable Bit */
    byte CH1F        :1;                                       /* Channel 1 Flag Bit */
  } Bits;
  struct {
    byte         :1;
    byte grpTOV_1 :1;
    byte grpELS1x :2;
    byte grpMS1x :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} T1SC1STR;
extern volatile T1SC1STR _T1SC1;
#define T1SC1                           _T1SC1.Byte
#define T1SC1_CH1MAX                    _T1SC1.Bits.CH1MAX
#define T1SC1_TOV1                      _T1SC1.Bits.TOV1
#define T1SC1_ELS1A                     _T1SC1.Bits.ELS1A
#define T1SC1_ELS1B                     _T1SC1.Bits.ELS1B
#define T1SC1_MS1A                      _T1SC1.Bits.MS1A
#define T1SC1_CH1IE                     _T1SC1.Bits.CH1IE
#define T1SC1_CH1F                      _T1SC1.Bits.CH1F
#define T1SC1_ELS1x                     _T1SC1.MergedBits.grpELS1x

#define T1SC1_CH1MAX_MASK               1
#define T1SC1_TOV1_MASK                 2
#define T1SC1_ELS1A_MASK                4
#define T1SC1_ELS1B_MASK                8
#define T1SC1_MS1A_MASK                 16
#define T1SC1_CH1IE_MASK                64
#define T1SC1_CH1F_MASK                 128
#define T1SC1_ELS1x_MASK                12
#define T1SC1_ELS1x_BITNUM              2


/*** T1CH1 - TIM Channel 1 Register; 0x00000014 ***/
typedef union {
  word Word;
   /* Overlapped registers: */
  struct {
    /*** T1CH1H - TIM Channel 1 Register High; 0x00000014 ***/
    union {
      byte Byte;
    } T1CH1HSTR;
    #define T1CH1H                      _T1CH1.Overlap_STR.T1CH1HSTR.Byte
    

    /*** T1CH1L - TIM Channel 1 Register Low; 0x00000015 ***/
    union {
      byte Byte;
    } T1CH1LSTR;
    #define T1CH1L                      _T1CH1.Overlap_STR.T1CH1LSTR.Byte
    
  } Overlap_STR;

} T1CH1STR;
extern volatile T1CH1STR _T1CH1;
#define T1CH1                           _T1CH1.Word


/*** KBSCR - Keyboard Status and Control Register; 0x00000016 ***/
typedef union {
  byte Byte;
  struct {
    byte MODEK       :1;                                       /* Keyboard Triggering Sensitivity Bit */
    byte IMASKK      :1;                                       /* Keyboard Interrupt Mask Bit */
    byte ACKK        :1;                                       /* Keyboard Acknowledge Bit */
    byte KEYF        :1;                                       /* Keyboard Flag Bit */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
} KBSCRSTR;
extern volatile KBSCRSTR _KBSCR;
#define KBSCR                           _KBSCR.Byte
#define KBSCR_MODEK                     _KBSCR.Bits.MODEK
#define KBSCR_IMASKK                    _KBSCR.Bits.IMASKK
#define KBSCR_ACKK                      _KBSCR.Bits.ACKK
#define KBSCR_KEYF                      _KBSCR.Bits.KEYF

#define KBSCR_MODEK_MASK                1
#define KBSCR_IMASKK_MASK               2
#define KBSCR_ACKK_MASK                 4
#define KBSCR_KEYF_MASK                 8


/*** KBIER - Keyboard Interrrupt Enable Register KBIER; 0x00000017 ***/
typedef union {
  byte Byte;
  struct {
    byte KBIE0       :1;                                       /* Keyboard Interrupt Enable Bit 0 */
    byte KBIE1       :1;                                       /* Keyboard Interrupt Enable Bit 1 */
    byte KBIE2       :1;                                       /* Keyboard Interrupt Enable Bit 2 */
    byte KBIE3       :1;                                       /* Keyboard Interrupt Enable Bit 3 */
    byte KBIE4       :1;                                       /* Keyboard Interrupt Enable Bit 4 */
    byte KBIE5       :1;                                       /* Keyboard Interrupt Enable Bit 5 */
    byte KBIE6       :1;                                       /* Keyboard Interrupt Enable Bit 6 */
    byte KBIE7       :1;                                       /* Keyboard Interrupt Enable Bit 7 */
  } Bits;
} KBIERSTR;
extern volatile KBIERSTR _KBIER;
#define KBIER                           _KBIER.Byte
#define KBIER_KBIE0                     _KBIER.Bits.KBIE0
#define KBIER_KBIE1                     _KBIER.Bits.KBIE1
#define KBIER_KBIE2                     _KBIER.Bits.KBIE2
#define KBIER_KBIE3                     _KBIER.Bits.KBIE3
#define KBIER_KBIE4                     _KBIER.Bits.KBIE4
#define KBIER_KBIE5                     _KBIER.Bits.KBIE5
#define KBIER_KBIE6                     _KBIER.Bits.KBIE6
#define KBIER_KBIE7                     _KBIER.Bits.KBIE7

#define KBIER_KBIE0_MASK                1
#define KBIER_KBIE1_MASK                2
#define KBIER_KBIE2_MASK                4
#define KBIER_KBIE3_MASK                8
#define KBIER_KBIE4_MASK                16
#define KBIER_KBIE5_MASK                32
#define KBIER_KBIE6_MASK                64
#define KBIER_KBIE7_MASK                128


/*** UIR2 - USB Interrupt Register 2; 0x00000018 ***/
typedef union {
  byte Byte;
  struct {
    byte RXD0FR      :1;                                       /* Endpoint 0 Receive Flag Reset */
    byte TXD0FR      :1;                                       /* Endpoint 0 Transmit Flag Reset */
    byte RESUMFR     :1;                                       /* Resume Flag Reset */
    byte TXD1FR      :1;                                       /* Endpoint 1 Transmit Flag Reset */
    byte RXD2FR      :1;                                       /* Endpoint 2 Receive Flag Reset */
    byte TXD2FR      :1;                                       /* Endpoint 2 Transmit Flag Reset */
    byte RSTFR       :1;                                       /* Clear Reset Indicator Bit */
    byte EOPFR       :1;                                       /* End-of-Packet Flag Reset */
  } Bits;
} UIR2STR;
extern volatile UIR2STR _UIR2;
#define UIR2                            _UIR2.Byte
#define UIR2_RXD0FR                     _UIR2.Bits.RXD0FR
#define UIR2_TXD0FR                     _UIR2.Bits.TXD0FR
#define UIR2_RESUMFR                    _UIR2.Bits.RESUMFR
#define UIR2_TXD1FR                     _UIR2.Bits.TXD1FR
#define UIR2_RXD2FR                     _UIR2.Bits.RXD2FR
#define UIR2_TXD2FR                     _UIR2.Bits.TXD2FR
#define UIR2_RSTFR                      _UIR2.Bits.RSTFR
#define UIR2_EOPFR                      _UIR2.Bits.EOPFR

#define UIR2_RXD0FR_MASK                1
#define UIR2_TXD0FR_MASK                2
#define UIR2_RESUMFR_MASK               4
#define UIR2_TXD1FR_MASK                8
#define UIR2_RXD2FR_MASK                16
#define UIR2_TXD2FR_MASK                32
#define UIR2_RSTFR_MASK                 64
#define UIR2_EOPFR_MASK                 128


/*** UCR2 - USB Control Register 2; 0x00000019 ***/
typedef union {
  byte Byte;
  struct {
    byte TP2SIZ0     :1;                                       /* Endpoint 2 Transmit Data Packet Size Bit 0 */
    byte TP2SIZ1     :1;                                       /* Endpoint 2 Transmit Data Packet Size Bit 1 */
    byte TP2SIZ2     :1;                                       /* Endpoint 2 Transmit Data Packet Size Bit 2 */
    byte TP2SIZ3     :1;                                       /* Endpoint 2 Transmit Data Packet Size Bit 3 */
    byte RX2E        :1;                                       /* Endpoint 2 Receive Enable */
    byte TX2E        :1;                                       /* Endpoint 2 Transmit Enable */
    byte STALL2      :1;                                       /* Endpoint 2 Force Stall Bit */
    byte T2SEQ       :1;                                       /* Endpoint 2 Transmit Sequence Bit */
  } Bits;
  struct {
    byte grpTP2SIZ :4;
    byte         :1;
    byte         :1;
    byte grpSTALL_2 :1;
    byte         :1;
  } MergedBits;
} UCR2STR;
extern volatile UCR2STR _UCR2;
#define UCR2                            _UCR2.Byte
#define UCR2_TP2SIZ0                    _UCR2.Bits.TP2SIZ0
#define UCR2_TP2SIZ1                    _UCR2.Bits.TP2SIZ1
#define UCR2_TP2SIZ2                    _UCR2.Bits.TP2SIZ2
#define UCR2_TP2SIZ3                    _UCR2.Bits.TP2SIZ3
#define UCR2_RX2E                       _UCR2.Bits.RX2E
#define UCR2_TX2E                       _UCR2.Bits.TX2E
#define UCR2_STALL2                     _UCR2.Bits.STALL2
#define UCR2_T2SEQ                      _UCR2.Bits.T2SEQ
#define UCR2_TP2SIZ                     _UCR2.MergedBits.grpTP2SIZ

#define UCR2_TP2SIZ0_MASK               1
#define UCR2_TP2SIZ1_MASK               2
#define UCR2_TP2SIZ2_MASK               4
#define UCR2_TP2SIZ3_MASK               8
#define UCR2_RX2E_MASK                  16
#define UCR2_TX2E_MASK                  32
#define UCR2_STALL2_MASK                64
#define UCR2_T2SEQ_MASK                 128
#define UCR2_TP2SIZ_MASK                15
#define UCR2_TP2SIZ_BITNUM              0


/*** UCR3 - USB Control Register 3; 0x0000001A ***/
typedef union {
  byte Byte;
  struct {
    byte ENABLE1     :1;                                       /* Endpoint 1 Enable */
    byte ENABLE2     :1;                                       /* Endpoint 2 Enable */
    byte PULLEN      :1;                                       /* Pull-up Enable */
    byte             :1; 
    byte ISTALL0     :1;                                       /* Endpoint 0 Force STALL Bit for IN token */
    byte OSTALL0     :1;                                       /* Endpoint 0 Force STALL Bit for OUT token */
    byte TX1STR      :1;                                       /* Clear Endpoint 0 Transmit First Flag */
    byte TX1ST       :1;                                       /* Endpoint 0 Transmit First Flag */
  } Bits;
  struct {
    byte grpENABLE_1 :2;
    byte         :1;
    byte         :1;
    byte grpISTALL :1;
    byte grpOSTALL :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} UCR3STR;
extern volatile UCR3STR _UCR3;
#define UCR3                            _UCR3.Byte
#define UCR3_ENABLE1                    _UCR3.Bits.ENABLE1
#define UCR3_ENABLE2                    _UCR3.Bits.ENABLE2
#define UCR3_PULLEN                     _UCR3.Bits.PULLEN
#define UCR3_ISTALL0                    _UCR3.Bits.ISTALL0
#define UCR3_OSTALL0                    _UCR3.Bits.OSTALL0
#define UCR3_TX1STR                     _UCR3.Bits.TX1STR
#define UCR3_TX1ST                      _UCR3.Bits.TX1ST
#define UCR3_ENABLE_1                   _UCR3.MergedBits.grpENABLE_1
#define UCR3_ENABLE                     UCR3_ENABLE_1

#define UCR3_ENABLE1_MASK               1
#define UCR3_ENABLE2_MASK               2
#define UCR3_PULLEN_MASK                4
#define UCR3_ISTALL0_MASK               16
#define UCR3_OSTALL0_MASK               32
#define UCR3_TX1STR_MASK                64
#define UCR3_TX1ST_MASK                 128
#define UCR3_ENABLE_1_MASK              3
#define UCR3_ENABLE_1_BITNUM            0


/*** UCR4 - USB Control Register 4; 0x0000001B ***/
typedef union {
  byte Byte;
  struct {
    byte FDM         :1;                                       /* Force D- */
    byte FDP         :1;                                       /* Force D+ */
    byte FUSBO       :1;                                       /* Force USB Output */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
} UCR4STR;
extern volatile UCR4STR _UCR4;
#define UCR4                            _UCR4.Byte
#define UCR4_FDM                        _UCR4.Bits.FDM
#define UCR4_FDP                        _UCR4.Bits.FDP
#define UCR4_FUSBO                      _UCR4.Bits.FUSBO

#define UCR4_FDM_MASK                   1
#define UCR4_FDP_MASK                   2
#define UCR4_FUSBO_MASK                 4


/*** IOCR - IRQ Option Register; 0x0000001C ***/
typedef union {
  byte Byte;
  struct {
    byte IRQPD       :1;                                       /* IRQ Pullup Disable */
    byte PTE4IE      :1;                                       /* PTE4 Interrupt Enable */
    byte PTE4IF      :1;                                       /* PTE4 Interrupt Flag */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
} IOCRSTR;
extern volatile IOCRSTR _IOCR;
#define IOCR                            _IOCR.Byte
#define IOCR_IRQPD                      _IOCR.Bits.IRQPD
#define IOCR_PTE4IE                     _IOCR.Bits.PTE4IE
#define IOCR_PTE4IF                     _IOCR.Bits.PTE4IF

#define IOCR_IRQPD_MASK                 1
#define IOCR_PTE4IE_MASK                2
#define IOCR_PTE4IF_MASK                4


/*** POCR - Port Option Control Register; 0x0000001D ***/
typedef union {
  byte Byte;
  struct {
    byte PAP         :1;                                       /* Port A Pullup Enable */
    byte             :1; 
    byte PCP         :1;                                       /* Port C Pullup Enable */
    byte PTE3P       :1;                                       /* Pin PTE3 Pullup Enable */
    byte PTE4P       :1;                                       /* Pin PTE4 Pullup Enable */
    byte PTDILDD     :1;                                       /* Infrared LED Drive Control */
    byte PTDLDD      :1;                                       /* LED Direct Drive Control */
    byte PTE20P      :1;                                       /* Pins PTE[2:0] Pullup Enable */
  } Bits;
} POCRSTR;
extern volatile POCRSTR _POCR;
#define POCR                            _POCR.Byte
#define POCR_PAP                        _POCR.Bits.PAP
#define POCR_PCP                        _POCR.Bits.PCP
#define POCR_PTE3P                      _POCR.Bits.PTE3P
#define POCR_PTE4P                      _POCR.Bits.PTE4P
#define POCR_PTDILDD                    _POCR.Bits.PTDILDD
#define POCR_PTDLDD                     _POCR.Bits.PTDLDD
#define POCR_PTE20P                     _POCR.Bits.PTE20P

#define POCR_PAP_MASK                   1
#define POCR_PCP_MASK                   4
#define POCR_PTE3P_MASK                 8
#define POCR_PTE4P_MASK                 16
#define POCR_PTDILDD_MASK               32
#define POCR_PTDLDD_MASK                64
#define POCR_PTE20P_MASK                128


/*** ISCR - IRQ Status and Control Register; 0x0000001E ***/
typedef union {
  byte Byte;
  struct {
    byte MODE        :1;                                       /* IRQ Edge/Level Select Bit */
    byte IMASK       :1;                                       /* IRQ Interrupt Mask Bit */
    byte ACK         :1;                                       /* IRQ Interrupt Request Acknowledge Bit */
    byte IRQF        :1;                                       /* IRQ Flag Bit */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
} ISCRSTR;
extern volatile ISCRSTR _ISCR;
#define ISCR                            _ISCR.Byte
#define ISCR_MODE                       _ISCR.Bits.MODE
#define ISCR_IMASK                      _ISCR.Bits.IMASK
#define ISCR_ACK                        _ISCR.Bits.ACK
#define ISCR_IRQF                       _ISCR.Bits.IRQF

#define ISCR_MODE_MASK                  1
#define ISCR_IMASK_MASK                 2
#define ISCR_ACK_MASK                   4
#define ISCR_IRQF_MASK                  8


/*** CONFIG - Configuration Register; 0x0000001F ***/
typedef union {
  byte Byte;
  struct {
    byte COPD        :1;                                       /* COP Disable Bit */
    byte STOP        :1;                                       /* STOP Instruction Enable Bit */
    byte COPRS       :1;                                       /* COP Reset Period Selection Bit */
    byte SSREC       :1;                                       /* Short Stop Recovery Bit */
    byte LVID        :1;                                       /* Low Voltage Inhibit Disable Bit */
    byte URSTD       :1;                                       /* USB Reset Disable Bit */
    byte LVI5OR3     :1;                                       /* LVI Trip Point Voltage Select Bit for Vdd */
    byte LVIDR       :1;                                       /* LVI Disable Bit for Vreg */
  } Bits;
} CONFIGSTR;
extern volatile CONFIGSTR _CONFIG;
#define CONFIG                          _CONFIG.Byte
#define CONFIG_COPD                     _CONFIG.Bits.COPD
#define CONFIG_STOP                     _CONFIG.Bits.STOP
#define CONFIG_COPRS                    _CONFIG.Bits.COPRS
#define CONFIG_SSREC                    _CONFIG.Bits.SSREC
#define CONFIG_LVID                     _CONFIG.Bits.LVID
#define CONFIG_URSTD                    _CONFIG.Bits.URSTD
#define CONFIG_LVI5OR3                  _CONFIG.Bits.LVI5OR3
#define CONFIG_LVIDR                    _CONFIG.Bits.LVIDR

#define CONFIG_COPD_MASK                1
#define CONFIG_STOP_MASK                2
#define CONFIG_COPRS_MASK               4
#define CONFIG_SSREC_MASK               8
#define CONFIG_LVID_MASK                16
#define CONFIG_URSTD_MASK               32
#define CONFIG_LVI5OR3_MASK             64
#define CONFIG_LVIDR_MASK               128


/*** UE0D0 - USB Endpoint 0 Data Register 0; 0x00000020 ***/
typedef union {
  byte Byte;
  struct {
    byte UE0R00_UE0T00 :1;                                     /* Endpoint 0 Receive Data Buffer 0 Bit 0, Endpoint 0 Transmit Data Buffer 0 Bit 0 */
    byte UE0R01_UE0T01 :1;                                     /* Endpoint 0 Receive Data Buffer 0 Bit 1, Endpoint 0 Transmit Data Buffer 0 Bit 1 */
    byte UE0R02_UE0T02 :1;                                     /* Endpoint 0 Receive Data Buffer 0 Bit 2, Endpoint 0 Transmit Data Buffer 0 Bit 2 */
    byte UE0R03_UE0T03 :1;                                     /* Endpoint 0 Receive Data Buffer 0 Bit 3, Endpoint 0 Transmit Data Buffer 0 Bit 3 */
    byte UE0R04_UE0T04 :1;                                     /* Endpoint 0 Receive Data Buffer 0 Bit 4, Endpoint 0 Transmit Data Buffer 0 Bit 4 */
    byte UE0R05_UE0T05 :1;                                     /* Endpoint 0 Receive Data Buffer 0 Bit 5, Endpoint 0 Transmit Data Buffer 0 Bit 5 */
    byte UE0R06_UE0T06 :1;                                     /* Endpoint 0 Receive Data Buffer 0 Bit 6, Endpoint 0 Transmit Data Buffer 0 Bit 6 */
    byte UE0R07_UE0T07 :1;                                     /* Endpoint 0 Receive Data Buffer 0 Bit 7, Endpoint 0 Transmit Data Buffer 0 Bit 7 */
  } Bits;
} UE0D0STR;
extern volatile UE0D0STR _UE0D0;
#define UE0D0                           _UE0D0.Byte
#define UE0D0_UE0R00_UE0T00             _UE0D0.Bits.UE0R00_UE0T00
#define UE0D0_UE0R01_UE0T01             _UE0D0.Bits.UE0R01_UE0T01
#define UE0D0_UE0R02_UE0T02             _UE0D0.Bits.UE0R02_UE0T02
#define UE0D0_UE0R03_UE0T03             _UE0D0.Bits.UE0R03_UE0T03
#define UE0D0_UE0R04_UE0T04             _UE0D0.Bits.UE0R04_UE0T04
#define UE0D0_UE0R05_UE0T05             _UE0D0.Bits.UE0R05_UE0T05
#define UE0D0_UE0R06_UE0T06             _UE0D0.Bits.UE0R06_UE0T06
#define UE0D0_UE0R07_UE0T07             _UE0D0.Bits.UE0R07_UE0T07
/* UE0D_ARR: Access 8 UE0Dx registers in an array */
#define UE0D_ARR                        ((volatile byte * __far) &UE0D0)

#define UE0D0_UE0R00_UE0T00_MASK        1
#define UE0D0_UE0R01_UE0T01_MASK        2
#define UE0D0_UE0R02_UE0T02_MASK        4
#define UE0D0_UE0R03_UE0T03_MASK        8
#define UE0D0_UE0R04_UE0T04_MASK        16
#define UE0D0_UE0R05_UE0T05_MASK        32
#define UE0D0_UE0R06_UE0T06_MASK        64
#define UE0D0_UE0R07_UE0T07_MASK        128


/*** UE0D1 - USB Endpoint 0 Data Register 1; 0x00000021 ***/
typedef union {
  byte Byte;
  struct {
    byte UE0R10_UE0T10 :1;                                     /* Endpoint 0 Receive Data Buffer 1 Bit 0, Endpoint 0 Transmit Data Buffer 1 Bit 0 */
    byte UE0R11_UE0T11 :1;                                     /* Endpoint 0 Receive Data Buffer 1 Bit 1, Endpoint 0 Transmit Data Buffer 1 Bit 1 */
    byte UE0R12_UE0T12 :1;                                     /* Endpoint 0 Receive Data Buffer 1 Bit 2, Endpoint 0 Transmit Data Buffer 1 Bit 2 */
    byte UE0R13_UE0T13 :1;                                     /* Endpoint 0 Receive Data Buffer 1 Bit 3, Endpoint 0 Transmit Data Buffer 1 Bit 3 */
    byte UE0R14_UE0T14 :1;                                     /* Endpoint 0 Receive Data Buffer 1 Bit 4, Endpoint 0 Transmit Data Buffer 1 Bit 4 */
    byte UE0R15_UE0T15 :1;                                     /* Endpoint 0 Receive Data Buffer 1 Bit 5, Endpoint 0 Transmit Data Buffer 1 Bit 5 */
    byte UE0R16_UE0T16 :1;                                     /* Endpoint 0 Receive Data Buffer 1 Bit 6, Endpoint 0 Transmit Data Buffer 1 Bit 6 */
    byte UE0R17_UE0T17 :1;                                     /* Endpoint 0 Receive Data Buffer 1 Bit 7, Endpoint 0 Transmit Data Buffer 1 Bit 7 */
  } Bits;
} UE0D1STR;
extern volatile UE0D1STR _UE0D1;
#define UE0D1                           _UE0D1.Byte
#define UE0D1_UE0R10_UE0T10             _UE0D1.Bits.UE0R10_UE0T10
#define UE0D1_UE0R11_UE0T11             _UE0D1.Bits.UE0R11_UE0T11
#define UE0D1_UE0R12_UE0T12             _UE0D1.Bits.UE0R12_UE0T12
#define UE0D1_UE0R13_UE0T13             _UE0D1.Bits.UE0R13_UE0T13
#define UE0D1_UE0R14_UE0T14             _UE0D1.Bits.UE0R14_UE0T14
#define UE0D1_UE0R15_UE0T15             _UE0D1.Bits.UE0R15_UE0T15
#define UE0D1_UE0R16_UE0T16             _UE0D1.Bits.UE0R16_UE0T16
#define UE0D1_UE0R17_UE0T17             _UE0D1.Bits.UE0R17_UE0T17

#define UE0D1_UE0R10_UE0T10_MASK        1
#define UE0D1_UE0R11_UE0T11_MASK        2
#define UE0D1_UE0R12_UE0T12_MASK        4
#define UE0D1_UE0R13_UE0T13_MASK        8
#define UE0D1_UE0R14_UE0T14_MASK        16
#define UE0D1_UE0R15_UE0T15_MASK        32
#define UE0D1_UE0R16_UE0T16_MASK        64
#define UE0D1_UE0R17_UE0T17_MASK        128


/*** UE0D2 - USB Endpoint 0 Data Register 2; 0x00000022 ***/
typedef union {
  byte Byte;
  struct {
    byte UE0R20_UE0T20 :1;                                     /* Endpoint 0 Receive Data Buffer 2 Bit 0, Endpoint 0 Transmit Data Buffer 2 Bit 0 */
    byte UE0R21_UE0T21 :1;                                     /* Endpoint 0 Receive Data Buffer 2 Bit 1, Endpoint 0 Transmit Data Buffer 2 Bit 1 */
    byte UE0R22_UE0T22 :1;                                     /* Endpoint 0 Receive Data Buffer 2 Bit 2, Endpoint 0 Transmit Data Buffer 2 Bit 2 */
    byte UE0R23_UE0T23 :1;                                     /* Endpoint 0 Receive Data Buffer 2 Bit 3, Endpoint 0 Transmit Data Buffer 2 Bit 3 */
    byte UE0R24_UE0T24 :1;                                     /* Endpoint 0 Receive Data Buffer 2 Bit 4, Endpoint 0 Transmit Data Buffer 2 Bit 4 */
    byte UE0R25_UE0T25 :1;                                     /* Endpoint 0 Receive Data Buffer 2 Bit 5, Endpoint 0 Transmit Data Buffer 2 Bit 5 */
    byte UE0R26_UE0T26 :1;                                     /* Endpoint 0 Receive Data Buffer 2 Bit 6, Endpoint 0 Transmit Data Buffer 2 Bit 6 */
    byte UE0R27_UE0T27 :1;                                     /* Endpoint 0 Receive Data Buffer 2 Bit 7, Endpoint 0 Transmit Data Buffer 2 Bit 7 */
  } Bits;
} UE0D2STR;
extern volatile UE0D2STR _UE0D2;
#define UE0D2                           _UE0D2.Byte
#define UE0D2_UE0R20_UE0T20             _UE0D2.Bits.UE0R20_UE0T20
#define UE0D2_UE0R21_UE0T21             _UE0D2.Bits.UE0R21_UE0T21
#define UE0D2_UE0R22_UE0T22             _UE0D2.Bits.UE0R22_UE0T22
#define UE0D2_UE0R23_UE0T23             _UE0D2.Bits.UE0R23_UE0T23
#define UE0D2_UE0R24_UE0T24             _UE0D2.Bits.UE0R24_UE0T24
#define UE0D2_UE0R25_UE0T25             _UE0D2.Bits.UE0R25_UE0T25
#define UE0D2_UE0R26_UE0T26             _UE0D2.Bits.UE0R26_UE0T26
#define UE0D2_UE0R27_UE0T27             _UE0D2.Bits.UE0R27_UE0T27

#define UE0D2_UE0R20_UE0T20_MASK        1
#define UE0D2_UE0R21_UE0T21_MASK        2
#define UE0D2_UE0R22_UE0T22_MASK        4
#define UE0D2_UE0R23_UE0T23_MASK        8
#define UE0D2_UE0R24_UE0T24_MASK        16
#define UE0D2_UE0R25_UE0T25_MASK        32
#define UE0D2_UE0R26_UE0T26_MASK        64
#define UE0D2_UE0R27_UE0T27_MASK        128


/*** UE0D3 - USB Endpoint 0 Data Register 3; 0x00000023 ***/
typedef union {
  byte Byte;
  struct {
    byte UE0R30_UE0T30 :1;                                     /* Endpoint 0 Receive Data Buffer 3 Bit 0, Endpoint 0 Transmit Data Buffer 3 Bit 0 */
    byte UE0R31_UE0T31 :1;                                     /* Endpoint 0 Receive Data Buffer 3 Bit 1, Endpoint 0 Transmit Data Buffer 3 Bit 1 */
    byte UE0R32_UE0T32 :1;                                     /* Endpoint 0 Receive Data Buffer 3 Bit 2, Endpoint 0 Transmit Data Buffer 3 Bit 2 */
    byte UE0R33_UE0T33 :1;                                     /* Endpoint 0 Receive Data Buffer 3 Bit 3, Endpoint 0 Transmit Data Buffer 3 Bit 3 */
    byte UE0R34_UE0T34 :1;                                     /* Endpoint 0 Receive Data Buffer 3 Bit 4, Endpoint 0 Transmit Data Buffer 3 Bit 4 */
    byte UE0R35_UE0T35 :1;                                     /* Endpoint 0 Receive Data Buffer 3 Bit 5, Endpoint 0 Transmit Data Buffer 3 Bit 5 */
    byte UE0R36_UE0T36 :1;                                     /* Endpoint 0 Receive Data Buffer 3 Bit 6, Endpoint 0 Transmit Data Buffer 3 Bit 6 */
    byte UE0R37_UE0T37 :1;                                     /* Endpoint 0 Receive Data Buffer 3 Bit 7, Endpoint 0 Transmit Data Buffer 3 Bit 7 */
  } Bits;
} UE0D3STR;
extern volatile UE0D3STR _UE0D3;
#define UE0D3                           _UE0D3.Byte
#define UE0D3_UE0R30_UE0T30             _UE0D3.Bits.UE0R30_UE0T30
#define UE0D3_UE0R31_UE0T31             _UE0D3.Bits.UE0R31_UE0T31
#define UE0D3_UE0R32_UE0T32             _UE0D3.Bits.UE0R32_UE0T32
#define UE0D3_UE0R33_UE0T33             _UE0D3.Bits.UE0R33_UE0T33
#define UE0D3_UE0R34_UE0T34             _UE0D3.Bits.UE0R34_UE0T34
#define UE0D3_UE0R35_UE0T35             _UE0D3.Bits.UE0R35_UE0T35
#define UE0D3_UE0R36_UE0T36             _UE0D3.Bits.UE0R36_UE0T36
#define UE0D3_UE0R37_UE0T37             _UE0D3.Bits.UE0R37_UE0T37

#define UE0D3_UE0R30_UE0T30_MASK        1
#define UE0D3_UE0R31_UE0T31_MASK        2
#define UE0D3_UE0R32_UE0T32_MASK        4
#define UE0D3_UE0R33_UE0T33_MASK        8
#define UE0D3_UE0R34_UE0T34_MASK        16
#define UE0D3_UE0R35_UE0T35_MASK        32
#define UE0D3_UE0R36_UE0T36_MASK        64
#define UE0D3_UE0R37_UE0T37_MASK        128


/*** UE0D4 - USB Endpoint 0 Data Register 4; 0x00000024 ***/
typedef union {
  byte Byte;
  struct {
    byte UE0R40_UE0T40 :1;                                     /* Endpoint 0 Receive Data Buffer 4 Bit 0, Endpoint 0 Transmit Data Buffer 4 Bit 0 */
    byte UE0R41_UE0T41 :1;                                     /* Endpoint 0 Receive Data Buffer 4 Bit 1, Endpoint 0 Transmit Data Buffer 4 Bit 1 */
    byte UE0R42_UE0T42 :1;                                     /* Endpoint 0 Receive Data Buffer 4 Bit 2, Endpoint 0 Transmit Data Buffer 4 Bit 2 */
    byte UE0R43_UE0T43 :1;                                     /* Endpoint 0 Receive Data Buffer 4 Bit 3, Endpoint 0 Transmit Data Buffer 4 Bit 3 */
    byte UE0R44_UE0T44 :1;                                     /* Endpoint 0 Receive Data Buffer 4 Bit 4, Endpoint 0 Transmit Data Buffer 4 Bit 4 */
    byte UE0R45_UE0T45 :1;                                     /* Endpoint 0 Receive Data Buffer 4 Bit 5, Endpoint 0 Transmit Data Buffer 4 Bit 5 */
    byte UE0R46_UE0T46 :1;                                     /* Endpoint 0 Receive Data Buffer 4 Bit 6, Endpoint 0 Transmit Data Buffer 4 Bit 6 */
    byte UE0R47_UE0T47 :1;                                     /* Endpoint 0 Receive Data Buffer 4 Bit 7, Endpoint 0 Transmit Data Buffer 4 Bit 7 */
  } Bits;
} UE0D4STR;
extern volatile UE0D4STR _UE0D4;
#define UE0D4                           _UE0D4.Byte
#define UE0D4_UE0R40_UE0T40             _UE0D4.Bits.UE0R40_UE0T40
#define UE0D4_UE0R41_UE0T41             _UE0D4.Bits.UE0R41_UE0T41
#define UE0D4_UE0R42_UE0T42             _UE0D4.Bits.UE0R42_UE0T42
#define UE0D4_UE0R43_UE0T43             _UE0D4.Bits.UE0R43_UE0T43
#define UE0D4_UE0R44_UE0T44             _UE0D4.Bits.UE0R44_UE0T44
#define UE0D4_UE0R45_UE0T45             _UE0D4.Bits.UE0R45_UE0T45
#define UE0D4_UE0R46_UE0T46             _UE0D4.Bits.UE0R46_UE0T46
#define UE0D4_UE0R47_UE0T47             _UE0D4.Bits.UE0R47_UE0T47

#define UE0D4_UE0R40_UE0T40_MASK        1
#define UE0D4_UE0R41_UE0T41_MASK        2
#define UE0D4_UE0R42_UE0T42_MASK        4
#define UE0D4_UE0R43_UE0T43_MASK        8
#define UE0D4_UE0R44_UE0T44_MASK        16
#define UE0D4_UE0R45_UE0T45_MASK        32
#define UE0D4_UE0R46_UE0T46_MASK        64
#define UE0D4_UE0R47_UE0T47_MASK        128


/*** UE0D5 - USB Endpoint 0 Data Register 5; 0x00000025 ***/
typedef union {
  byte Byte;
  struct {
    byte UE0R50_UE0T50 :1;                                     /* Endpoint 0 Receive Data Buffer 5 Bit 0, Endpoint 0 Transmit Data Buffer 5 Bit 0 */
    byte UE0R51_UE0T51 :1;                                     /* Endpoint 0 Receive Data Buffer 5 Bit 1, Endpoint 0 Transmit Data Buffer 5 Bit 1 */
    byte UE0R52_UE0T52 :1;                                     /* Endpoint 0 Receive Data Buffer 5 Bit 2, Endpoint 0 Transmit Data Buffer 5 Bit 2 */
    byte UE0R53_UE0T53 :1;                                     /* Endpoint 0 Receive Data Buffer 5 Bit 3, Endpoint 0 Transmit Data Buffer 5 Bit 3 */
    byte UE0R54_UE0T54 :1;                                     /* Endpoint 0 Receive Data Buffer 5 Bit 4, Endpoint 0 Transmit Data Buffer 5 Bit 4 */
    byte UE0R55_UE0T55 :1;                                     /* Endpoint 0 Receive Data Buffer 5 Bit 5, Endpoint 0 Transmit Data Buffer 5 Bit 5 */
    byte UE0R56_UE0T56 :1;                                     /* Endpoint 0 Receive Data Buffer 5 Bit 6, Endpoint 0 Transmit Data Buffer 5 Bit 6 */
    byte UE0R57_UE0T57 :1;                                     /* Endpoint 0 Receive Data Buffer 5 Bit 7, Endpoint 0 Transmit Data Buffer 5 Bit 7 */
  } Bits;
} UE0D5STR;
extern volatile UE0D5STR _UE0D5;
#define UE0D5                           _UE0D5.Byte
#define UE0D5_UE0R50_UE0T50             _UE0D5.Bits.UE0R50_UE0T50
#define UE0D5_UE0R51_UE0T51             _UE0D5.Bits.UE0R51_UE0T51
#define UE0D5_UE0R52_UE0T52             _UE0D5.Bits.UE0R52_UE0T52
#define UE0D5_UE0R53_UE0T53             _UE0D5.Bits.UE0R53_UE0T53
#define UE0D5_UE0R54_UE0T54             _UE0D5.Bits.UE0R54_UE0T54
#define UE0D5_UE0R55_UE0T55             _UE0D5.Bits.UE0R55_UE0T55
#define UE0D5_UE0R56_UE0T56             _UE0D5.Bits.UE0R56_UE0T56
#define UE0D5_UE0R57_UE0T57             _UE0D5.Bits.UE0R57_UE0T57

#define UE0D5_UE0R50_UE0T50_MASK        1
#define UE0D5_UE0R51_UE0T51_MASK        2
#define UE0D5_UE0R52_UE0T52_MASK        4
#define UE0D5_UE0R53_UE0T53_MASK        8
#define UE0D5_UE0R54_UE0T54_MASK        16
#define UE0D5_UE0R55_UE0T55_MASK        32
#define UE0D5_UE0R56_UE0T56_MASK        64
#define UE0D5_UE0R57_UE0T57_MASK        128


/*** UE0D6 - USB Endpoint 0 Data Register 6; 0x00000026 ***/
typedef union {
  byte Byte;
  struct {
    byte UE0R60_UE0T60 :1;                                     /* Endpoint 0 Receive Data Buffer 6 Bit 0, Endpoint 0 Transmit Data Buffer 6 Bit 0 */
    byte UE0R61_UE0T61 :1;                                     /* Endpoint 0 Receive Data Buffer 6 Bit 1, Endpoint 0 Transmit Data Buffer 6 Bit 1 */
    byte UE0R62_UE0T62 :1;                                     /* Endpoint 0 Receive Data Buffer 6 Bit 2, Endpoint 0 Transmit Data Buffer 6 Bit 2 */
    byte UE0R63_UE0T63 :1;                                     /* Endpoint 0 Receive Data Buffer 6 Bit 3, Endpoint 0 Transmit Data Buffer 6 Bit 3 */
    byte UE0R64_UE0T64 :1;                                     /* Endpoint 0 Receive Data Buffer 6 Bit 4, Endpoint 0 Transmit Data Buffer 6 Bit 4 */
    byte UE0R65_UE0T65 :1;                                     /* Endpoint 0 Receive Data Buffer 6 Bit 5, Endpoint 0 Transmit Data Buffer 6 Bit 5 */
    byte UE0R66_UE0T66 :1;                                     /* Endpoint 0 Receive Data Buffer 6 Bit 6, Endpoint 0 Transmit Data Buffer 6 Bit 6 */
    byte UE0R67_UE0T67 :1;                                     /* Endpoint 0 Receive Data Buffer 6 Bit 7, Endpoint 0 Transmit Data Buffer 6 Bit 7 */
  } Bits;
} UE0D6STR;
extern volatile UE0D6STR _UE0D6;
#define UE0D6                           _UE0D6.Byte
#define UE0D6_UE0R60_UE0T60             _UE0D6.Bits.UE0R60_UE0T60
#define UE0D6_UE0R61_UE0T61             _UE0D6.Bits.UE0R61_UE0T61
#define UE0D6_UE0R62_UE0T62             _UE0D6.Bits.UE0R62_UE0T62
#define UE0D6_UE0R63_UE0T63             _UE0D6.Bits.UE0R63_UE0T63
#define UE0D6_UE0R64_UE0T64             _UE0D6.Bits.UE0R64_UE0T64
#define UE0D6_UE0R65_UE0T65             _UE0D6.Bits.UE0R65_UE0T65
#define UE0D6_UE0R66_UE0T66             _UE0D6.Bits.UE0R66_UE0T66
#define UE0D6_UE0R67_UE0T67             _UE0D6.Bits.UE0R67_UE0T67

#define UE0D6_UE0R60_UE0T60_MASK        1
#define UE0D6_UE0R61_UE0T61_MASK        2
#define UE0D6_UE0R62_UE0T62_MASK        4
#define UE0D6_UE0R63_UE0T63_MASK        8
#define UE0D6_UE0R64_UE0T64_MASK        16
#define UE0D6_UE0R65_UE0T65_MASK        32
#define UE0D6_UE0R66_UE0T66_MASK        64
#define UE0D6_UE0R67_UE0T67_MASK        128


/*** UE0D7 - USB Endpoint 0 Data Register 7; 0x00000027 ***/
typedef union {
  byte Byte;
  struct {
    byte UE0R70_UE0T70 :1;                                     /* Endpoint 0 Receive Data Buffer 7 Bit 0, Endpoint 0 Transmit Data Buffer 7 Bit 0 */
    byte UE0R71_UE0T71 :1;                                     /* Endpoint 0 Receive Data Buffer 7 Bit 1, Endpoint 0 Transmit Data Buffer 7 Bit 1 */
    byte UE0R72_UE0T72 :1;                                     /* Endpoint 0 Receive Data Buffer 7 Bit 2, Endpoint 0 Transmit Data Buffer 7 Bit 2 */
    byte UE0R73_UE0T73 :1;                                     /* Endpoint 0 Receive Data Buffer 7 Bit 3, Endpoint 0 Transmit Data Buffer 7 Bit 3 */
    byte UE0R74_UE0T74 :1;                                     /* Endpoint 0 Receive Data Buffer 7 Bit 4, Endpoint 0 Transmit Data Buffer 7 Bit 4 */
    byte UE0R75_UE0T75 :1;                                     /* Endpoint 0 Receive Data Buffer 7 Bit 5, Endpoint 0 Transmit Data Buffer 7 Bit 5 */
    byte UE0R76_UE0T76 :1;                                     /* Endpoint 0 Receive Data Buffer 7 Bit 6, Endpoint 0 Transmit Data Buffer 7 Bit 6 */
    byte UE0R77_UE0T77 :1;                                     /* Endpoint 0 Receive Data Buffer 7 Bit 7, Endpoint 0 Transmit Data Buffer 7 Bit 7 */
  } Bits;
} UE0D7STR;
extern volatile UE0D7STR _UE0D7;
#define UE0D7                           _UE0D7.Byte
#define UE0D7_UE0R70_UE0T70             _UE0D7.Bits.UE0R70_UE0T70
#define UE0D7_UE0R71_UE0T71             _UE0D7.Bits.UE0R71_UE0T71
#define UE0D7_UE0R72_UE0T72             _UE0D7.Bits.UE0R72_UE0T72
#define UE0D7_UE0R73_UE0T73             _UE0D7.Bits.UE0R73_UE0T73
#define UE0D7_UE0R74_UE0T74             _UE0D7.Bits.UE0R74_UE0T74
#define UE0D7_UE0R75_UE0T75             _UE0D7.Bits.UE0R75_UE0T75
#define UE0D7_UE0R76_UE0T76             _UE0D7.Bits.UE0R76_UE0T76
#define UE0D7_UE0R77_UE0T77             _UE0D7.Bits.UE0R77_UE0T77

#define UE0D7_UE0R70_UE0T70_MASK        1
#define UE0D7_UE0R71_UE0T71_MASK        2
#define UE0D7_UE0R72_UE0T72_MASK        4
#define UE0D7_UE0R73_UE0T73_MASK        8
#define UE0D7_UE0R74_UE0T74_MASK        16
#define UE0D7_UE0R75_UE0T75_MASK        32
#define UE0D7_UE0R76_UE0T76_MASK        64
#define UE0D7_UE0R77_UE0T77_MASK        128


/*** UE1D0 - USB Endpoint 1 Data Register 0; 0x00000028 ***/
typedef union {
  byte Byte;
  struct {
    byte UE1T00      :1;                                       /* Endpoint 1 Transmit Data Buffer 0 Bit 0 */
    byte UE1T01      :1;                                       /* Endpoint 1 Transmit Data Buffer 0 Bit 1 */
    byte UE1T02      :1;                                       /* Endpoint 1 Transmit Data Buffer 0 Bit 2 */
    byte UE1T03      :1;                                       /* Endpoint 1 Transmit Data Buffer 0 Bit 3 */
    byte UE1T04      :1;                                       /* Endpoint 1 Transmit Data Buffer 0 Bit 4 */
    byte UE1T05      :1;                                       /* Endpoint 1 Transmit Data Buffer 0 Bit 5 */
    byte UE1T06      :1;                                       /* Endpoint 1 Transmit Data Buffer 0 Bit 6 */
    byte UE1T07      :1;                                       /* Endpoint 1 Transmit Data Buffer 0 Bit 7 */
  } Bits;
} UE1D0STR;
extern volatile UE1D0STR _UE1D0;
#define UE1D0                           _UE1D0.Byte
#define UE1D0_UE1T00                    _UE1D0.Bits.UE1T00
#define UE1D0_UE1T01                    _UE1D0.Bits.UE1T01
#define UE1D0_UE1T02                    _UE1D0.Bits.UE1T02
#define UE1D0_UE1T03                    _UE1D0.Bits.UE1T03
#define UE1D0_UE1T04                    _UE1D0.Bits.UE1T04
#define UE1D0_UE1T05                    _UE1D0.Bits.UE1T05
#define UE1D0_UE1T06                    _UE1D0.Bits.UE1T06
#define UE1D0_UE1T07                    _UE1D0.Bits.UE1T07
/* UE1D_ARR: Access 8 UE1Dx registers in an array */
#define UE1D_ARR                        ((volatile byte * __far) &UE1D0)

#define UE1D0_UE1T00_MASK               1
#define UE1D0_UE1T01_MASK               2
#define UE1D0_UE1T02_MASK               4
#define UE1D0_UE1T03_MASK               8
#define UE1D0_UE1T04_MASK               16
#define UE1D0_UE1T05_MASK               32
#define UE1D0_UE1T06_MASK               64
#define UE1D0_UE1T07_MASK               128


/*** UE1D1 - USB Endpoint 1 Data Register 1; 0x00000029 ***/
typedef union {
  byte Byte;
  struct {
    byte UE1T10      :1;                                       /* Endpoint 1 Transmit Data Buffer 1 Bit 0 */
    byte UE1T11      :1;                                       /* Endpoint 1 Transmit Data Buffer 1 Bit 1 */
    byte UE1T12      :1;                                       /* Endpoint 1 Transmit Data Buffer 1 Bit 2 */
    byte UE1T13      :1;                                       /* Endpoint 1 Transmit Data Buffer 1 Bit 3 */
    byte UE1T14      :1;                                       /* Endpoint 1 Transmit Data Buffer 1 Bit 4 */
    byte UE1T15      :1;                                       /* Endpoint 1 Transmit Data Buffer 1 Bit 5 */
    byte UE1T16      :1;                                       /* Endpoint 1 Transmit Data Buffer 1 Bit 6 */
    byte UE1T17      :1;                                       /* Endpoint 1 Transmit Data Buffer 1 Bit 7 */
  } Bits;
} UE1D1STR;
extern volatile UE1D1STR _UE1D1;
#define UE1D1                           _UE1D1.Byte
#define UE1D1_UE1T10                    _UE1D1.Bits.UE1T10
#define UE1D1_UE1T11                    _UE1D1.Bits.UE1T11
#define UE1D1_UE1T12                    _UE1D1.Bits.UE1T12
#define UE1D1_UE1T13                    _UE1D1.Bits.UE1T13
#define UE1D1_UE1T14                    _UE1D1.Bits.UE1T14
#define UE1D1_UE1T15                    _UE1D1.Bits.UE1T15
#define UE1D1_UE1T16                    _UE1D1.Bits.UE1T16
#define UE1D1_UE1T17                    _UE1D1.Bits.UE1T17

#define UE1D1_UE1T10_MASK               1
#define UE1D1_UE1T11_MASK               2
#define UE1D1_UE1T12_MASK               4
#define UE1D1_UE1T13_MASK               8
#define UE1D1_UE1T14_MASK               16
#define UE1D1_UE1T15_MASK               32
#define UE1D1_UE1T16_MASK               64
#define UE1D1_UE1T17_MASK               128


/*** UE1D2 - USB Endpoint 1 Data Register 2; 0x0000002A ***/
typedef union {
  byte Byte;
  struct {
    byte UE1T20      :1;                                       /* Endpoint 1 Transmit Data Buffer 2 Bit 0 */
    byte UE1T21      :1;                                       /* Endpoint 1 Transmit Data Buffer 2 Bit 1 */
    byte UE1T22      :1;                                       /* Endpoint 1 Transmit Data Buffer 2 Bit 2 */
    byte UE1T23      :1;                                       /* Endpoint 1 Transmit Data Buffer 2 Bit 3 */
    byte UE1T24      :1;                                       /* Endpoint 1 Transmit Data Buffer 2 Bit 4 */
    byte UE1T25      :1;                                       /* Endpoint 1 Transmit Data Buffer 2 Bit 5 */
    byte UE1T26      :1;                                       /* Endpoint 1 Transmit Data Buffer 2 Bit 6 */
    byte UE1T27      :1;                                       /* Endpoint 1 Transmit Data Buffer 2 Bit 7 */
  } Bits;
} UE1D2STR;
extern volatile UE1D2STR _UE1D2;
#define UE1D2                           _UE1D2.Byte
#define UE1D2_UE1T20                    _UE1D2.Bits.UE1T20
#define UE1D2_UE1T21                    _UE1D2.Bits.UE1T21
#define UE1D2_UE1T22                    _UE1D2.Bits.UE1T22
#define UE1D2_UE1T23                    _UE1D2.Bits.UE1T23
#define UE1D2_UE1T24                    _UE1D2.Bits.UE1T24
#define UE1D2_UE1T25                    _UE1D2.Bits.UE1T25
#define UE1D2_UE1T26                    _UE1D2.Bits.UE1T26
#define UE1D2_UE1T27                    _UE1D2.Bits.UE1T27

#define UE1D2_UE1T20_MASK               1
#define UE1D2_UE1T21_MASK               2
#define UE1D2_UE1T22_MASK               4
#define UE1D2_UE1T23_MASK               8
#define UE1D2_UE1T24_MASK               16
#define UE1D2_UE1T25_MASK               32
#define UE1D2_UE1T26_MASK               64
#define UE1D2_UE1T27_MASK               128


/*** UE1D3 - USB Endpoint 1 Data Register 3; 0x0000002B ***/
typedef union {
  byte Byte;
  struct {
    byte UE1T30      :1;                                       /* Endpoint 1 Transmit Data Buffer 3 Bit 0 */
    byte UE1T31      :1;                                       /* Endpoint 1 Transmit Data Buffer 3 Bit 1 */
    byte UE1T32      :1;                                       /* Endpoint 1 Transmit Data Buffer 3 Bit 2 */
    byte UE1T33      :1;                                       /* Endpoint 1 Transmit Data Buffer 3 Bit 3 */
    byte UE1T34      :1;                                       /* Endpoint 1 Transmit Data Buffer 3 Bit 4 */
    byte UE1T35      :1;                                       /* Endpoint 1 Transmit Data Buffer 3 Bit 5 */
    byte UE1T36      :1;                                       /* Endpoint 1 Transmit Data Buffer 3 Bit 6 */
    byte UE1T37      :1;                                       /* Endpoint 1 Transmit Data Buffer 3 Bit 7 */
  } Bits;
} UE1D3STR;
extern volatile UE1D3STR _UE1D3;
#define UE1D3                           _UE1D3.Byte
#define UE1D3_UE1T30                    _UE1D3.Bits.UE1T30
#define UE1D3_UE1T31                    _UE1D3.Bits.UE1T31
#define UE1D3_UE1T32                    _UE1D3.Bits.UE1T32
#define UE1D3_UE1T33                    _UE1D3.Bits.UE1T33
#define UE1D3_UE1T34                    _UE1D3.Bits.UE1T34
#define UE1D3_UE1T35                    _UE1D3.Bits.UE1T35
#define UE1D3_UE1T36                    _UE1D3.Bits.UE1T36
#define UE1D3_UE1T37                    _UE1D3.Bits.UE1T37

#define UE1D3_UE1T30_MASK               1
#define UE1D3_UE1T31_MASK               2
#define UE1D3_UE1T32_MASK               4
#define UE1D3_UE1T33_MASK               8
#define UE1D3_UE1T34_MASK               16
#define UE1D3_UE1T35_MASK               32
#define UE1D3_UE1T36_MASK               64
#define UE1D3_UE1T37_MASK               128


/*** UE1D4 - USB Endpoint 1 Data Register 4; 0x0000002C ***/
typedef union {
  byte Byte;
  struct {
    byte UE1T40      :1;                                       /* Endpoint 1 Transmit Data Buffer 4 Bit 0 */
    byte UE1T41      :1;                                       /* Endpoint 1 Transmit Data Buffer 4 Bit 1 */
    byte UE1T42      :1;                                       /* Endpoint 1 Transmit Data Buffer 4 Bit 2 */
    byte UE1T43      :1;                                       /* Endpoint 1 Transmit Data Buffer 4 Bit 3 */
    byte UE1T44      :1;                                       /* Endpoint 1 Transmit Data Buffer 4 Bit 4 */
    byte UE1T45      :1;                                       /* Endpoint 1 Transmit Data Buffer 4 Bit 5 */
    byte UE1T46      :1;                                       /* Endpoint 1 Transmit Data Buffer 4 Bit 6 */
    byte UE1T47      :1;                                       /* Endpoint 1 Transmit Data Buffer 4 Bit 7 */
  } Bits;
} UE1D4STR;
extern volatile UE1D4STR _UE1D4;
#define UE1D4                           _UE1D4.Byte
#define UE1D4_UE1T40                    _UE1D4.Bits.UE1T40
#define UE1D4_UE1T41                    _UE1D4.Bits.UE1T41
#define UE1D4_UE1T42                    _UE1D4.Bits.UE1T42
#define UE1D4_UE1T43                    _UE1D4.Bits.UE1T43
#define UE1D4_UE1T44                    _UE1D4.Bits.UE1T44
#define UE1D4_UE1T45                    _UE1D4.Bits.UE1T45
#define UE1D4_UE1T46                    _UE1D4.Bits.UE1T46
#define UE1D4_UE1T47                    _UE1D4.Bits.UE1T47

#define UE1D4_UE1T40_MASK               1
#define UE1D4_UE1T41_MASK               2
#define UE1D4_UE1T42_MASK               4
#define UE1D4_UE1T43_MASK               8
#define UE1D4_UE1T44_MASK               16
#define UE1D4_UE1T45_MASK               32
#define UE1D4_UE1T46_MASK               64
#define UE1D4_UE1T47_MASK               128


/*** UE1D5 - USB Endpoint 1 Data Register 5; 0x0000002D ***/
typedef union {
  byte Byte;
  struct {
    byte UE1T50      :1;                                       /* Endpoint 1 Transmit Data Buffer 5 Bit 0 */
    byte UE1T51      :1;                                       /* Endpoint 1 Transmit Data Buffer 5 Bit 1 */
    byte UE1T52      :1;                                       /* Endpoint 1 Transmit Data Buffer 5 Bit 2 */
    byte UE1T53      :1;                                       /* Endpoint 1 Transmit Data Buffer 5 Bit 3 */
    byte UE1T54      :1;                                       /* Endpoint 1 Transmit Data Buffer 5 Bit 4 */
    byte UE1T55      :1;                                       /* Endpoint 1 Transmit Data Buffer 5 Bit 5 */
    byte UE1T56      :1;                                       /* Endpoint 1 Transmit Data Buffer 5 Bit 6 */
    byte UE1T57      :1;                                       /* Endpoint 1 Transmit Data Buffer 5 Bit 7 */
  } Bits;
} UE1D5STR;
extern volatile UE1D5STR _UE1D5;
#define UE1D5                           _UE1D5.Byte
#define UE1D5_UE1T50                    _UE1D5.Bits.UE1T50
#define UE1D5_UE1T51                    _UE1D5.Bits.UE1T51
#define UE1D5_UE1T52                    _UE1D5.Bits.UE1T52
#define UE1D5_UE1T53                    _UE1D5.Bits.UE1T53
#define UE1D5_UE1T54                    _UE1D5.Bits.UE1T54
#define UE1D5_UE1T55                    _UE1D5.Bits.UE1T55
#define UE1D5_UE1T56                    _UE1D5.Bits.UE1T56
#define UE1D5_UE1T57                    _UE1D5.Bits.UE1T57

#define UE1D5_UE1T50_MASK               1
#define UE1D5_UE1T51_MASK               2
#define UE1D5_UE1T52_MASK               4
#define UE1D5_UE1T53_MASK               8
#define UE1D5_UE1T54_MASK               16
#define UE1D5_UE1T55_MASK               32
#define UE1D5_UE1T56_MASK               64
#define UE1D5_UE1T57_MASK               128


/*** UE1D6 - USB Endpoint 1 Data Register 6; 0x0000002E ***/
typedef union {
  byte Byte;
  struct {
    byte UE1T60      :1;                                       /* Endpoint 1 Transmit Data Buffer 6 Bit 0 */
    byte UE1T61      :1;                                       /* Endpoint 1 Transmit Data Buffer 6 Bit 1 */
    byte UE1T62      :1;                                       /* Endpoint 1 Transmit Data Buffer 6 Bit 2 */
    byte UE1T63      :1;                                       /* Endpoint 1 Transmit Data Buffer 6 Bit 3 */
    byte UE1T64      :1;                                       /* Endpoint 1 Transmit Data Buffer 6 Bit 4 */
    byte UE1T65      :1;                                       /* Endpoint 1 Transmit Data Buffer 6 Bit 5 */
    byte UE1T66      :1;                                       /* Endpoint 1 Transmit Data Buffer 6 Bit 6 */
    byte UE1T67      :1;                                       /* Endpoint 1 Transmit Data Buffer 6 Bit 7 */
  } Bits;
} UE1D6STR;
extern volatile UE1D6STR _UE1D6;
#define UE1D6                           _UE1D6.Byte
#define UE1D6_UE1T60                    _UE1D6.Bits.UE1T60
#define UE1D6_UE1T61                    _UE1D6.Bits.UE1T61
#define UE1D6_UE1T62                    _UE1D6.Bits.UE1T62
#define UE1D6_UE1T63                    _UE1D6.Bits.UE1T63
#define UE1D6_UE1T64                    _UE1D6.Bits.UE1T64
#define UE1D6_UE1T65                    _UE1D6.Bits.UE1T65
#define UE1D6_UE1T66                    _UE1D6.Bits.UE1T66
#define UE1D6_UE1T67                    _UE1D6.Bits.UE1T67

#define UE1D6_UE1T60_MASK               1
#define UE1D6_UE1T61_MASK               2
#define UE1D6_UE1T62_MASK               4
#define UE1D6_UE1T63_MASK               8
#define UE1D6_UE1T64_MASK               16
#define UE1D6_UE1T65_MASK               32
#define UE1D6_UE1T66_MASK               64
#define UE1D6_UE1T67_MASK               128


/*** UE1D7 - USB Endpoint 1 Data Register 7; 0x0000002F ***/
typedef union {
  byte Byte;
  struct {
    byte UE1T70      :1;                                       /* Endpoint 1 Transmit Data Buffer 7 Bit 0 */
    byte UE1T71      :1;                                       /* Endpoint 1 Transmit Data Buffer 7 Bit 1 */
    byte UE1T72      :1;                                       /* Endpoint 1 Transmit Data Buffer 7 Bit 2 */
    byte UE1T73      :1;                                       /* Endpoint 1 Transmit Data Buffer 7 Bit 3 */
    byte UE1T74      :1;                                       /* Endpoint 1 Transmit Data Buffer 7 Bit 4 */
    byte UE1T75      :1;                                       /* Endpoint 1 Transmit Data Buffer 7 Bit 5 */
    byte UE1T76      :1;                                       /* Endpoint 1 Transmit Data Buffer 7 Bit 6 */
    byte UE1T77      :1;                                       /* Endpoint 1 Transmit Data Buffer 7 Bit 7 */
  } Bits;
} UE1D7STR;
extern volatile UE1D7STR _UE1D7;
#define UE1D7                           _UE1D7.Byte
#define UE1D7_UE1T70                    _UE1D7.Bits.UE1T70
#define UE1D7_UE1T71                    _UE1D7.Bits.UE1T71
#define UE1D7_UE1T72                    _UE1D7.Bits.UE1T72
#define UE1D7_UE1T73                    _UE1D7.Bits.UE1T73
#define UE1D7_UE1T74                    _UE1D7.Bits.UE1T74
#define UE1D7_UE1T75                    _UE1D7.Bits.UE1T75
#define UE1D7_UE1T76                    _UE1D7.Bits.UE1T76
#define UE1D7_UE1T77                    _UE1D7.Bits.UE1T77

#define UE1D7_UE1T70_MASK               1
#define UE1D7_UE1T71_MASK               2
#define UE1D7_UE1T72_MASK               4
#define UE1D7_UE1T73_MASK               8
#define UE1D7_UE1T74_MASK               16
#define UE1D7_UE1T75_MASK               32
#define UE1D7_UE1T76_MASK               64
#define UE1D7_UE1T77_MASK               128


/*** UE2D0 - USB Endpoint 2 Data Register 0; 0x00000030 ***/
typedef union {
  byte Byte;
  struct {
    byte UE2R00_UE2T00 :1;                                     /* Endpoint 2 Receive Data Buffer 0 Bit 0, Endpoint 2 Transmit Data Buffer 0 Bit 0 */
    byte UE2R01_UE2T01 :1;                                     /* Endpoint 2 Receive Data Buffer 0 Bit 1, Endpoint 2 Transmit Data Buffer 0 Bit 1 */
    byte UE2R02_UE2T02 :1;                                     /* Endpoint 2 Receive Data Buffer 0 Bit 2, Endpoint 2 Transmit Data Buffer 0 Bit 2 */
    byte UE2R03_UE2T03 :1;                                     /* Endpoint 2 Receive Data Buffer 0 Bit 3, Endpoint 2 Transmit Data Buffer 0 Bit 3 */
    byte UE2R04_UE2T04 :1;                                     /* Endpoint 2 Receive Data Buffer 0 Bit 4, Endpoint 2 Transmit Data Buffer 0 Bit 4 */
    byte UE2R05_UE2T05 :1;                                     /* Endpoint 2 Receive Data Buffer 0 Bit 5, Endpoint 2 Transmit Data Buffer 0 Bit 5 */
    byte UE2R06_UE2T06 :1;                                     /* Endpoint 2 Receive Data Buffer 0 Bit 6, Endpoint 2 Transmit Data Buffer 0 Bit 6 */
    byte UE2R07_UE2T07 :1;                                     /* Endpoint 2 Receive Data Buffer 0 Bit 7, Endpoint 2 Transmit Data Buffer 0 Bit 7 */
  } Bits;
} UE2D0STR;
extern volatile UE2D0STR _UE2D0;
#define UE2D0                           _UE2D0.Byte
#define UE2D0_UE2R00_UE2T00             _UE2D0.Bits.UE2R00_UE2T00
#define UE2D0_UE2R01_UE2T01             _UE2D0.Bits.UE2R01_UE2T01
#define UE2D0_UE2R02_UE2T02             _UE2D0.Bits.UE2R02_UE2T02
#define UE2D0_UE2R03_UE2T03             _UE2D0.Bits.UE2R03_UE2T03
#define UE2D0_UE2R04_UE2T04             _UE2D0.Bits.UE2R04_UE2T04
#define UE2D0_UE2R05_UE2T05             _UE2D0.Bits.UE2R05_UE2T05
#define UE2D0_UE2R06_UE2T06             _UE2D0.Bits.UE2R06_UE2T06
#define UE2D0_UE2R07_UE2T07             _UE2D0.Bits.UE2R07_UE2T07
/* UE2D_ARR: Access 8 UE2Dx registers in an array */
#define UE2D_ARR                        ((volatile byte * __far) &UE2D0)

#define UE2D0_UE2R00_UE2T00_MASK        1
#define UE2D0_UE2R01_UE2T01_MASK        2
#define UE2D0_UE2R02_UE2T02_MASK        4
#define UE2D0_UE2R03_UE2T03_MASK        8
#define UE2D0_UE2R04_UE2T04_MASK        16
#define UE2D0_UE2R05_UE2T05_MASK        32
#define UE2D0_UE2R06_UE2T06_MASK        64
#define UE2D0_UE2R07_UE2T07_MASK        128


/*** UE2D1 - USB Endpoint 2 Data Register 1; 0x00000031 ***/
typedef union {
  byte Byte;
  struct {
    byte UE2R10_UE2T10 :1;                                     /* Endpoint 2 Receive Data Buffer 1 Bit 0, Endpoint 2 Transmit Data Buffer 1 Bit 0 */
    byte UE2R11_UE2T11 :1;                                     /* Endpoint 2 Receive Data Buffer 1 Bit 1, Endpoint 2 Transmit Data Buffer 1 Bit 1 */
    byte UE2R12_UE2T12 :1;                                     /* Endpoint 2 Receive Data Buffer 1 Bit 2, Endpoint 2 Transmit Data Buffer 1 Bit 2 */
    byte UE2R13_UE2T13 :1;                                     /* Endpoint 2 Receive Data Buffer 1 Bit 3, Endpoint 2 Transmit Data Buffer 1 Bit 3 */
    byte UE2R14_UE2T14 :1;                                     /* Endpoint 2 Receive Data Buffer 1 Bit 4, Endpoint 2 Transmit Data Buffer 1 Bit 4 */
    byte UE2R15_UE2T15 :1;                                     /* Endpoint 2 Receive Data Buffer 1 Bit 5, Endpoint 2 Transmit Data Buffer 1 Bit 5 */
    byte UE2R16_UE2T16 :1;                                     /* Endpoint 2 Receive Data Buffer 1 Bit 6, Endpoint 2 Transmit Data Buffer 1 Bit 6 */
    byte UE2R17_UE2T17 :1;                                     /* Endpoint 2 Receive Data Buffer 1 Bit 7, Endpoint 2 Transmit Data Buffer 1 Bit 7 */
  } Bits;
} UE2D1STR;
extern volatile UE2D1STR _UE2D1;
#define UE2D1                           _UE2D1.Byte
#define UE2D1_UE2R10_UE2T10             _UE2D1.Bits.UE2R10_UE2T10
#define UE2D1_UE2R11_UE2T11             _UE2D1.Bits.UE2R11_UE2T11
#define UE2D1_UE2R12_UE2T12             _UE2D1.Bits.UE2R12_UE2T12
#define UE2D1_UE2R13_UE2T13             _UE2D1.Bits.UE2R13_UE2T13
#define UE2D1_UE2R14_UE2T14             _UE2D1.Bits.UE2R14_UE2T14
#define UE2D1_UE2R15_UE2T15             _UE2D1.Bits.UE2R15_UE2T15
#define UE2D1_UE2R16_UE2T16             _UE2D1.Bits.UE2R16_UE2T16
#define UE2D1_UE2R17_UE2T17             _UE2D1.Bits.UE2R17_UE2T17

#define UE2D1_UE2R10_UE2T10_MASK        1
#define UE2D1_UE2R11_UE2T11_MASK        2
#define UE2D1_UE2R12_UE2T12_MASK        4
#define UE2D1_UE2R13_UE2T13_MASK        8
#define UE2D1_UE2R14_UE2T14_MASK        16
#define UE2D1_UE2R15_UE2T15_MASK        32
#define UE2D1_UE2R16_UE2T16_MASK        64
#define UE2D1_UE2R17_UE2T17_MASK        128


/*** UE2D2 - USB Endpoint 2 Data Register 2; 0x00000032 ***/
typedef union {
  byte Byte;
  struct {
    byte UE2R20_UE2T20 :1;                                     /* Endpoint 2 Receive Data Buffer 2 Bit 0, Endpoint 2 Transmit Data Buffer 2 Bit 0 */
    byte UE2R21_UE2T21 :1;                                     /* Endpoint 2 Receive Data Buffer 2 Bit 1, Endpoint 2 Transmit Data Buffer 2 Bit 1 */
    byte UE2R22_UE2T22 :1;                                     /* Endpoint 2 Receive Data Buffer 2 Bit 2, Endpoint 2 Transmit Data Buffer 2 Bit 2 */
    byte UE2R23_UE2T23 :1;                                     /* Endpoint 2 Receive Data Buffer 2 Bit 3, Endpoint 2 Transmit Data Buffer 2 Bit 3 */
    byte UE2R24_UE2T24 :1;                                     /* Endpoint 2 Receive Data Buffer 2 Bit 4, Endpoint 2 Transmit Data Buffer 2 Bit 4 */
    byte UE2R25_UE2T25 :1;                                     /* Endpoint 2 Receive Data Buffer 2 Bit 5, Endpoint 2 Transmit Data Buffer 2 Bit 5 */
    byte UE2R26_UE2T26 :1;                                     /* Endpoint 2 Receive Data Buffer 2 Bit 6, Endpoint 2 Transmit Data Buffer 2 Bit 6 */
    byte UE2R27_UE2T27 :1;                                     /* Endpoint 2 Receive Data Buffer 2 Bit 7, Endpoint 2 Transmit Data Buffer 2 Bit 7 */
  } Bits;
} UE2D2STR;
extern volatile UE2D2STR _UE2D2;
#define UE2D2                           _UE2D2.Byte
#define UE2D2_UE2R20_UE2T20             _UE2D2.Bits.UE2R20_UE2T20
#define UE2D2_UE2R21_UE2T21             _UE2D2.Bits.UE2R21_UE2T21
#define UE2D2_UE2R22_UE2T22             _UE2D2.Bits.UE2R22_UE2T22
#define UE2D2_UE2R23_UE2T23             _UE2D2.Bits.UE2R23_UE2T23
#define UE2D2_UE2R24_UE2T24             _UE2D2.Bits.UE2R24_UE2T24
#define UE2D2_UE2R25_UE2T25             _UE2D2.Bits.UE2R25_UE2T25
#define UE2D2_UE2R26_UE2T26             _UE2D2.Bits.UE2R26_UE2T26
#define UE2D2_UE2R27_UE2T27             _UE2D2.Bits.UE2R27_UE2T27

#define UE2D2_UE2R20_UE2T20_MASK        1
#define UE2D2_UE2R21_UE2T21_MASK        2
#define UE2D2_UE2R22_UE2T22_MASK        4
#define UE2D2_UE2R23_UE2T23_MASK        8
#define UE2D2_UE2R24_UE2T24_MASK        16
#define UE2D2_UE2R25_UE2T25_MASK        32
#define UE2D2_UE2R26_UE2T26_MASK        64
#define UE2D2_UE2R27_UE2T27_MASK        128


/*** UE2D3 - USB Endpoint 2 Data Register 3; 0x00000033 ***/
typedef union {
  byte Byte;
  struct {
    byte UE2R30_UE2T30 :1;                                     /* Endpoint 2 Receive Data Buffer 3 Bit 0, Endpoint 2 Transmit Data Buffer 3 Bit 0 */
    byte UE2R31_UE2T31 :1;                                     /* Endpoint 2 Receive Data Buffer 3 Bit 1, Endpoint 2 Transmit Data Buffer 3 Bit 1 */
    byte UE2R32_UE2T32 :1;                                     /* Endpoint 2 Receive Data Buffer 3 Bit 2, Endpoint 2 Transmit Data Buffer 3 Bit 2 */
    byte UE2R33_UE2T33 :1;                                     /* Endpoint 2 Receive Data Buffer 3 Bit 3, Endpoint 2 Transmit Data Buffer 3 Bit 3 */
    byte UE2R34_UE2T34 :1;                                     /* Endpoint 2 Receive Data Buffer 3 Bit 4, Endpoint 2 Transmit Data Buffer 3 Bit 4 */
    byte UE2R35_UE2T35 :1;                                     /* Endpoint 2 Receive Data Buffer 3 Bit 5, Endpoint 2 Transmit Data Buffer 3 Bit 5 */
    byte UE2R36_UE2T36 :1;                                     /* Endpoint 2 Receive Data Buffer 3 Bit 6, Endpoint 2 Transmit Data Buffer 3 Bit 6 */
    byte UE2R37_UE2T37 :1;                                     /* Endpoint 2 Receive Data Buffer 3 Bit 7, Endpoint 2 Transmit Data Buffer 3 Bit 7 */
  } Bits;
} UE2D3STR;
extern volatile UE2D3STR _UE2D3;
#define UE2D3                           _UE2D3.Byte
#define UE2D3_UE2R30_UE2T30             _UE2D3.Bits.UE2R30_UE2T30
#define UE2D3_UE2R31_UE2T31             _UE2D3.Bits.UE2R31_UE2T31
#define UE2D3_UE2R32_UE2T32             _UE2D3.Bits.UE2R32_UE2T32
#define UE2D3_UE2R33_UE2T33             _UE2D3.Bits.UE2R33_UE2T33
#define UE2D3_UE2R34_UE2T34             _UE2D3.Bits.UE2R34_UE2T34
#define UE2D3_UE2R35_UE2T35             _UE2D3.Bits.UE2R35_UE2T35
#define UE2D3_UE2R36_UE2T36             _UE2D3.Bits.UE2R36_UE2T36
#define UE2D3_UE2R37_UE2T37             _UE2D3.Bits.UE2R37_UE2T37

#define UE2D3_UE2R30_UE2T30_MASK        1
#define UE2D3_UE2R31_UE2T31_MASK        2
#define UE2D3_UE2R32_UE2T32_MASK        4
#define UE2D3_UE2R33_UE2T33_MASK        8
#define UE2D3_UE2R34_UE2T34_MASK        16
#define UE2D3_UE2R35_UE2T35_MASK        32
#define UE2D3_UE2R36_UE2T36_MASK        64
#define UE2D3_UE2R37_UE2T37_MASK        128


/*** UE2D4 - USB Endpoint 2 Data Register 4; 0x00000034 ***/
typedef union {
  byte Byte;
  struct {
    byte UE2R40_UE2T40 :1;                                     /* Endpoint 2 Receive Data Buffer 4 Bit 0, Endpoint 2 Transmit Data Buffer 4 Bit 0 */
    byte UE2R41_UE2T41 :1;                                     /* Endpoint 2 Receive Data Buffer 4 Bit 1, Endpoint 2 Transmit Data Buffer 4 Bit 1 */
    byte UE2R42_UE2T42 :1;                                     /* Endpoint 2 Receive Data Buffer 4 Bit 2, Endpoint 2 Transmit Data Buffer 4 Bit 2 */
    byte UE2R43_UE2T43 :1;                                     /* Endpoint 2 Receive Data Buffer 4 Bit 3, Endpoint 2 Transmit Data Buffer 4 Bit 3 */
    byte UE2R44_UE2T44 :1;                                     /* Endpoint 2 Receive Data Buffer 4 Bit 4, Endpoint 2 Transmit Data Buffer 4 Bit 4 */
    byte UE2R45_UE2T45 :1;                                     /* Endpoint 2 Receive Data Buffer 4 Bit 5, Endpoint 2 Transmit Data Buffer 4 Bit 5 */
    byte UE2R46_UE2T46 :1;                                     /* Endpoint 2 Receive Data Buffer 4 Bit 6, Endpoint 2 Transmit Data Buffer 4 Bit 6 */
    byte UE2R47_UE2T47 :1;                                     /* Endpoint 2 Receive Data Buffer 4 Bit 7, Endpoint 2 Transmit Data Buffer 4 Bit 7 */
  } Bits;
} UE2D4STR;
extern volatile UE2D4STR _UE2D4;
#define UE2D4                           _UE2D4.Byte
#define UE2D4_UE2R40_UE2T40             _UE2D4.Bits.UE2R40_UE2T40
#define UE2D4_UE2R41_UE2T41             _UE2D4.Bits.UE2R41_UE2T41
#define UE2D4_UE2R42_UE2T42             _UE2D4.Bits.UE2R42_UE2T42
#define UE2D4_UE2R43_UE2T43             _UE2D4.Bits.UE2R43_UE2T43
#define UE2D4_UE2R44_UE2T44             _UE2D4.Bits.UE2R44_UE2T44
#define UE2D4_UE2R45_UE2T45             _UE2D4.Bits.UE2R45_UE2T45
#define UE2D4_UE2R46_UE2T46             _UE2D4.Bits.UE2R46_UE2T46
#define UE2D4_UE2R47_UE2T47             _UE2D4.Bits.UE2R47_UE2T47

#define UE2D4_UE2R40_UE2T40_MASK        1
#define UE2D4_UE2R41_UE2T41_MASK        2
#define UE2D4_UE2R42_UE2T42_MASK        4
#define UE2D4_UE2R43_UE2T43_MASK        8
#define UE2D4_UE2R44_UE2T44_MASK        16
#define UE2D4_UE2R45_UE2T45_MASK        32
#define UE2D4_UE2R46_UE2T46_MASK        64
#define UE2D4_UE2R47_UE2T47_MASK        128


/*** UE2D5 - USB Endpoint 2 Data Register 5; 0x00000035 ***/
typedef union {
  byte Byte;
  struct {
    byte UE2R50_UE2T50 :1;                                     /* Endpoint 2 Receive Data Buffer 5 Bit 0, Endpoint 2 Transmit Data Buffer 5 Bit 0 */
    byte UE2R51_UE2T51 :1;                                     /* Endpoint 2 Receive Data Buffer 5 Bit 1, Endpoint 2 Transmit Data Buffer 5 Bit 1 */
    byte UE2R52_UE2T52 :1;                                     /* Endpoint 2 Receive Data Buffer 5 Bit 2, Endpoint 2 Transmit Data Buffer 5 Bit 2 */
    byte UE2R53_UE2T53 :1;                                     /* Endpoint 2 Receive Data Buffer 5 Bit 3, Endpoint 2 Transmit Data Buffer 5 Bit 3 */
    byte UE2R54_UE2T54 :1;                                     /* Endpoint 2 Receive Data Buffer 5 Bit 4, Endpoint 2 Transmit Data Buffer 5 Bit 4 */
    byte UE2R55_UE2T55 :1;                                     /* Endpoint 2 Receive Data Buffer 5 Bit 5, Endpoint 2 Transmit Data Buffer 5 Bit 5 */
    byte UE2R56_UE2T56 :1;                                     /* Endpoint 2 Receive Data Buffer 5 Bit 6, Endpoint 2 Transmit Data Buffer 5 Bit 6 */
    byte UE2R57_UE2T57 :1;                                     /* Endpoint 2 Receive Data Buffer 5 Bit 7, Endpoint 2 Transmit Data Buffer 5 Bit 7 */
  } Bits;
} UE2D5STR;
extern volatile UE2D5STR _UE2D5;
#define UE2D5                           _UE2D5.Byte
#define UE2D5_UE2R50_UE2T50             _UE2D5.Bits.UE2R50_UE2T50
#define UE2D5_UE2R51_UE2T51             _UE2D5.Bits.UE2R51_UE2T51
#define UE2D5_UE2R52_UE2T52             _UE2D5.Bits.UE2R52_UE2T52
#define UE2D5_UE2R53_UE2T53             _UE2D5.Bits.UE2R53_UE2T53
#define UE2D5_UE2R54_UE2T54             _UE2D5.Bits.UE2R54_UE2T54
#define UE2D5_UE2R55_UE2T55             _UE2D5.Bits.UE2R55_UE2T55
#define UE2D5_UE2R56_UE2T56             _UE2D5.Bits.UE2R56_UE2T56
#define UE2D5_UE2R57_UE2T57             _UE2D5.Bits.UE2R57_UE2T57

#define UE2D5_UE2R50_UE2T50_MASK        1
#define UE2D5_UE2R51_UE2T51_MASK        2
#define UE2D5_UE2R52_UE2T52_MASK        4
#define UE2D5_UE2R53_UE2T53_MASK        8
#define UE2D5_UE2R54_UE2T54_MASK        16
#define UE2D5_UE2R55_UE2T55_MASK        32
#define UE2D5_UE2R56_UE2T56_MASK        64
#define UE2D5_UE2R57_UE2T57_MASK        128


/*** UE2D6 - USB Endpoint 2 Data Register 6; 0x00000036 ***/
typedef union {
  byte Byte;
  struct {
    byte UE2R60_UE2T60 :1;                                     /* Endpoint 2 Receive Data Buffer 5 Bit 0, Endpoint 2 Transmit Data Buffer 6 Bit 0 */
    byte UE2R61_UE2T61 :1;                                     /* Endpoint 2 Receive Data Buffer 5 Bit 1, Endpoint 2 Transmit Data Buffer 6 Bit 1 */
    byte UE2R62_UE2T62 :1;                                     /* Endpoint 2 Receive Data Buffer 5 Bit 2, Endpoint 2 Transmit Data Buffer 6 Bit 2 */
    byte UE2R63_UE2T63 :1;                                     /* Endpoint 2 Receive Data Buffer 5 Bit 3, Endpoint 2 Transmit Data Buffer 6 Bit 3 */
    byte UE2R64_UE2T64 :1;                                     /* Endpoint 2 Receive Data Buffer 5 Bit 4, Endpoint 2 Transmit Data Buffer 6 Bit 4 */
    byte UE2R65_UE2T65 :1;                                     /* Endpoint 2 Receive Data Buffer 5 Bit 5, Endpoint 2 Transmit Data Buffer 6 Bit 5 */
    byte UE2R66_UE2T66 :1;                                     /* Endpoint 2 Receive Data Buffer 5 Bit 6, Endpoint 2 Transmit Data Buffer 6 Bit 6 */
    byte UE2R67_UE2T67 :1;                                     /* Endpoint 2 Receive Data Buffer 5 Bit 7, Endpoint 2 Transmit Data Buffer 6 Bit 7 */
  } Bits;
} UE2D6STR;
extern volatile UE2D6STR _UE2D6;
#define UE2D6                           _UE2D6.Byte
#define UE2D6_UE2R60_UE2T60             _UE2D6.Bits.UE2R60_UE2T60
#define UE2D6_UE2R61_UE2T61             _UE2D6.Bits.UE2R61_UE2T61
#define UE2D6_UE2R62_UE2T62             _UE2D6.Bits.UE2R62_UE2T62
#define UE2D6_UE2R63_UE2T63             _UE2D6.Bits.UE2R63_UE2T63
#define UE2D6_UE2R64_UE2T64             _UE2D6.Bits.UE2R64_UE2T64
#define UE2D6_UE2R65_UE2T65             _UE2D6.Bits.UE2R65_UE2T65
#define UE2D6_UE2R66_UE2T66             _UE2D6.Bits.UE2R66_UE2T66
#define UE2D6_UE2R67_UE2T67             _UE2D6.Bits.UE2R67_UE2T67

#define UE2D6_UE2R60_UE2T60_MASK        1
#define UE2D6_UE2R61_UE2T61_MASK        2
#define UE2D6_UE2R62_UE2T62_MASK        4
#define UE2D6_UE2R63_UE2T63_MASK        8
#define UE2D6_UE2R64_UE2T64_MASK        16
#define UE2D6_UE2R65_UE2T65_MASK        32
#define UE2D6_UE2R66_UE2T66_MASK        64
#define UE2D6_UE2R67_UE2T67_MASK        128


/*** UE2D7 - USB Endpoint 2 Data Register 7; 0x00000037 ***/
typedef union {
  byte Byte;
  struct {
    byte UE2R70_UE2T70 :1;                                     /* Endpoint 2 Receive Data Buffer 7 Bit 0, Endpoint 2 Transmit Data Buffer 7 Bit 0 */
    byte UE2R71_UE2T71 :1;                                     /* Endpoint 2 Receive Data Buffer 7 Bit 1, Endpoint 2 Transmit Data Buffer 7 Bit 1 */
    byte UE2R72_UE2T72 :1;                                     /* Endpoint 2 Receive Data Buffer 7 Bit 2, Endpoint 2 Transmit Data Buffer 7 Bit 2 */
    byte UE2R73_UE2T73 :1;                                     /* Endpoint 2 Receive Data Buffer 7 Bit 3, Endpoint 2 Transmit Data Buffer 7 Bit 3 */
    byte UE2R74_UE2T74 :1;                                     /* Endpoint 2 Receive Data Buffer 7 Bit 4, Endpoint 2 Transmit Data Buffer 7 Bit 4 */
    byte UE2R75_UE2T75 :1;                                     /* Endpoint 2 Receive Data Buffer 7 Bit 5, Endpoint 2 Transmit Data Buffer 7 Bit 5 */
    byte UE2R76_UE2T76 :1;                                     /* Endpoint 2 Receive Data Buffer 7 Bit 6, Endpoint 2 Transmit Data Buffer 7 Bit 6 */
    byte UE2R77_UE2T77 :1;                                     /* Endpoint 2 Receive Data Buffer 7 Bit 7, Endpoint 2 Transmit Data Buffer 7 Bit 7 */
  } Bits;
} UE2D7STR;
extern volatile UE2D7STR _UE2D7;
#define UE2D7                           _UE2D7.Byte
#define UE2D7_UE2R70_UE2T70             _UE2D7.Bits.UE2R70_UE2T70
#define UE2D7_UE2R71_UE2T71             _UE2D7.Bits.UE2R71_UE2T71
#define UE2D7_UE2R72_UE2T72             _UE2D7.Bits.UE2R72_UE2T72
#define UE2D7_UE2R73_UE2T73             _UE2D7.Bits.UE2R73_UE2T73
#define UE2D7_UE2R74_UE2T74             _UE2D7.Bits.UE2R74_UE2T74
#define UE2D7_UE2R75_UE2T75             _UE2D7.Bits.UE2R75_UE2T75
#define UE2D7_UE2R76_UE2T76             _UE2D7.Bits.UE2R76_UE2T76
#define UE2D7_UE2R77_UE2T77             _UE2D7.Bits.UE2R77_UE2T77

#define UE2D7_UE2R70_UE2T70_MASK        1
#define UE2D7_UE2R71_UE2T71_MASK        2
#define UE2D7_UE2R72_UE2T72_MASK        4
#define UE2D7_UE2R73_UE2T73_MASK        8
#define UE2D7_UE2R74_UE2T74_MASK        16
#define UE2D7_UE2R75_UE2T75_MASK        32
#define UE2D7_UE2R76_UE2T76_MASK        64
#define UE2D7_UE2R77_UE2T77_MASK        128


/*** UADDR - USB Address Register ; 0x00000038 ***/
typedef union {
  byte Byte;
  struct {
    byte UADD0       :1;                                       /* USB Function Address Bit 0 */
    byte UADD1       :1;                                       /* USB Function Address Bit 1 */
    byte UADD2       :1;                                       /* USB Function Address Bit 2 */
    byte UADD3       :1;                                       /* USB Function Address Bit 3 */
    byte UADD4       :1;                                       /* USB Function Address Bit 4 */
    byte UADD5       :1;                                       /* USB Function Address Bit 5 */
    byte UADD6       :1;                                       /* USB Function Address Bit 6 */
    byte USBEN       :1;                                       /* USB Module Enable */
  } Bits;
  struct {
    byte grpUADD :7;
    byte         :1;
  } MergedBits;
} UADDRSTR;
extern volatile UADDRSTR _UADDR;
#define UADDR                           _UADDR.Byte
#define UADDR_UADD0                     _UADDR.Bits.UADD0
#define UADDR_UADD1                     _UADDR.Bits.UADD1
#define UADDR_UADD2                     _UADDR.Bits.UADD2
#define UADDR_UADD3                     _UADDR.Bits.UADD3
#define UADDR_UADD4                     _UADDR.Bits.UADD4
#define UADDR_UADD5                     _UADDR.Bits.UADD5
#define UADDR_UADD6                     _UADDR.Bits.UADD6
#define UADDR_USBEN                     _UADDR.Bits.USBEN
#define UADDR_UADD                      _UADDR.MergedBits.grpUADD

#define UADDR_UADD0_MASK                1
#define UADDR_UADD1_MASK                2
#define UADDR_UADD2_MASK                4
#define UADDR_UADD3_MASK                8
#define UADDR_UADD4_MASK                16
#define UADDR_UADD5_MASK                32
#define UADDR_UADD6_MASK                64
#define UADDR_USBEN_MASK                128
#define UADDR_UADD_MASK                 127
#define UADDR_UADD_BITNUM               0


/*** UIR0 - USB Interrupt Register 0; 0x00000039 ***/
typedef union {
  byte Byte;
  struct {
    byte RXD0IE      :1;                                       /* Endpoint 0 Receive Interrupt Enable */
    byte TXD0IE      :1;                                       /* Endpoint 0 Transmit Interrupt Enable */
    byte             :1; 
    byte TXD1IE      :1;                                       /* Endpoint 1 Transmit Interrupt Enable */
    byte RXD2IE      :1;                                       /* Endpoint 2 Receive Interrupt Enable */
    byte TXD2IE      :1;                                       /* Endpoint 2 Transmit Interrupt Enable */
    byte SUSPND      :1;                                       /* USB Suspend Bit */
    byte EOPIE       :1;                                       /* End-of-Packet Detect Interrupt Enable */
  } Bits;
} UIR0STR;
extern volatile UIR0STR _UIR0;
#define UIR0                            _UIR0.Byte
#define UIR0_RXD0IE                     _UIR0.Bits.RXD0IE
#define UIR0_TXD0IE                     _UIR0.Bits.TXD0IE
#define UIR0_TXD1IE                     _UIR0.Bits.TXD1IE
#define UIR0_RXD2IE                     _UIR0.Bits.RXD2IE
#define UIR0_TXD2IE                     _UIR0.Bits.TXD2IE
#define UIR0_SUSPND                     _UIR0.Bits.SUSPND
#define UIR0_EOPIE                      _UIR0.Bits.EOPIE
/* UIR_ARR: Access 2 UIRx registers in an array */
#define UIR_ARR                         ((volatile byte * __far) &UIR0)

#define UIR0_RXD0IE_MASK                1
#define UIR0_TXD0IE_MASK                2
#define UIR0_TXD1IE_MASK                8
#define UIR0_RXD2IE_MASK                16
#define UIR0_TXD2IE_MASK                32
#define UIR0_SUSPND_MASK                64
#define UIR0_EOPIE_MASK                 128


/*** UIR1 - USB Interrupt Register 1; 0x0000003A ***/
typedef union {
  byte Byte;
  struct {
    byte RXD0F       :1;                                       /* Endpoint 0 Data Receive Flag */
    byte TXD0F       :1;                                       /* Endpoint 0 Data Transmit Flag */
    byte RESUMF      :1;                                       /* Resume Flag */
    byte TXD1F       :1;                                       /* Endpoint 1 Data Transmit Flag */
    byte RXD2F       :1;                                       /* Endpoint 2 Data Receive Flag */
    byte TXD2F       :1;                                       /* Endpoint 2 Data Transmit Flag */
    byte RSTF        :1;                                       /* USB Reset Flag */
    byte EOPF        :1;                                       /* End-of-Packet Detect Flag */
  } Bits;
} UIR1STR;
extern volatile UIR1STR _UIR1;
#define UIR1                            _UIR1.Byte
#define UIR1_RXD0F                      _UIR1.Bits.RXD0F
#define UIR1_TXD0F                      _UIR1.Bits.TXD0F
#define UIR1_RESUMF                     _UIR1.Bits.RESUMF
#define UIR1_TXD1F                      _UIR1.Bits.TXD1F
#define UIR1_RXD2F                      _UIR1.Bits.RXD2F
#define UIR1_TXD2F                      _UIR1.Bits.TXD2F
#define UIR1_RSTF                       _UIR1.Bits.RSTF
#define UIR1_EOPF                       _UIR1.Bits.EOPF

#define UIR1_RXD0F_MASK                 1
#define UIR1_TXD0F_MASK                 2
#define UIR1_RESUMF_MASK                4
#define UIR1_TXD1F_MASK                 8
#define UIR1_RXD2F_MASK                 16
#define UIR1_TXD2F_MASK                 32
#define UIR1_RSTF_MASK                  64
#define UIR1_EOPF_MASK                  128


/*** UCR0 - USB Control Register 0; 0x0000003B ***/
typedef union {
  byte Byte;
  struct {
    byte TP0SIZ0     :1;                                       /* Endpoint 0 Transmit Data Packet Size Bit 0 */
    byte TP0SIZ1     :1;                                       /* Endpoint 0 Transmit Data Packet Size Bit 1 */
    byte TP0SIZ2     :1;                                       /* Endpoint 0 Transmit Data Packet Size Bit 2 */
    byte TP0SIZ3     :1;                                       /* Endpoint 0 Transmit Data Packet Size Bit 3 */
    byte RX0E        :1;                                       /* Endpoint 0 Receive Enable */
    byte TX0E        :1;                                       /* Endpoint 0 Transmit Enable */
    byte             :1; 
    byte T0SEQ       :1;                                       /* Endpoint 0 Transmit Sequence Bit */
  } Bits;
  struct {
    byte grpTP0SIZ :4;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} UCR0STR;
extern volatile UCR0STR _UCR0;
#define UCR0                            _UCR0.Byte
#define UCR0_TP0SIZ0                    _UCR0.Bits.TP0SIZ0
#define UCR0_TP0SIZ1                    _UCR0.Bits.TP0SIZ1
#define UCR0_TP0SIZ2                    _UCR0.Bits.TP0SIZ2
#define UCR0_TP0SIZ3                    _UCR0.Bits.TP0SIZ3
#define UCR0_RX0E                       _UCR0.Bits.RX0E
#define UCR0_TX0E                       _UCR0.Bits.TX0E
#define UCR0_T0SEQ                      _UCR0.Bits.T0SEQ
/* UCR_ARR: Access 2 UCRx registers in an array */
#define UCR_ARR                         ((volatile byte * __far) &UCR0)
#define UCR0_TP0SIZ                     _UCR0.MergedBits.grpTP0SIZ

#define UCR0_TP0SIZ0_MASK               1
#define UCR0_TP0SIZ1_MASK               2
#define UCR0_TP0SIZ2_MASK               4
#define UCR0_TP0SIZ3_MASK               8
#define UCR0_RX0E_MASK                  16
#define UCR0_TX0E_MASK                  32
#define UCR0_T0SEQ_MASK                 128
#define UCR0_TP0SIZ_MASK                15
#define UCR0_TP0SIZ_BITNUM              0


/*** UCR1 - USB Control Register 1; 0x0000003C ***/
typedef union {
  byte Byte;
  struct {
    byte TP1SIZ0     :1;                                       /* Endpoint 1 Transmit Data Packet Size Bit 0 */
    byte TP1SIZ1     :1;                                       /* Endpoint 1 Transmit Data Packet Size Bit 1 */
    byte TP1SIZ2     :1;                                       /* Endpoint 1 Transmit Data Packet Size Bit 2 */
    byte TP1SIZ3     :1;                                       /* Endpoint 1 Transmit Data Packet Size Bit 3 */
    byte FRESUM      :1;                                       /* Force Resume */
    byte TX1E        :1;                                       /* Endpoint 1 Transmit Enable */
    byte STALL1      :1;                                       /* Endpoint 1 Force Stall Bit */
    byte T1SEQ       :1;                                       /* Endpoint 1 Transmit Sequence Bit */
  } Bits;
  struct {
    byte grpTP1SIZ :4;
    byte         :1;
    byte         :1;
    byte grpSTALL_1 :1;
    byte         :1;
  } MergedBits;
} UCR1STR;
extern volatile UCR1STR _UCR1;
#define UCR1                            _UCR1.Byte
#define UCR1_TP1SIZ0                    _UCR1.Bits.TP1SIZ0
#define UCR1_TP1SIZ1                    _UCR1.Bits.TP1SIZ1
#define UCR1_TP1SIZ2                    _UCR1.Bits.TP1SIZ2
#define UCR1_TP1SIZ3                    _UCR1.Bits.TP1SIZ3
#define UCR1_FRESUM                     _UCR1.Bits.FRESUM
#define UCR1_TX1E                       _UCR1.Bits.TX1E
#define UCR1_STALL1                     _UCR1.Bits.STALL1
#define UCR1_T1SEQ                      _UCR1.Bits.T1SEQ
#define UCR1_TP1SIZ                     _UCR1.MergedBits.grpTP1SIZ

#define UCR1_TP1SIZ0_MASK               1
#define UCR1_TP1SIZ1_MASK               2
#define UCR1_TP1SIZ2_MASK               4
#define UCR1_TP1SIZ3_MASK               8
#define UCR1_FRESUM_MASK                16
#define UCR1_TX1E_MASK                  32
#define UCR1_STALL1_MASK                64
#define UCR1_T1SEQ_MASK                 128
#define UCR1_TP1SIZ_MASK                15
#define UCR1_TP1SIZ_BITNUM              0


/*** USR0 - USB Status Register 0; 0x0000003D ***/
typedef union {
  byte Byte;
  struct {
    byte RP0SIZ0     :1;                                       /* Endpoint 0 Receive Data Packet Size Bit 0 */
    byte RP0SIZ1     :1;                                       /* Endpoint 0 Receive Data Packet Size Bit 1 */
    byte RP0SIZ2     :1;                                       /* Endpoint 0 Receive Data Packet Size Bit 2 */
    byte RP0SIZ3     :1;                                       /* Endpoint 0 Receive Data Packet Size Bit 3 */
    byte             :1; 
    byte             :1; 
    byte SETUP       :1;                                       /* SETUP Token Detect Bit */
    byte R0SEQ       :1;                                       /* Endpoint 0 Receive Sequence Bit */
  } Bits;
  struct {
    byte grpRP0SIZ :4;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} USR0STR;
extern volatile USR0STR _USR0;
#define USR0                            _USR0.Byte
#define USR0_RP0SIZ0                    _USR0.Bits.RP0SIZ0
#define USR0_RP0SIZ1                    _USR0.Bits.RP0SIZ1
#define USR0_RP0SIZ2                    _USR0.Bits.RP0SIZ2
#define USR0_RP0SIZ3                    _USR0.Bits.RP0SIZ3
#define USR0_SETUP                      _USR0.Bits.SETUP
#define USR0_R0SEQ                      _USR0.Bits.R0SEQ
/* USR_ARR: Access 2 USRx registers in an array */
#define USR_ARR                         ((volatile byte * __far) &USR0)
#define USR0_RP0SIZ                     _USR0.MergedBits.grpRP0SIZ

#define USR0_RP0SIZ0_MASK               1
#define USR0_RP0SIZ1_MASK               2
#define USR0_RP0SIZ2_MASK               4
#define USR0_RP0SIZ3_MASK               8
#define USR0_SETUP_MASK                 64
#define USR0_R0SEQ_MASK                 128
#define USR0_RP0SIZ_MASK                15
#define USR0_RP0SIZ_BITNUM              0


/*** USR1 - USB Status Register 1; 0x0000003E ***/
typedef union {
  byte Byte;
  struct {
    byte RP2SIZ0     :1;                                       /* Endpoint 2 Receive Data Packet Size Bit 0 */
    byte RP2SIZ1     :1;                                       /* Endpoint 2 Receive Data Packet Size Bit 1 */
    byte RP2SIZ2     :1;                                       /* Endpoint 2 Receive Data Packet Size Bit 2 */
    byte RP2SIZ3     :1;                                       /* Endpoint 2 Receive Data Packet Size Bit 3 */
    byte TXSTL       :1;                                       /* STALL Token Transmit Bit */
    byte TXNAK       :1;                                       /* NAK Token Transmit Bit */
    byte TXACK       :1;                                       /* ACK Token Transmit Bit */
    byte R2SEQ       :1;                                       /* Endpoint 2 Receive Sequence Bit */
  } Bits;
  struct {
    byte grpRP2SIZ :4;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} USR1STR;
extern volatile USR1STR _USR1;
#define USR1                            _USR1.Byte
#define USR1_RP2SIZ0                    _USR1.Bits.RP2SIZ0
#define USR1_RP2SIZ1                    _USR1.Bits.RP2SIZ1
#define USR1_RP2SIZ2                    _USR1.Bits.RP2SIZ2
#define USR1_RP2SIZ3                    _USR1.Bits.RP2SIZ3
#define USR1_TXSTL                      _USR1.Bits.TXSTL
#define USR1_TXNAK                      _USR1.Bits.TXNAK
#define USR1_TXACK                      _USR1.Bits.TXACK
#define USR1_R2SEQ                      _USR1.Bits.R2SEQ
#define USR1_RP2SIZ                     _USR1.MergedBits.grpRP2SIZ

#define USR1_RP2SIZ0_MASK               1
#define USR1_RP2SIZ1_MASK               2
#define USR1_RP2SIZ2_MASK               4
#define USR1_RP2SIZ3_MASK               8
#define USR1_TXSTL_MASK                 16
#define USR1_TXNAK_MASK                 32
#define USR1_TXACK_MASK                 64
#define USR1_R2SEQ_MASK                 128
#define USR1_RP2SIZ_MASK                15
#define USR1_RP2SIZ_BITNUM              0


/*** T2SC - TIM2 Status and Control Register TSC; 0x00000040 ***/
typedef union {
  byte Byte;
  struct {
    byte PS0         :1;                                       /* Prescaler Select Bit 0 */
    byte PS1         :1;                                       /* Prescaler Select Bit 1 */
    byte PS2         :1;                                       /* Prescaler Select Bit 2 */
    byte             :1; 
    byte TRST        :1;                                       /* TIM2 Reset Bit */
    byte TSTOP       :1;                                       /* TIM2 Stop Bit */
    byte TOIE        :1;                                       /* TIM2 Overflow Interrupt Enable Bit */
    byte TOF         :1;                                       /* TIM2 Overflow Flag Bit */
  } Bits;
  struct {
    byte grpPS   :3;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} T2SCSTR;
extern volatile T2SCSTR _T2SC;
#define T2SC                            _T2SC.Byte
#define T2SC_PS0                        _T2SC.Bits.PS0
#define T2SC_PS1                        _T2SC.Bits.PS1
#define T2SC_PS2                        _T2SC.Bits.PS2
#define T2SC_TRST                       _T2SC.Bits.TRST
#define T2SC_TSTOP                      _T2SC.Bits.TSTOP
#define T2SC_TOIE                       _T2SC.Bits.TOIE
#define T2SC_TOF                        _T2SC.Bits.TOF
#define T2SC_PS                         _T2SC.MergedBits.grpPS

#define T2SC_PS0_MASK                   1
#define T2SC_PS1_MASK                   2
#define T2SC_PS2_MASK                   4
#define T2SC_TRST_MASK                  16
#define T2SC_TSTOP_MASK                 32
#define T2SC_TOIE_MASK                  64
#define T2SC_TOF_MASK                   128
#define T2SC_PS_MASK                    7
#define T2SC_PS_BITNUM                  0


/*** T2CNT - TIM2 Counter Register; 0x00000042 ***/
typedef union {
  word Word;
   /* Overlapped registers: */
  struct {
    /*** T2CNTH - TIM2 Counter Register High; 0x00000042 ***/
    union {
      byte Byte;
    } T2CNTHSTR;
    #define T2CNTH                      _T2CNT.Overlap_STR.T2CNTHSTR.Byte
    

    /*** T2CNTL - TIM2 Counter Register Low; 0x00000043 ***/
    union {
      byte Byte;
    } T2CNTLSTR;
    #define T2CNTL                      _T2CNT.Overlap_STR.T2CNTLSTR.Byte
    
  } Overlap_STR;

} T2CNTSTR;
extern volatile T2CNTSTR _T2CNT;
#define T2CNT                           _T2CNT.Word


/*** T2MOD - TIM2 Counter Modulo Register; 0x00000044 ***/
typedef union {
  word Word;
   /* Overlapped registers: */
  struct {
    /*** T2MODH - TIM2 Counter Modulo Register High; 0x00000044 ***/
    union {
      byte Byte;
    } T2MODHSTR;
    #define T2MODH                      _T2MOD.Overlap_STR.T2MODHSTR.Byte
    

    /*** T2MODL - TIM2 Counter Modulo Register Low; 0x00000045 ***/
    union {
      byte Byte;
    } T2MODLSTR;
    #define T2MODL                      _T2MOD.Overlap_STR.T2MODLSTR.Byte
    
  } Overlap_STR;

} T2MODSTR;
extern volatile T2MODSTR _T2MOD;
#define T2MOD                           _T2MOD.Word


/*** T2SC0 - TIM2 Channel 0 Status and Control Register; 0x00000046 ***/
typedef union {
  byte Byte;
  struct {
    byte CH0MAX      :1;                                       /* Channel 0 Maximum Duty Cycle Bit */
    byte TOV0        :1;                                       /* Toggle-On-Overflow Bit */
    byte ELS0A       :1;                                       /* Edge/Level Select Bit A */
    byte ELS0B       :1;                                       /* Edge/Level Select Bit B */
    byte MS0A        :1;                                       /* Mode Select Bit A */
    byte MS0B        :1;                                       /* Mode Select Bit B */
    byte CH0IE       :1;                                       /* Channel 0 Interrupt Enable Bit */
    byte CH0F        :1;                                       /* Channel 0 Flag Bit */
  } Bits;
  struct {
    byte         :1;
    byte grpTOV  :1;
    byte grpELS0x :2;
    byte grpMS0x :2;
    byte         :1;
    byte         :1;
  } MergedBits;
} T2SC0STR;
extern volatile T2SC0STR _T2SC0;
#define T2SC0                           _T2SC0.Byte
#define T2SC0_CH0MAX                    _T2SC0.Bits.CH0MAX
#define T2SC0_TOV0                      _T2SC0.Bits.TOV0
#define T2SC0_ELS0A                     _T2SC0.Bits.ELS0A
#define T2SC0_ELS0B                     _T2SC0.Bits.ELS0B
#define T2SC0_MS0A                      _T2SC0.Bits.MS0A
#define T2SC0_MS0B                      _T2SC0.Bits.MS0B
#define T2SC0_CH0IE                     _T2SC0.Bits.CH0IE
#define T2SC0_CH0F                      _T2SC0.Bits.CH0F
#define T2SC0_ELS0x                     _T2SC0.MergedBits.grpELS0x
#define T2SC0_MS0x                      _T2SC0.MergedBits.grpMS0x

#define T2SC0_CH0MAX_MASK               1
#define T2SC0_TOV0_MASK                 2
#define T2SC0_ELS0A_MASK                4
#define T2SC0_ELS0B_MASK                8
#define T2SC0_MS0A_MASK                 16
#define T2SC0_MS0B_MASK                 32
#define T2SC0_CH0IE_MASK                64
#define T2SC0_CH0F_MASK                 128
#define T2SC0_ELS0x_MASK                12
#define T2SC0_ELS0x_BITNUM              2
#define T2SC0_MS0x_MASK                 48
#define T2SC0_MS0x_BITNUM               4


/*** T2CH0 - TIM2 Channel 0 Register; 0x00000047 ***/
typedef union {
  word Word;
   /* Overlapped registers: */
  struct {
    /*** T2CH0H - TIM2 Channel 0 Register High; 0x00000047 ***/
    union {
      byte Byte;
    } T2CH0HSTR;
    #define T2CH0H                      _T2CH0.Overlap_STR.T2CH0HSTR.Byte
    

    /*** T2CH0L - TIM2 Channel 0 Register Low; 0x00000048 ***/
    union {
      byte Byte;
    } T2CH0LSTR;
    #define T2CH0L                      _T2CH0.Overlap_STR.T2CH0LSTR.Byte
    
  } Overlap_STR;

} T2CH0STR;
extern volatile T2CH0STR _T2CH0;
#define T2CH0                           _T2CH0.Word


/*** T2SC1 - TIM2 Channel 1 Status and Control Register; 0x00000049 ***/
typedef union {
  byte Byte;
  struct {
    byte CH1MAX      :1;                                       /* Channel 1 Maximum Duty Cycle Bit */
    byte TOV1        :1;                                       /* Toggle-On-Overflow Bit */
    byte ELS1A       :1;                                       /* Edge/Level Select Bit A */
    byte ELS1B       :1;                                       /* Edge/Level Select Bit B */
    byte MS1A        :1;                                       /* Mode Select Bit A */
    byte             :1; 
    byte CH1IE       :1;                                       /* Channel 1 Interrupt Enable Bit */
    byte CH1F        :1;                                       /* Channel 1 Flag Bit */
  } Bits;
  struct {
    byte         :1;
    byte grpTOV_1 :1;
    byte grpELS1x :2;
    byte grpMS1x :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} T2SC1STR;
extern volatile T2SC1STR _T2SC1;
#define T2SC1                           _T2SC1.Byte
#define T2SC1_CH1MAX                    _T2SC1.Bits.CH1MAX
#define T2SC1_TOV1                      _T2SC1.Bits.TOV1
#define T2SC1_ELS1A                     _T2SC1.Bits.ELS1A
#define T2SC1_ELS1B                     _T2SC1.Bits.ELS1B
#define T2SC1_MS1A                      _T2SC1.Bits.MS1A
#define T2SC1_CH1IE                     _T2SC1.Bits.CH1IE
#define T2SC1_CH1F                      _T2SC1.Bits.CH1F
#define T2SC1_ELS1x                     _T2SC1.MergedBits.grpELS1x

#define T2SC1_CH1MAX_MASK               1
#define T2SC1_TOV1_MASK                 2
#define T2SC1_ELS1A_MASK                4
#define T2SC1_ELS1B_MASK                8
#define T2SC1_MS1A_MASK                 16
#define T2SC1_CH1IE_MASK                64
#define T2SC1_CH1F_MASK                 128
#define T2SC1_ELS1x_MASK                12
#define T2SC1_ELS1x_BITNUM              2


/*** T2CH1 - TIM2 Channel 1 Register; 0x0000004A ***/
typedef union {
  word Word;
   /* Overlapped registers: */
  struct {
    /*** T2CH1H - TIM2 Channel 1 Register High; 0x0000004A ***/
    union {
      byte Byte;
    } T2CH1HSTR;
    #define T2CH1H                      _T2CH1.Overlap_STR.T2CH1HSTR.Byte
    

    /*** T2CH1L - TIM2 Channel 1 Register Low; 0x0000004B ***/
    union {
      byte Byte;
    } T2CH1LSTR;
    #define T2CH1L                      _T2CH1.Overlap_STR.T2CH1LSTR.Byte
    
  } Overlap_STR;

} T2CH1STR;
extern volatile T2CH1STR _T2CH1;
#define T2CH1                           _T2CH1.Word


/*** PBWC - CGM Bandwidth Control Register; 0x00000051 ***/
typedef union {
  byte Byte;
  struct {
    byte PLLON2      :1;                                       /* PLL On Bit 2 */
    byte             :1; 
    byte LOCK2       :1;                                       /* Lock Indicator Bit 2 */
    byte             :1; 
    byte PLLON1      :1;                                       /* PLL On Bit 1 */
    byte             :1; 
    byte LOCK1       :1;                                       /* Lock Indicator Bit 1 */
    byte             :1; 
  } Bits;
} PBWCSTR;
extern volatile PBWCSTR _PBWC;
#define PBWC                            _PBWC.Byte
#define PBWC_PLLON2                     _PBWC.Bits.PLLON2
#define PBWC_LOCK2                      _PBWC.Bits.LOCK2
#define PBWC_PLLON1                     _PBWC.Bits.PLLON1
#define PBWC_LOCK1                      _PBWC.Bits.LOCK1

#define PBWC_PLLON2_MASK                1
#define PBWC_LOCK2_MASK                 4
#define PBWC_PLLON1_MASK                16
#define PBWC_LOCK1_MASK                 64


/*** PVCR - VCO Control Register; 0x00000052 ***/
typedef union {
  byte Byte;
  struct {
    byte VCO_0       :1;                                       /* VCO Control Bits for both PLL, bit 0 */
    byte VCO_1       :1;                                       /* VCO Control Bits for both PLL, bit 1 */
    byte VCO_2       :1;                                       /* VCO Control Bits for both PLL, bit 2 */
    byte VCO_3       :1;                                       /* VCO Control Bits for both PLL, bit 3 */
    byte VCO_4       :1;                                       /* VCO Control Bits for both PLL, bit 4 */
    byte VCO_5       :1;                                       /* VCO Control Bits for both PLL, bit 5 */
    byte VCO_6       :1;                                       /* VCO Control Bits for both PLL, bit 6 */
    byte VCO_7       :1;                                       /* VCO Control Bits for both PLL, bit 7 */
  } Bits;
} PVCRSTR;
extern volatile PVCRSTR _PVCR;
#define PVCR                            _PVCR.Byte
#define PVCR_VCO_0                      _PVCR.Bits.VCO_0
#define PVCR_VCO_1                      _PVCR.Bits.VCO_1
#define PVCR_VCO_2                      _PVCR.Bits.VCO_2
#define PVCR_VCO_3                      _PVCR.Bits.VCO_3
#define PVCR_VCO_4                      _PVCR.Bits.VCO_4
#define PVCR_VCO_5                      _PVCR.Bits.VCO_5
#define PVCR_VCO_6                      _PVCR.Bits.VCO_6
#define PVCR_VCO_7                      _PVCR.Bits.VCO_7

#define PVCR_VCO_0_MASK                 1
#define PVCR_VCO_1_MASK                 2
#define PVCR_VCO_2_MASK                 4
#define PVCR_VCO_3_MASK                 8
#define PVCR_VCO_4_MASK                 16
#define PVCR_VCO_5_MASK                 32
#define PVCR_VCO_6_MASK                 64
#define PVCR_VCO_7_MASK                 128


/*** PNRH1 - PLL1 N & R Divider Select Register High; 0x00000053 ***/
typedef union {
  byte Byte;
  struct {
    byte RDS1_8      :1;                                       /* Reference Divider Select Bit 8 */
    byte RDS1_9      :1;                                       /* Reference Divider Select Bit 9 */
    byte             :1; 
    byte             :1; 
    byte VDS1_8      :1;                                       /* VCO Divider Select Bit 8 */
    byte VDS1_9      :1;                                       /* VCO Divider Select Bit 9 */
    byte VDS1_10     :1;                                       /* VCO Divider Select Bit 10 */
    byte VDS1_11     :1;                                       /* VCO Divider Select Bit 11 */
  } Bits;
  struct {
    byte grpRDS1__8 :2;
    byte         :1;
    byte         :1;
    byte grpVDS1__8 :4;
  } MergedBits;
} PNRH1STR;
extern volatile PNRH1STR _PNRH1;
#define PNRH1                           _PNRH1.Byte
#define PNRH1_RDS1_8                    _PNRH1.Bits.RDS1_8
#define PNRH1_RDS1_9                    _PNRH1.Bits.RDS1_9
#define PNRH1_VDS1_8                    _PNRH1.Bits.VDS1_8
#define PNRH1_VDS1_9                    _PNRH1.Bits.VDS1_9
#define PNRH1_VDS1_10                   _PNRH1.Bits.VDS1_10
#define PNRH1_VDS1_11                   _PNRH1.Bits.VDS1_11
#define PNRH1_RDS1__8                   _PNRH1.MergedBits.grpRDS1__8
#define PNRH1_VDS1__8                   _PNRH1.MergedBits.grpVDS1__8
#define PNRH1_RDS1_                     PNRH1_RDS1__8
#define PNRH1_VDS1_                     PNRH1_VDS1__8

#define PNRH1_RDS1_8_MASK               1
#define PNRH1_RDS1_9_MASK               2
#define PNRH1_VDS1_8_MASK               16
#define PNRH1_VDS1_9_MASK               32
#define PNRH1_VDS1_10_MASK              64
#define PNRH1_VDS1_11_MASK              128
#define PNRH1_RDS1__8_MASK              3
#define PNRH1_RDS1__8_BITNUM            0
#define PNRH1_VDS1__8_MASK              240
#define PNRH1_VDS1__8_BITNUM            4


/*** PNSL1 - PLL1 N Divider Select Register Low; 0x00000054 ***/
typedef union {
  byte Byte;
  struct {
    byte VDS1_0      :1;                                       /* VCO Divider Select Bit 0 */
    byte VDS1_1      :1;                                       /* VCO Divider Select Bit 1 */
    byte VDS1_2      :1;                                       /* VCO Divider Select Bit 2 */
    byte VDS1_3      :1;                                       /* VCO Divider Select Bit 3 */
    byte VDS1_4      :1;                                       /* VCO Divider Select Bit 4 */
    byte VDS1_5      :1;                                       /* VCO Divider Select Bit 5 */
    byte VDS1_6      :1;                                       /* VCO Divider Select Bit 6 */
    byte VDS1_7      :1;                                       /* VCO Divider Select Bit 7 */
  } Bits;
} PNSL1STR;
extern volatile PNSL1STR _PNSL1;
#define PNSL1                           _PNSL1.Byte
#define PNSL1_VDS1_0                    _PNSL1.Bits.VDS1_0
#define PNSL1_VDS1_1                    _PNSL1.Bits.VDS1_1
#define PNSL1_VDS1_2                    _PNSL1.Bits.VDS1_2
#define PNSL1_VDS1_3                    _PNSL1.Bits.VDS1_3
#define PNSL1_VDS1_4                    _PNSL1.Bits.VDS1_4
#define PNSL1_VDS1_5                    _PNSL1.Bits.VDS1_5
#define PNSL1_VDS1_6                    _PNSL1.Bits.VDS1_6
#define PNSL1_VDS1_7                    _PNSL1.Bits.VDS1_7

#define PNSL1_VDS1_0_MASK               1
#define PNSL1_VDS1_1_MASK               2
#define PNSL1_VDS1_2_MASK               4
#define PNSL1_VDS1_3_MASK               8
#define PNSL1_VDS1_4_MASK               16
#define PNSL1_VDS1_5_MASK               32
#define PNSL1_VDS1_6_MASK               64
#define PNSL1_VDS1_7_MASK               128


/*** PRSL1 - PLL1 R Divider Select Register Low; 0x00000055 ***/
typedef union {
  byte Byte;
  struct {
    byte RDS1_0      :1;                                       /* Reference Divider Select Bit 0 */
    byte RDS1_1      :1;                                       /* Reference Divider Select Bit 1 */
    byte RDS1_2      :1;                                       /* Reference Divider Select Bit 2 */
    byte RDS1_3      :1;                                       /* Reference Divider Select Bit 3 */
    byte RDS1_4      :1;                                       /* Reference Divider Select Bit 4 */
    byte RDS1_5      :1;                                       /* Reference Divider Select Bit 5 */
    byte RDS1_6      :1;                                       /* Reference Divider Select Bit 6 */
    byte RDS1_7      :1;                                       /* Reference Divider Select Bit 7 */
  } Bits;
} PRSL1STR;
extern volatile PRSL1STR _PRSL1;
#define PRSL1                           _PRSL1.Byte
#define PRSL1_RDS1_0                    _PRSL1.Bits.RDS1_0
#define PRSL1_RDS1_1                    _PRSL1.Bits.RDS1_1
#define PRSL1_RDS1_2                    _PRSL1.Bits.RDS1_2
#define PRSL1_RDS1_3                    _PRSL1.Bits.RDS1_3
#define PRSL1_RDS1_4                    _PRSL1.Bits.RDS1_4
#define PRSL1_RDS1_5                    _PRSL1.Bits.RDS1_5
#define PRSL1_RDS1_6                    _PRSL1.Bits.RDS1_6
#define PRSL1_RDS1_7                    _PRSL1.Bits.RDS1_7

#define PRSL1_RDS1_0_MASK               1
#define PRSL1_RDS1_1_MASK               2
#define PRSL1_RDS1_2_MASK               4
#define PRSL1_RDS1_3_MASK               8
#define PRSL1_RDS1_4_MASK               16
#define PRSL1_RDS1_5_MASK               32
#define PRSL1_RDS1_6_MASK               64
#define PRSL1_RDS1_7_MASK               128


/*** PNRH2 - PLL2 N & R Divider Select Register High; 0x00000056 ***/
typedef union {
  byte Byte;
  struct {
    byte RDS2_8      :1;                                       /* Reference Divider Select Bit 8 */
    byte RDS2_9      :1;                                       /* Reference Divider Select Bit 9 */
    byte             :1; 
    byte             :1; 
    byte VDS2_8      :1;                                       /* VCO Divider Select Bit 8 */
    byte VDS2_9      :1;                                       /* VCO Divider Select Bit 9 */
    byte VDS2_10     :1;                                       /* VCO Divider Select Bit 10 */
    byte VDS2_11     :1;                                       /* VCO Divider Select Bit 11 */
  } Bits;
  struct {
    byte grpRDS2__8 :2;
    byte         :1;
    byte         :1;
    byte grpVDS2__8 :4;
  } MergedBits;
} PNRH2STR;
extern volatile PNRH2STR _PNRH2;
#define PNRH2                           _PNRH2.Byte
#define PNRH2_RDS2_8                    _PNRH2.Bits.RDS2_8
#define PNRH2_RDS2_9                    _PNRH2.Bits.RDS2_9
#define PNRH2_VDS2_8                    _PNRH2.Bits.VDS2_8
#define PNRH2_VDS2_9                    _PNRH2.Bits.VDS2_9
#define PNRH2_VDS2_10                   _PNRH2.Bits.VDS2_10
#define PNRH2_VDS2_11                   _PNRH2.Bits.VDS2_11
#define PNRH2_RDS2__8                   _PNRH2.MergedBits.grpRDS2__8
#define PNRH2_VDS2__8                   _PNRH2.MergedBits.grpVDS2__8
#define PNRH2_RDS2_                     PNRH2_RDS2__8
#define PNRH2_VDS2_                     PNRH2_VDS2__8

#define PNRH2_RDS2_8_MASK               1
#define PNRH2_RDS2_9_MASK               2
#define PNRH2_VDS2_8_MASK               16
#define PNRH2_VDS2_9_MASK               32
#define PNRH2_VDS2_10_MASK              64
#define PNRH2_VDS2_11_MASK              128
#define PNRH2_RDS2__8_MASK              3
#define PNRH2_RDS2__8_BITNUM            0
#define PNRH2_VDS2__8_MASK              240
#define PNRH2_VDS2__8_BITNUM            4


/*** PNSL2 - PLL2 N Divider Select Register Low; 0x00000057 ***/
typedef union {
  byte Byte;
  struct {
    byte VDS2_0      :1;                                       /* VCO Divider Select Bit 0 */
    byte VDS2_1      :1;                                       /* VCO Divider Select Bit 1 */
    byte VDS2_2      :1;                                       /* VCO Divider Select Bit 2 */
    byte VDS2_3      :1;                                       /* VCO Divider Select Bit 3 */
    byte VDS2_4      :1;                                       /* VCO Divider Select Bit 4 */
    byte VDS2_5      :1;                                       /* VCO Divider Select Bit 5 */
    byte VDS2_6      :1;                                       /* VCO Divider Select Bit 6 */
    byte VDS2_7      :1;                                       /* VCO Divider Select Bit 7 */
  } Bits;
} PNSL2STR;
extern volatile PNSL2STR _PNSL2;
#define PNSL2                           _PNSL2.Byte
#define PNSL2_VDS2_0                    _PNSL2.Bits.VDS2_0
#define PNSL2_VDS2_1                    _PNSL2.Bits.VDS2_1
#define PNSL2_VDS2_2                    _PNSL2.Bits.VDS2_2
#define PNSL2_VDS2_3                    _PNSL2.Bits.VDS2_3
#define PNSL2_VDS2_4                    _PNSL2.Bits.VDS2_4
#define PNSL2_VDS2_5                    _PNSL2.Bits.VDS2_5
#define PNSL2_VDS2_6                    _PNSL2.Bits.VDS2_6
#define PNSL2_VDS2_7                    _PNSL2.Bits.VDS2_7

#define PNSL2_VDS2_0_MASK               1
#define PNSL2_VDS2_1_MASK               2
#define PNSL2_VDS2_2_MASK               4
#define PNSL2_VDS2_3_MASK               8
#define PNSL2_VDS2_4_MASK               16
#define PNSL2_VDS2_5_MASK               32
#define PNSL2_VDS2_6_MASK               64
#define PNSL2_VDS2_7_MASK               128


/*** PRSL2 - PLL2 R Divider Select Register Low; 0x00000058 ***/
typedef union {
  byte Byte;
  struct {
    byte RDS2_0      :1;                                       /* Reference Divider Select Bit 0 */
    byte RDS2_1      :1;                                       /* Reference Divider Select Bit 1 */
    byte RDS2_2      :1;                                       /* Reference Divider Select Bit 2 */
    byte RDS2_3      :1;                                       /* Reference Divider Select Bit 3 */
    byte RDS2_4      :1;                                       /* Reference Divider Select Bit 4 */
    byte RDS2_5      :1;                                       /* Reference Divider Select Bit 5 */
    byte RDS2_6      :1;                                       /* Reference Divider Select Bit 6 */
    byte RDS2_7      :1;                                       /* Reference Divider Select Bit 7 */
  } Bits;
} PRSL2STR;
extern volatile PRSL2STR _PRSL2;
#define PRSL2                           _PRSL2.Byte
#define PRSL2_RDS2_0                    _PRSL2.Bits.RDS2_0
#define PRSL2_RDS2_1                    _PRSL2.Bits.RDS2_1
#define PRSL2_RDS2_2                    _PRSL2.Bits.RDS2_2
#define PRSL2_RDS2_3                    _PRSL2.Bits.RDS2_3
#define PRSL2_RDS2_4                    _PRSL2.Bits.RDS2_4
#define PRSL2_RDS2_5                    _PRSL2.Bits.RDS2_5
#define PRSL2_RDS2_6                    _PRSL2.Bits.RDS2_6
#define PRSL2_RDS2_7                    _PRSL2.Bits.RDS2_7

#define PRSL2_RDS2_0_MASK               1
#define PRSL2_RDS2_1_MASK               2
#define PRSL2_RDS2_2_MASK               4
#define PRSL2_RDS2_3_MASK               8
#define PRSL2_RDS2_4_MASK               16
#define PRSL2_RDS2_5_MASK               32
#define PRSL2_RDS2_6_MASK               64
#define PRSL2_RDS2_7_MASK               128


/*** PDCR - Phase Detector Control Register; 0x00000059 ***/
typedef union {
  byte Byte;
  struct {
    byte PHD_0       :1;                                       /* Phase detector Control Bits for both PLLs, bit 0 */
    byte PHD_1       :1;                                       /* Phase detector Control Bits for both PLLs, bit 1 */
    byte PHD_2       :1;                                       /* Phase detector Control Bits for both PLLs, bit 2 */
    byte PHD_3       :1;                                       /* Phase detector Control Bits for both PLLs, bit 3 */
    byte PHD_4       :1;                                       /* Phase detector Control Bits for both PLLs, bit 4 */
    byte PHD_5       :1;                                       /* Phase detector Control Bits for both PLLs, bit 5 */
    byte PHD_6       :1;                                       /* Phase detector Control Bits for both PLLs, bit 6 */
    byte PHD_7       :1;                                       /* Phase detector Control Bits for both PLLs, bit 7 */
  } Bits;
} PDCRSTR;
extern volatile PDCRSTR _PDCR;
#define PDCR                            _PDCR.Byte
#define PDCR_PHD_0                      _PDCR.Bits.PHD_0
#define PDCR_PHD_1                      _PDCR.Bits.PHD_1
#define PDCR_PHD_2                      _PDCR.Bits.PHD_2
#define PDCR_PHD_3                      _PDCR.Bits.PHD_3
#define PDCR_PHD_4                      _PDCR.Bits.PHD_4
#define PDCR_PHD_5                      _PDCR.Bits.PHD_5
#define PDCR_PHD_6                      _PDCR.Bits.PHD_6
#define PDCR_PHD_7                      _PDCR.Bits.PHD_7

#define PDCR_PHD_0_MASK                 1
#define PDCR_PHD_1_MASK                 2
#define PDCR_PHD_2_MASK                 4
#define PDCR_PHD_3_MASK                 8
#define PDCR_PHD_4_MASK                 16
#define PDCR_PHD_5_MASK                 32
#define PDCR_PHD_6_MASK                 64
#define PDCR_PHD_7_MASK                 128


/*** SCC1 - SCI Control Register 1; 0x0000005A ***/
typedef union {
  byte Byte;
  struct {
    byte PTY         :1;                                       /* Parity Bit */
    byte PEN         :1;                                       /* Parity Enable Bit */
    byte ILTY        :1;                                       /* Idle Line Type Bit */
    byte WAKE        :1;                                       /* Wakeup Condition Bit */
    byte M           :1;                                       /* Mode (Character Length) Bit */
    byte TXINV       :1;                                       /* Transmit Inversion Bit */
    byte ENSCI       :1;                                       /* Enable SCI Bit */
    byte LOOPS       :1;                                       /* Loop Mode Select Bit */
  } Bits;
} SCC1STR;
extern volatile SCC1STR _SCC1;
#define SCC1                            _SCC1.Byte
#define SCC1_PTY                        _SCC1.Bits.PTY
#define SCC1_PEN                        _SCC1.Bits.PEN
#define SCC1_ILTY                       _SCC1.Bits.ILTY
#define SCC1_WAKE                       _SCC1.Bits.WAKE
#define SCC1_M                          _SCC1.Bits.M
#define SCC1_TXINV                      _SCC1.Bits.TXINV
#define SCC1_ENSCI                      _SCC1.Bits.ENSCI
#define SCC1_LOOPS                      _SCC1.Bits.LOOPS

#define SCC1_PTY_MASK                   1
#define SCC1_PEN_MASK                   2
#define SCC1_ILTY_MASK                  4
#define SCC1_WAKE_MASK                  8
#define SCC1_M_MASK                     16
#define SCC1_TXINV_MASK                 32
#define SCC1_ENSCI_MASK                 64
#define SCC1_LOOPS_MASK                 128


/*** SCC2 - SCI Control Register 2; 0x0000005B ***/
typedef union {
  byte Byte;
  struct {
    byte SBK         :1;                                       /* Send Break Bit */
    byte RWU         :1;                                       /* Receiver Wakeup Bit */
    byte RE          :1;                                       /* Receiver Enable Bit */
    byte TE          :1;                                       /* Transmitter Enable Bit */
    byte ILIE        :1;                                       /* Idle Line Interrupt Enable Bit */
    byte SCRIE       :1;                                       /* SCI Receive Interrupt Enable Bit */
    byte TCIE        :1;                                       /* Transmission Complete Interrupt Enable Bit */
    byte SCTIE       :1;                                       /* SCI Transmit Interrupt Enable Bit */
  } Bits;
} SCC2STR;
extern volatile SCC2STR _SCC2;
#define SCC2                            _SCC2.Byte
#define SCC2_SBK                        _SCC2.Bits.SBK
#define SCC2_RWU                        _SCC2.Bits.RWU
#define SCC2_RE                         _SCC2.Bits.RE
#define SCC2_TE                         _SCC2.Bits.TE
#define SCC2_ILIE                       _SCC2.Bits.ILIE
#define SCC2_SCRIE                      _SCC2.Bits.SCRIE
#define SCC2_TCIE                       _SCC2.Bits.TCIE
#define SCC2_SCTIE                      _SCC2.Bits.SCTIE

#define SCC2_SBK_MASK                   1
#define SCC2_RWU_MASK                   2
#define SCC2_RE_MASK                    4
#define SCC2_TE_MASK                    8
#define SCC2_ILIE_MASK                  16
#define SCC2_SCRIE_MASK                 32
#define SCC2_TCIE_MASK                  64
#define SCC2_SCTIE_MASK                 128


/*** SCC3 - SCI Control Register 3; 0x0000005C ***/
typedef union {
  byte Byte;
  struct {
    byte PEIE        :1;                                       /* Receiver Parity Error Interrupt Enable Bit */
    byte FEIE        :1;                                       /* Receiver Framing Error Interrupt Enable Bit */
    byte NEIE        :1;                                       /* Receiver Noise Error Interrupt Enable Bit */
    byte ORIE        :1;                                       /* Receiver Overrun Interrupt Enable Bit */
    byte             :1; 
    byte             :1; 
    byte T8          :1;                                       /* Transmitted Bit 8 */
    byte R8          :1;                                       /* Received Bit 8 */
  } Bits;
} SCC3STR;
extern volatile SCC3STR _SCC3;
#define SCC3                            _SCC3.Byte
#define SCC3_PEIE                       _SCC3.Bits.PEIE
#define SCC3_FEIE                       _SCC3.Bits.FEIE
#define SCC3_NEIE                       _SCC3.Bits.NEIE
#define SCC3_ORIE                       _SCC3.Bits.ORIE
#define SCC3_T8                         _SCC3.Bits.T8
#define SCC3_R8                         _SCC3.Bits.R8

#define SCC3_PEIE_MASK                  1
#define SCC3_FEIE_MASK                  2
#define SCC3_NEIE_MASK                  4
#define SCC3_ORIE_MASK                  8
#define SCC3_T8_MASK                    64
#define SCC3_R8_MASK                    128


/*** SCS1 - SCI Status Register 1; 0x0000005D ***/
typedef union {
  byte Byte;
  struct {
    byte PE          :1;                                       /* Receiver Parity Error Bit */
    byte FE          :1;                                       /* Receiver Framing Error Bit */
    byte NF          :1;                                       /* Receiver Noise Flag Bit */
    byte OR          :1;                                       /* Receiver Overrun Bit */
    byte IDLE        :1;                                       /* Receiver Idle Bit */
    byte SCRF        :1;                                       /* SCI Receiver Full Bit */
    byte TC          :1;                                       /* Transmission Complete Bit */
    byte SCTE        :1;                                       /* SCI Transmitter Empty Bit */
  } Bits;
} SCS1STR;
extern volatile SCS1STR _SCS1;
#define SCS1                            _SCS1.Byte
#define SCS1_PE                         _SCS1.Bits.PE
#define SCS1_FE                         _SCS1.Bits.FE
#define SCS1_NF                         _SCS1.Bits.NF
#define SCS1_OR                         _SCS1.Bits.OR
#define SCS1_IDLE                       _SCS1.Bits.IDLE
#define SCS1_SCRF                       _SCS1.Bits.SCRF
#define SCS1_TC                         _SCS1.Bits.TC
#define SCS1_SCTE                       _SCS1.Bits.SCTE

#define SCS1_PE_MASK                    1
#define SCS1_FE_MASK                    2
#define SCS1_NF_MASK                    4
#define SCS1_OR_MASK                    8
#define SCS1_IDLE_MASK                  16
#define SCS1_SCRF_MASK                  32
#define SCS1_TC_MASK                    64
#define SCS1_SCTE_MASK                  128


/*** SCS2 - SCI Status Register 2; 0x0000005E ***/
typedef union {
  byte Byte;
  struct {
    byte RPF         :1;                                       /* Reception in Progress Flag Bit */
    byte BKF         :1;                                       /* Break Flag Bit */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
} SCS2STR;
extern volatile SCS2STR _SCS2;
#define SCS2                            _SCS2.Byte
#define SCS2_RPF                        _SCS2.Bits.RPF
#define SCS2_BKF                        _SCS2.Bits.BKF

#define SCS2_RPF_MASK                   1
#define SCS2_BKF_MASK                   2


/*** SCDR - SCI Data Register; 0x0000005F ***/
typedef union {
  byte Byte;
  struct {
    byte R0_T0       :1;                                       /* Receive/Transmit Data Bit 0 */
    byte R1_T1       :1;                                       /* Receive/Transmit Data Bit 1 */
    byte R2_T2       :1;                                       /* Receive/Transmit Data Bit 2 */
    byte R3_T3       :1;                                       /* Receive/Transmit Data Bit 3 */
    byte R4_T4       :1;                                       /* Receive/Transmit Data Bit 4 */
    byte R5_T5       :1;                                       /* Receive/Transmit Data Bit 5 */
    byte R6_T6       :1;                                       /* Receive/Transmit Data Bit 6 */
    byte R7_T7       :1;                                       /* Receive/Transmit Data Bit 7 */
  } Bits;
} SCDRSTR;
extern volatile SCDRSTR _SCDR;
#define SCDR                            _SCDR.Byte
#define SCDR_R0_T0                      _SCDR.Bits.R0_T0
#define SCDR_R1_T1                      _SCDR.Bits.R1_T1
#define SCDR_R2_T2                      _SCDR.Bits.R2_T2
#define SCDR_R3_T3                      _SCDR.Bits.R3_T3
#define SCDR_R4_T4                      _SCDR.Bits.R4_T4
#define SCDR_R5_T5                      _SCDR.Bits.R5_T5
#define SCDR_R6_T6                      _SCDR.Bits.R6_T6
#define SCDR_R7_T7                      _SCDR.Bits.R7_T7

#define SCDR_R0_T0_MASK                 1
#define SCDR_R1_T1_MASK                 2
#define SCDR_R2_T2_MASK                 4
#define SCDR_R3_T3_MASK                 8
#define SCDR_R4_T4_MASK                 16
#define SCDR_R5_T5_MASK                 32
#define SCDR_R6_T6_MASK                 64
#define SCDR_R7_T7_MASK                 128


/*** SCBR - SCI Baud Rate Register; 0x00000060 ***/
typedef union {
  byte Byte;
  struct {
    byte SCR0        :1;                                       /* SCI Baud Rate Select Bit 0 */
    byte SCR1        :1;                                       /* SCI Baud Rate Select Bit 1 */
    byte SCR2        :1;                                       /* SCI Baud Rate Select Bit 2 */
    byte             :1; 
    byte SCP0        :1;                                       /* SCI Baud Rate Prescaler Bit 0 */
    byte SCP1        :1;                                       /* SCI Baud Rate Prescaler Bit 1 */
    byte             :1; 
    byte             :1; 
  } Bits;
  struct {
    byte grpSCR  :3;
    byte         :1;
    byte grpSCP  :2;
    byte         :1;
    byte         :1;
  } MergedBits;
} SCBRSTR;
extern volatile SCBRSTR _SCBR;
#define SCBR                            _SCBR.Byte
#define SCBR_SCR0                       _SCBR.Bits.SCR0
#define SCBR_SCR1                       _SCBR.Bits.SCR1
#define SCBR_SCR2                       _SCBR.Bits.SCR2
#define SCBR_SCP0                       _SCBR.Bits.SCP0
#define SCBR_SCP1                       _SCBR.Bits.SCP1
#define SCBR_SCR                        _SCBR.MergedBits.grpSCR
#define SCBR_SCP                        _SCBR.MergedBits.grpSCP

#define SCBR_SCR0_MASK                  1
#define SCBR_SCR1_MASK                  2
#define SCBR_SCR2_MASK                  4
#define SCBR_SCP0_MASK                  16
#define SCBR_SCP1_MASK                  32
#define SCBR_SCR_MASK                   7
#define SCBR_SCR_BITNUM                 0
#define SCBR_SCP_MASK                   48
#define SCBR_SCP_BITNUM                 4


/*** BSR - Break Status Register; 0x0000FE00 ***/
typedef union {
  byte Byte;
  struct {
    byte             :1; 
    byte SBSW        :1;                                       /* SIM Break Stop/Wait Bit */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
} BSRSTR;
extern volatile BSRSTR _BSR;
#define BSR                             _BSR.Byte
#define BSR_SBSW                        _BSR.Bits.SBSW

#define BSR_SBSW_MASK                   2


/*** RSR - Reset Status Register; 0x0000FE01 ***/
typedef union {
  byte Byte;
  struct {
    byte             :1; 
    byte LVI         :1;                                       /* Low-Voltage Inhibit Reset Bit */
    byte USB         :1;                                       /* Universal Serial Bus Reset Bit */
    byte ILAD        :1;                                       /* Illegal Address Reset Bit */
    byte ILOP        :1;                                       /* Illegal Opcode Reset Bit */
    byte COP         :1;                                       /* Computer Operating Properly Reset Bit */
    byte PIN         :1;                                       /* External Reset Bit */
    byte POR         :1;                                       /* Power-On Reset Bit */
  } Bits;
} RSRSTR;
extern volatile RSRSTR _RSR;
#define RSR                             _RSR.Byte
#define RSR_LVI                         _RSR.Bits.LVI
#define RSR_USB                         _RSR.Bits.USB
#define RSR_ILAD                        _RSR.Bits.ILAD
#define RSR_ILOP                        _RSR.Bits.ILOP
#define RSR_COP                         _RSR.Bits.COP
#define RSR_PIN                         _RSR.Bits.PIN
#define RSR_POR                         _RSR.Bits.POR

#define RSR_LVI_MASK                    2
#define RSR_USB_MASK                    4
#define RSR_ILAD_MASK                   8
#define RSR_ILOP_MASK                   16
#define RSR_COP_MASK                    32
#define RSR_PIN_MASK                    64
#define RSR_POR_MASK                    128


/*** SBFCR - SIM Break Flag Control Register; 0x0000FE03 ***/
typedef union {
  byte Byte;
  struct {
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte BCFE        :1;                                       /* Break Clear Flag Enable Bit */
  } Bits;
} SBFCRSTR;
extern volatile SBFCRSTR _SBFCR;
#define SBFCR                           _SBFCR.Byte
#define SBFCR_BCFE                      _SBFCR.Bits.BCFE

#define SBFCR_BCFE_MASK                 128


/*** INT1 - Interrupt Status Register 1; 0x0000FE04 ***/
typedef union {
  byte Byte;
  struct {
    byte             :1; 
    byte             :1; 
    byte IF1         :1;                                       /* Interrupt Flag 1 */
    byte IF2         :1;                                       /* Interrrupt Flag 2 */
    byte IF3         :1;                                       /* Interrupt Flag 3 */
    byte IF4         :1;                                       /* Interrupt Flag 4 */
    byte IF5         :1;                                       /* Interrupt Flag 5 */
    byte IF6         :1;                                       /* Interrupt Flag 6 */
  } Bits;
  struct {
    byte         :1;
    byte         :1;
    byte grpIF_1 :6;
  } MergedBits;
} INT1STR;
extern volatile INT1STR _INT1;
#define INT1                            _INT1.Byte
#define INT1_IF1                        _INT1.Bits.IF1
#define INT1_IF2                        _INT1.Bits.IF2
#define INT1_IF3                        _INT1.Bits.IF3
#define INT1_IF4                        _INT1.Bits.IF4
#define INT1_IF5                        _INT1.Bits.IF5
#define INT1_IF6                        _INT1.Bits.IF6
#define INT1_IF_1                       _INT1.MergedBits.grpIF_1
#define INT1_IF                         INT1_IF_1

#define INT1_IF1_MASK                   4
#define INT1_IF2_MASK                   8
#define INT1_IF3_MASK                   16
#define INT1_IF4_MASK                   32
#define INT1_IF5_MASK                   64
#define INT1_IF6_MASK                   128
#define INT1_IF_1_MASK                  252
#define INT1_IF_1_BITNUM                2


/*** INT2 - Interrupt Status Register 2; 0x0000FE05 ***/
typedef union {
  byte Byte;
  struct {
    byte IF7         :1;                                       /* Interrupt Flag 7 */
    byte IF8         :1;                                       /* Interrupt Flag 8 */
    byte IF9         :1;                                       /* Interrupt Flag 9 */
    byte IF10        :1;                                       /* Interrupt Flag 10 */
    byte IF11        :1;                                       /* Interrupt Flag 11 */
    byte IF12        :1;                                       /* Interrupt Flag 12 */
    byte IF13        :1;                                       /* Interrupt Flag 13 */
    byte IF14        :1;                                       /* Interrupt Flag 14 */
  } Bits;
} INT2STR;
extern volatile INT2STR _INT2;
#define INT2                            _INT2.Byte
#define INT2_IF7                        _INT2.Bits.IF7
#define INT2_IF8                        _INT2.Bits.IF8
#define INT2_IF9                        _INT2.Bits.IF9
#define INT2_IF10                       _INT2.Bits.IF10
#define INT2_IF11                       _INT2.Bits.IF11
#define INT2_IF12                       _INT2.Bits.IF12
#define INT2_IF13                       _INT2.Bits.IF13
#define INT2_IF14                       _INT2.Bits.IF14

#define INT2_IF7_MASK                   1
#define INT2_IF8_MASK                   2
#define INT2_IF9_MASK                   4
#define INT2_IF10_MASK                  8
#define INT2_IF11_MASK                  16
#define INT2_IF12_MASK                  32
#define INT2_IF13_MASK                  64
#define INT2_IF14_MASK                  128


/*** FLCR - FLASH Control Register; 0x0000FE08 ***/
typedef union {
  byte Byte;
  struct {
    byte PGM         :1;                                       /* Program Control Bit */
    byte ERASE       :1;                                       /* Erase Control Bit */
    byte MASS        :1;                                       /* Mass Erase Control Bit */
    byte HVEN        :1;                                       /* High-Voltage Enable Bit */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
} FLCRSTR;
extern volatile FLCRSTR _FLCR;
#define FLCR                            _FLCR.Byte
#define FLCR_PGM                        _FLCR.Bits.PGM
#define FLCR_ERASE                      _FLCR.Bits.ERASE
#define FLCR_MASS                       _FLCR.Bits.MASS
#define FLCR_HVEN                       _FLCR.Bits.HVEN

#define FLCR_PGM_MASK                   1
#define FLCR_ERASE_MASK                 2
#define FLCR_MASS_MASK                  4
#define FLCR_HVEN_MASK                  8


/*** FLBPR - FLASH Block Protect Register; 0x0000FE09 ***/
typedef union {
  byte Byte;
  struct {
    byte BPR0        :1;                                       /* Block Protect Register Bit 0 */
    byte BPR1        :1;                                       /* Block Protect Register Bit 1 */
    byte BPR2        :1;                                       /* Block Protect Register Bit 2 */
    byte BPR3        :1;                                       /* Block Protect Register Bit 3 */
    byte BPR4        :1;                                       /* Block Protect Register Bit 4 */
    byte BPR5        :1;                                       /* Block Protect Register Bit 5 */
    byte BPR6        :1;                                       /* Block Protect Register Bit 6 */
    byte BPR7        :1;                                       /* Block Protect Register Bit 7 */
  } Bits;
} FLBPRSTR;
extern volatile FLBPRSTR _FLBPR;
#define FLBPR                           _FLBPR.Byte
#define FLBPR_BPR0                      _FLBPR.Bits.BPR0
#define FLBPR_BPR1                      _FLBPR.Bits.BPR1
#define FLBPR_BPR2                      _FLBPR.Bits.BPR2
#define FLBPR_BPR3                      _FLBPR.Bits.BPR3
#define FLBPR_BPR4                      _FLBPR.Bits.BPR4
#define FLBPR_BPR5                      _FLBPR.Bits.BPR5
#define FLBPR_BPR6                      _FLBPR.Bits.BPR6
#define FLBPR_BPR7                      _FLBPR.Bits.BPR7

#define FLBPR_BPR0_MASK                 1
#define FLBPR_BPR1_MASK                 2
#define FLBPR_BPR2_MASK                 4
#define FLBPR_BPR3_MASK                 8
#define FLBPR_BPR4_MASK                 16
#define FLBPR_BPR5_MASK                 32
#define FLBPR_BPR6_MASK                 64
#define FLBPR_BPR7_MASK                 128


/*** BRK - Break Address Register; 0x0000FE0C ***/
typedef union {
  word Word;
   /* Overlapped registers: */
  struct {
    /*** BRKH - Break Address Register High; 0x0000FE0C ***/
    union {
      byte Byte;
      struct {
        byte BIT8        :1;                                       /* Break Address Register Bit 8 */
        byte BIT9        :1;                                       /* Break Address Register Bit 9 */
        byte BIT10       :1;                                       /* Break Address Register Bit 10 */
        byte BIT11       :1;                                       /* Break Address Register Bit 11 */
        byte BIT12       :1;                                       /* Break Address Register Bit 12 */
        byte BIT13       :1;                                       /* Break Address Register Bit 13 */
        byte BIT14       :1;                                       /* Break Address Register Bit 14 */
        byte BIT15       :1;                                       /* Break Address Register Bit 15 */
      } Bits;
    } BRKHSTR;
    #define BRKH                        _BRK.Overlap_STR.BRKHSTR.Byte
    #define BRKH_BIT8                   _BRK.Overlap_STR.BRKHSTR.Bits.BIT8
    #define BRKH_BIT9                   _BRK.Overlap_STR.BRKHSTR.Bits.BIT9
    #define BRKH_BIT10                  _BRK.Overlap_STR.BRKHSTR.Bits.BIT10
    #define BRKH_BIT11                  _BRK.Overlap_STR.BRKHSTR.Bits.BIT11
    #define BRKH_BIT12                  _BRK.Overlap_STR.BRKHSTR.Bits.BIT12
    #define BRKH_BIT13                  _BRK.Overlap_STR.BRKHSTR.Bits.BIT13
    #define BRKH_BIT14                  _BRK.Overlap_STR.BRKHSTR.Bits.BIT14
    #define BRKH_BIT15                  _BRK.Overlap_STR.BRKHSTR.Bits.BIT15
    
    #define BRKH_BIT8_MASK              1
    #define BRKH_BIT9_MASK              2
    #define BRKH_BIT10_MASK             4
    #define BRKH_BIT11_MASK             8
    #define BRKH_BIT12_MASK             16
    #define BRKH_BIT13_MASK             32
    #define BRKH_BIT14_MASK             64
    #define BRKH_BIT15_MASK             128
    

    /*** BRKL - Break Address Register Low; 0x0000FE0D ***/
    union {
      byte Byte;
      struct {
        byte BIT0        :1;                                       /* Break Address Register Bit 0 */
        byte BIT1        :1;                                       /* Break Address Register Bit 1 */
        byte BIT2        :1;                                       /* Break Address Register Bit 2 */
        byte BIT3        :1;                                       /* Break Address Register Bit 3 */
        byte BIT4        :1;                                       /* Break Address Register Bit 4 */
        byte BIT5        :1;                                       /* Break Address Register Bit 5 */
        byte BIT6        :1;                                       /* Break Address Register Bit 6 */
        byte BIT7        :1;                                       /* Break Address Register Bit 7 */
      } Bits;
    } BRKLSTR;
    #define BRKL                        _BRK.Overlap_STR.BRKLSTR.Byte
    #define BRKL_BIT0                   _BRK.Overlap_STR.BRKLSTR.Bits.BIT0
    #define BRKL_BIT1                   _BRK.Overlap_STR.BRKLSTR.Bits.BIT1
    #define BRKL_BIT2                   _BRK.Overlap_STR.BRKLSTR.Bits.BIT2
    #define BRKL_BIT3                   _BRK.Overlap_STR.BRKLSTR.Bits.BIT3
    #define BRKL_BIT4                   _BRK.Overlap_STR.BRKLSTR.Bits.BIT4
    #define BRKL_BIT5                   _BRK.Overlap_STR.BRKLSTR.Bits.BIT5
    #define BRKL_BIT6                   _BRK.Overlap_STR.BRKLSTR.Bits.BIT6
    #define BRKL_BIT7                   _BRK.Overlap_STR.BRKLSTR.Bits.BIT7
    
    #define BRKL_BIT0_MASK              1
    #define BRKL_BIT1_MASK              2
    #define BRKL_BIT2_MASK              4
    #define BRKL_BIT3_MASK              8
    #define BRKL_BIT4_MASK              16
    #define BRKL_BIT5_MASK              32
    #define BRKL_BIT6_MASK              64
    #define BRKL_BIT7_MASK              128
    
  } Overlap_STR;

} BRKSTR;
extern volatile BRKSTR _BRK;
#define BRK                             _BRK.Word


/*** BRKSCR - Break Status and Control Register; 0x0000FE0E ***/
typedef union {
  byte Byte;
  struct {
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte BRKA        :1;                                       /* Break Active Bit */
    byte BRKE        :1;                                       /* Break Enable Bit */
  } Bits;
} BRKSCRSTR;
extern volatile BRKSCRSTR _BRKSCR;
#define BRKSCR                          _BRKSCR.Byte
#define BRKSCR_BRKA                     _BRKSCR.Bits.BRKA
#define BRKSCR_BRKE                     _BRKSCR.Bits.BRKE

#define BRKSCR_BRKA_MASK                64
#define BRKSCR_BRKE_MASK                128


/*** COPCTL - COP Control Register; 0x0000FFFF ***/
typedef union {
  byte Byte;
  struct {
    byte BIT0        :1;                                       /* Bit 0 */
    byte BIT1        :1;                                       /* Bit 1 */
    byte BIT2        :1;                                       /* Bit 2 */
    byte BIT3        :1;                                       /* Bit 3 */
    byte BIT4        :1;                                       /* Bit 4 */
    byte BIT5        :1;                                       /* Bit 5 */
    byte BIT6        :1;                                       /* Bit 6 */
    byte BIT7        :1;                                       /* Bit 7 */
  } Bits;
} COPCTLSTR;
extern volatile COPCTLSTR _COPCTL;
#define COPCTL                          _COPCTL.Byte
#define COPCTL_BIT0                     _COPCTL.Bits.BIT0
#define COPCTL_BIT1                     _COPCTL.Bits.BIT1
#define COPCTL_BIT2                     _COPCTL.Bits.BIT2
#define COPCTL_BIT3                     _COPCTL.Bits.BIT3
#define COPCTL_BIT4                     _COPCTL.Bits.BIT4
#define COPCTL_BIT5                     _COPCTL.Bits.BIT5
#define COPCTL_BIT6                     _COPCTL.Bits.BIT6
#define COPCTL_BIT7                     _COPCTL.Bits.BIT7

#define COPCTL_BIT0_MASK                1
#define COPCTL_BIT1_MASK                2
#define COPCTL_BIT2_MASK                4
#define COPCTL_BIT3_MASK                8
#define COPCTL_BIT4_MASK                16
#define COPCTL_BIT5_MASK                32
#define COPCTL_BIT6_MASK                64
#define COPCTL_BIT7_MASK                128



/***********************************************/
/**   D E P R E C I A T E D   S Y M B O L S   **/
/***********************************************/
/* ---------------------------------------------------------------------------------------------------
Exceptions in bit names of timer status and control registers
due to backward compatibility with previous releases  */
#define T1SC0_CHxMAX _T1SC0.Bits.CH0MAX
#define T1SC0_TOVx _T1SC0.Bits.TOV0
#define T1SC0_ELSxA _T1SC0.Bits.ELS0A
#define T1SC0_ELSxB _T1SC0.Bits.ELS0B
#define T1SC0_MSxA _T1SC0.Bits.MS0A
#define T1SC0_MSxB _T1SC0.Bits.MS0B
#define T1SC0_CHxIE _T1SC0.Bits.CH0IE
#define T1SC0_CHxF _T1SC0.Bits.CH0F

#define T1SC1_CHxMAX _T1SC1.Bits.CH1MAX
#define T1SC1_TOVx _T1SC1.Bits.TOV1
#define T1SC1_ELSxA _T1SC1.Bits.ELS1A
#define T1SC1_ELSxB _T1SC1.Bits.ELS1B
#define T1SC1_MSxA _T1SC1.Bits.MS1A
#define T1SC1_CHxIE _T1SC1.Bits.CH1IE
#define T1SC1_CHxF _T1SC1.Bits.CH1F

#define T2SC0_CHxMAX _T2SC0.Bits.CH0MAX
#define T2SC0_TOVx _T2SC0.Bits.TOV0
#define T2SC0_ELSxA _T2SC0.Bits.ELS0A
#define T2SC0_ELSxB _T2SC0.Bits.ELS0B
#define T2SC0_MSxA _T2SC0.Bits.MS0A
#define T2SC0_MSxB _T2SC0.Bits.MS0B
#define T2SC0_CHxIE _T2SC0.Bits.CH0IE
#define T2SC0_CHxF _T2SC0.Bits.CH0F

#define T2SC1_CHxMAX _T2SC1.Bits.CH1MAX
#define T2SC1_TOVx _T2SC1.Bits.TOV1
#define T2SC1_ELSxA _T2SC1.Bits.ELS1A
#define T2SC1_ELSxB _T2SC1.Bits.ELS1B
#define T2SC1_MSxA _T2SC1.Bits.MS1A
#define T2SC1_CHxIE _T2SC1.Bits.CH1IE
#define T2SC1_CHxF _T2SC1.Bits.CH1F

/* --------------------------------------------------------------------------- */
/* The following symbols were removed, because they were invalid or irrelevant */
/* --------------------------------------------------------------------------- */


/* **** 11.9.2009 12:42:38 */

#define T1CH_ARR                         This_symb_has_been_depreciated
#define T2CH_ARR                         This_symb_has_been_depreciated
#endif
