/* Based on CPU DB MC68HC908LK24_80, version 2.87.089 (RegistersPrg V2.30) */
/*
** ###################################################################
**     Filename  : mc68hc908lj24.h
**     Processor : MC68HC908LJ24CPK
**     FileFormat: V2.30
**     DataSheet : MC68HC908LJ24/D Rev. 2.1 August 16, 2005
**     Compiler  : CodeWarrior compiler
**     Date/Time : 11.9.2009, 14:09
**     Abstract  :
**         This header implements the mapping of I/O devices.
**
**     Copyright : 1997 - 2009 Freescale Semiconductor, Inc. All Rights Reserved.
**     
**     http      : www.freescale.com
**     mail      : support@freescale.com
**
**     CPU Registers Revisions:
**      - 23.03.2006, V2.87.067:
**              - Renamed bits ADSCR_CHx ==> ADSCR_ADCHx. REASON: Bug-fix (#3140 in Issue Manager)
**      - 17.07.2007, V2.87.086:
**              - Corrected register FLBPR address (FECF ==>FFCF). REASON: Bug-fix (#4902 in Issue Manager)
**
**     File-Format-Revisions:
**      - 14.11.2005, V2.00 :
**               - Deprecated symbols added for backward compatibility (section at the end of this file)
**      - 15.11.2005, V2.01 :
**               - Changes have not affected this file (because they are related to another family)
**      - 17.12.2005, V2.02 :
**               - Arrays (symbols xx_ARR) are defined as pointer to volatile, see issue #2778
**      - 16.01.2006, V2.03 :
**               - Fixed declaration of non volatile registers. Now it does not require (but allows) their initialization, see issue #2920.
**               - "volatile" modifier removed from declaration of non volatile registers (that contain modifier "const")
**      - 08.03.2006, V2.04 :
**               - Support for bit(s) names duplicated with any register name in .h header files
**      - 24.03.2006, V2.05 :
**               - Changes have not affected this file (because they are related to another family)
**      - 26.04.2006, V2.06 :
**               - Absolute assembly supported (depreciated symbols are not defined)
**      - 27.04.2006, V2.07 :
**               - Fixed macro __RESET_WATCHDOG for HCS12, HCS12X ,HCS08 DZ and HCS08 EN derivatives (write 0x55,0xAA).
**      - 07.06.2006, V2.08 :
**               - For .inc files added constants "RAMStart" and "RAMEnd" even there is only Z_RAM.
**      - 03.07.2006, V2.09 :
**               - Flash commands constants supported
**      - 27.10.2006, V2.10 :
**               - __RESET_WATCHDOG improved formating and re-definition
**      - 23.11.2006, V2.11 :
**               - Changes have not affected this file (because they are related to another family)
**      - 22.01.2007, V2.12 :
**               - Changes have not affected this file (because they are related to another family)
**      - 01.03.2007, V2.13 :
**               - Flash commands constants values converted to HEX format
**      - 02.03.2007, V2.14 :
**               - Interrupt vector numbers added into .H, see VectorNumber_*
**      - 26.03.2007, V2.15 :
**               - Changes have not affected this file (because they are related to another family)
**      - 10.05.2007, V2.16 :
**               - Fixed flash commands definition for ColdFireV1 assembler (equ -> .equ)
**      - 05.06.2007, V2.17 :
**               - Changes have not affected this file (because they are related to another family)
**      - 19.07.2007, V2.18 :
**               - Improved number of blanked lines inside register structures
**      - 06.08.2007, V2.19 :
**               - CPUDB revisions generated ahead of the file-format revisions.
**      - 11.09.2007, V2.20 :
**               - Added comment about initialization of unbonded pins.
**      - 02.01.2008, V2.21 :
**               - Changes have not affected this file (because they are related to another family)
**      - 13.02.2008, V2.22 :
**               - Changes have not affected this file (because they are related to another family)
**      - 20.02.2008, V2.23 :
**               - Changes have not affected this file (because they are related to another family)
**      - 03.07.2008, V2.24 :
**               - Added support for bits with name starting with number (like "1HZ")
**      - 28.11.2008, V2.25 :
**               - StandBy RAM array declaration for ANSI-C added
**      - 1.12.2008, V2.26 :
**               - Duplication of bit (or bit-group) name with register name is not marked as a problem, is register is internal only and it is not displayed in I/O map.
**      - 17.3.2009, V2.27 :
**               - Merged bit-group is not generated, if the name matches with another bit name in the register
**      - 6.4.2009, V2.28 :
**               - Fixed generation of merged bits for bit-groups with a digit at the end, if group-name is defined in CPUDB
**      - 3.8.2009, V2.29 :
**               - If there is just one bits group matching register name, single bits are not generated
**      - 10.9.2009, V2.30 :
**               - Fixed generation of registers arrays.
**
**     Not all general-purpose I/O pins are available on all packages or on all mask sets of a specific
**     derivative device. To avoid extra current drain from floating input pins, the user’s reset
**     initialization routine in the application program must either enable on-chip pull-up devices
**     or change the direction of unconnected pins to outputs so the pins do not float.
** ###################################################################
*/

#ifndef _MC68HC908LJ24_H
#define _MC68HC908LJ24_H

/* Types definition */
typedef unsigned char byte;
typedef unsigned int word;
typedef unsigned long dword;
typedef unsigned long dlong[2];

/* Watchdog reset macro */
#ifndef __RESET_WATCHDOG
#ifdef _lint
  #define __RESET_WATCHDOG()  /* empty */
#else
  #define __RESET_WATCHDOG() {asm sta COPCTL;}
#endif
#endif /* __RESET_WATCHDOG */

#define REG_BASE 0x0000                /* Base address for the I/O register block */


#pragma MESSAGE DISABLE C1106 /* WARNING C1106: Non-standard bitfield type */

/**************** interrupt vector numbers ****************/
#define VectorNumber_RTC                19
#define VectorNumber_ADC                18
#define VectorNumber_KBD                17
#define VectorNumber_MMIIC              16
#define VectorNumber_SCITransmit        15
#define VectorNumber_SCIReceive         14
#define VectorNumber_SCIError           13
#define VectorNumber_SPIReceive         12
#define VectorNumber_SPITransmit        11
#define VectorNumber_TIM2Ovr            10
#define VectorNumber_TIM2CH1            9
#define VectorNumber_TIM2CH0            8
#define VectorNumber_TIM1Ovr            7
#define VectorNumber_TIM1CH1            6
#define VectorNumber_TIM1CH0            5
#define VectorNumber_PLL                4
#define VectorNumber_LVI                3
#define VectorNumber_IRQ                2
#define VectorNumber_SWI                1
#define VectorNumber_RESET              0

/**************** interrupt vector table ****************/
#define INT_RTC                         0x0000FFD8
#define INT_ADC                         0x0000FFDA
#define INT_KBD                         0x0000FFDC
#define INT_MMIIC                       0x0000FFDE
#define INT_SCITransmit                 0x0000FFE0
#define INT_SCIReceive                  0x0000FFE2
#define INT_SCIError                    0x0000FFE4
#define INT_SPIReceive                  0x0000FFE6
#define INT_SPITransmit                 0x0000FFE8
#define INT_TIM2Ovr                     0x0000FFEA
#define INT_TIM2CH1                     0x0000FFEC
#define INT_TIM2CH0                     0x0000FFEE
#define INT_TIM1Ovr                     0x0000FFF0
#define INT_TIM1CH1                     0x0000FFF2
#define INT_TIM1CH0                     0x0000FFF4
#define INT_PLL                         0x0000FFF6
#define INT_LVI                         0x0000FFF8
#define INT_IRQ                         0x0000FFFA
#define INT_SWI                         0x0000FFFC
#define INT_RESET                       0x0000FFFE

/**************** registers I/O map ****************/

/*** PTA - Port A Data Register; 0x00000000 ***/
typedef union {
  byte Byte;
  struct {
    byte PTA0        :1;                                       /* Port A Data Bit 0 */
    byte PTA1        :1;                                       /* Port A Data Bit 1 */
    byte PTA2        :1;                                       /* Port A Data Bit 2 */
    byte PTA3        :1;                                       /* Port A Data Bit 3 */
    byte PTA4        :1;                                       /* Port A Data Bit 4 */
    byte PTA5        :1;                                       /* Port A Data Bit 5 */
    byte PTA6        :1;                                       /* Port A Data Bit 6 */
    byte PTA7        :1;                                       /* Port A Data Bit 7 */
  } Bits;
} PTASTR;
extern volatile PTASTR _PTA;
#define PTA                             _PTA.Byte
#define PTA_PTA0                        _PTA.Bits.PTA0
#define PTA_PTA1                        _PTA.Bits.PTA1
#define PTA_PTA2                        _PTA.Bits.PTA2
#define PTA_PTA3                        _PTA.Bits.PTA3
#define PTA_PTA4                        _PTA.Bits.PTA4
#define PTA_PTA5                        _PTA.Bits.PTA5
#define PTA_PTA6                        _PTA.Bits.PTA6
#define PTA_PTA7                        _PTA.Bits.PTA7

#define PTA_PTA0_MASK                   1
#define PTA_PTA1_MASK                   2
#define PTA_PTA2_MASK                   4
#define PTA_PTA3_MASK                   8
#define PTA_PTA4_MASK                   16
#define PTA_PTA5_MASK                   32
#define PTA_PTA6_MASK                   64
#define PTA_PTA7_MASK                   128


/*** PTB - Port B Data Register; 0x00000001 ***/
typedef union {
  byte Byte;
  struct {
    byte PTB0        :1;                                       /* Port B Data Bit 0 */
    byte PTB1        :1;                                       /* Port B Data Bit 1 */
    byte PTB2        :1;                                       /* Port B Data Bit 2 */
    byte PTB3        :1;                                       /* Port B Data Bit 3 */
    byte PTB4        :1;                                       /* Port B Data Bit 4 */
    byte PTB5        :1;                                       /* Port B Data Bit 5 */
    byte PTB6        :1;                                       /* Port B Data Bit 6 */
    byte PTB7        :1;                                       /* Port B Data Bit 7 */
  } Bits;
} PTBSTR;
extern volatile PTBSTR _PTB;
#define PTB                             _PTB.Byte
#define PTB_PTB0                        _PTB.Bits.PTB0
#define PTB_PTB1                        _PTB.Bits.PTB1
#define PTB_PTB2                        _PTB.Bits.PTB2
#define PTB_PTB3                        _PTB.Bits.PTB3
#define PTB_PTB4                        _PTB.Bits.PTB4
#define PTB_PTB5                        _PTB.Bits.PTB5
#define PTB_PTB6                        _PTB.Bits.PTB6
#define PTB_PTB7                        _PTB.Bits.PTB7

#define PTB_PTB0_MASK                   1
#define PTB_PTB1_MASK                   2
#define PTB_PTB2_MASK                   4
#define PTB_PTB3_MASK                   8
#define PTB_PTB4_MASK                   16
#define PTB_PTB5_MASK                   32
#define PTB_PTB6_MASK                   64
#define PTB_PTB7_MASK                   128


/*** PTC - Port C Data Register; 0x00000002 ***/
typedef union {
  byte Byte;
  struct {
    byte PTC0        :1;                                       /* Port C Data Bit 0 */
    byte PTC1        :1;                                       /* Port C Data Bit 1 */
    byte PTC2        :1;                                       /* Port C Data Bit 2 */
    byte PTC3        :1;                                       /* Port C Data Bit 3 */
    byte PTC4        :1;                                       /* Port C Data Bit 4 */
    byte PTC5        :1;                                       /* Port C Data Bit 5 */
    byte PTC6        :1;                                       /* Port C Data Bit 6 */
    byte PTC7        :1;                                       /* Port C Data Bit 7 */
  } Bits;
} PTCSTR;
extern volatile PTCSTR _PTC;
#define PTC                             _PTC.Byte
#define PTC_PTC0                        _PTC.Bits.PTC0
#define PTC_PTC1                        _PTC.Bits.PTC1
#define PTC_PTC2                        _PTC.Bits.PTC2
#define PTC_PTC3                        _PTC.Bits.PTC3
#define PTC_PTC4                        _PTC.Bits.PTC4
#define PTC_PTC5                        _PTC.Bits.PTC5
#define PTC_PTC6                        _PTC.Bits.PTC6
#define PTC_PTC7                        _PTC.Bits.PTC7

#define PTC_PTC0_MASK                   1
#define PTC_PTC1_MASK                   2
#define PTC_PTC2_MASK                   4
#define PTC_PTC3_MASK                   8
#define PTC_PTC4_MASK                   16
#define PTC_PTC5_MASK                   32
#define PTC_PTC6_MASK                   64
#define PTC_PTC7_MASK                   128


/*** PTD - Port D Data Register; 0x00000003 ***/
typedef union {
  byte Byte;
  struct {
    byte PTD0        :1;                                       /* Port D Data Bit 0 */
    byte PTD1        :1;                                       /* Port D Data Bit 1 */
    byte PTD2        :1;                                       /* Port D Data Bit 2 */
    byte PTD3        :1;                                       /* Port D Data Bit 3 */
    byte PTD4        :1;                                       /* Port D Data Bit 4 */
    byte PTD5        :1;                                       /* Port D Data Bit 5 */
    byte PTD6        :1;                                       /* Port D Data Bit 6 */
    byte PTD7        :1;                                       /* Port D Data Bit 7 */
  } Bits;
} PTDSTR;
extern volatile PTDSTR _PTD;
#define PTD                             _PTD.Byte
#define PTD_PTD0                        _PTD.Bits.PTD0
#define PTD_PTD1                        _PTD.Bits.PTD1
#define PTD_PTD2                        _PTD.Bits.PTD2
#define PTD_PTD3                        _PTD.Bits.PTD3
#define PTD_PTD4                        _PTD.Bits.PTD4
#define PTD_PTD5                        _PTD.Bits.PTD5
#define PTD_PTD6                        _PTD.Bits.PTD6
#define PTD_PTD7                        _PTD.Bits.PTD7

#define PTD_PTD0_MASK                   1
#define PTD_PTD1_MASK                   2
#define PTD_PTD2_MASK                   4
#define PTD_PTD3_MASK                   8
#define PTD_PTD4_MASK                   16
#define PTD_PTD5_MASK                   32
#define PTD_PTD6_MASK                   64
#define PTD_PTD7_MASK                   128


/*** DDRA - Data Direction Register A; 0x00000004 ***/
typedef union {
  byte Byte;
  struct {
    byte DDRA0       :1;                                       /* Data Direction Register A Bit 0 */
    byte DDRA1       :1;                                       /* Data Direction Register A Bit 1 */
    byte DDRA2       :1;                                       /* Data Direction Register A Bit 2 */
    byte DDRA3       :1;                                       /* Data Direction Register A Bit 3 */
    byte DDRA4       :1;                                       /* Data Direction Register A Bit 4 */
    byte DDRA5       :1;                                       /* Data Direction Register A Bit 5 */
    byte DDRA6       :1;                                       /* Data Direction Register A Bit 6 */
    byte DDRA7       :1;                                       /* Data Direction Register A Bit 7 */
  } Bits;
} DDRASTR;
extern volatile DDRASTR _DDRA;
#define DDRA                            _DDRA.Byte
#define DDRA_DDRA0                      _DDRA.Bits.DDRA0
#define DDRA_DDRA1                      _DDRA.Bits.DDRA1
#define DDRA_DDRA2                      _DDRA.Bits.DDRA2
#define DDRA_DDRA3                      _DDRA.Bits.DDRA3
#define DDRA_DDRA4                      _DDRA.Bits.DDRA4
#define DDRA_DDRA5                      _DDRA.Bits.DDRA5
#define DDRA_DDRA6                      _DDRA.Bits.DDRA6
#define DDRA_DDRA7                      _DDRA.Bits.DDRA7

#define DDRA_DDRA0_MASK                 1
#define DDRA_DDRA1_MASK                 2
#define DDRA_DDRA2_MASK                 4
#define DDRA_DDRA3_MASK                 8
#define DDRA_DDRA4_MASK                 16
#define DDRA_DDRA5_MASK                 32
#define DDRA_DDRA6_MASK                 64
#define DDRA_DDRA7_MASK                 128


/*** DDRB - Data Direction Register B; 0x00000005 ***/
typedef union {
  byte Byte;
  struct {
    byte DDRB0       :1;                                       /* Data Direction Register B Bit 0 */
    byte DDRB1       :1;                                       /* Data Direction Register B Bit 1 */
    byte DDRB2       :1;                                       /* Data Direction Register B Bit 2 */
    byte DDRB3       :1;                                       /* Data Direction Register B Bit 3 */
    byte DDRB4       :1;                                       /* Data Direction Register B Bit 4 */
    byte DDRB5       :1;                                       /* Data Direction Register B Bit 5 */
    byte DDRB6       :1;                                       /* Data Direction Register B Bit 6 */
    byte DDRB7       :1;                                       /* Data Direction Register B Bit 7 */
  } Bits;
} DDRBSTR;
extern volatile DDRBSTR _DDRB;
#define DDRB                            _DDRB.Byte
#define DDRB_DDRB0                      _DDRB.Bits.DDRB0
#define DDRB_DDRB1                      _DDRB.Bits.DDRB1
#define DDRB_DDRB2                      _DDRB.Bits.DDRB2
#define DDRB_DDRB3                      _DDRB.Bits.DDRB3
#define DDRB_DDRB4                      _DDRB.Bits.DDRB4
#define DDRB_DDRB5                      _DDRB.Bits.DDRB5
#define DDRB_DDRB6                      _DDRB.Bits.DDRB6
#define DDRB_DDRB7                      _DDRB.Bits.DDRB7

#define DDRB_DDRB0_MASK                 1
#define DDRB_DDRB1_MASK                 2
#define DDRB_DDRB2_MASK                 4
#define DDRB_DDRB3_MASK                 8
#define DDRB_DDRB4_MASK                 16
#define DDRB_DDRB5_MASK                 32
#define DDRB_DDRB6_MASK                 64
#define DDRB_DDRB7_MASK                 128


/*** DDRC - Data Direction Register C; 0x00000006 ***/
typedef union {
  byte Byte;
  struct {
    byte DDRC0       :1;                                       /* Data Direction Register C Bit 0 */
    byte DDRC1       :1;                                       /* Data Direction Register C Bit 1 */
    byte DDRC2       :1;                                       /* Data Direction Register C Bit 2 */
    byte DDRC3       :1;                                       /* Data Direction Register C Bit 3 */
    byte DDRC4       :1;                                       /* Data Direction Register C Bit 4 */
    byte DDRC5       :1;                                       /* Data Direction Register C Bit 5 */
    byte DDRC6       :1;                                       /* Data Direction Register C Bit 6 */
    byte DDRC7       :1;                                       /* Data Direction Register C Bit 7 */
  } Bits;
} DDRCSTR;
extern volatile DDRCSTR _DDRC;
#define DDRC                            _DDRC.Byte
#define DDRC_DDRC0                      _DDRC.Bits.DDRC0
#define DDRC_DDRC1                      _DDRC.Bits.DDRC1
#define DDRC_DDRC2                      _DDRC.Bits.DDRC2
#define DDRC_DDRC3                      _DDRC.Bits.DDRC3
#define DDRC_DDRC4                      _DDRC.Bits.DDRC4
#define DDRC_DDRC5                      _DDRC.Bits.DDRC5
#define DDRC_DDRC6                      _DDRC.Bits.DDRC6
#define DDRC_DDRC7                      _DDRC.Bits.DDRC7

#define DDRC_DDRC0_MASK                 1
#define DDRC_DDRC1_MASK                 2
#define DDRC_DDRC2_MASK                 4
#define DDRC_DDRC3_MASK                 8
#define DDRC_DDRC4_MASK                 16
#define DDRC_DDRC5_MASK                 32
#define DDRC_DDRC6_MASK                 64
#define DDRC_DDRC7_MASK                 128


/*** DDRD - Data Direction Register D; 0x00000007 ***/
typedef union {
  byte Byte;
  struct {
    byte DDRD0       :1;                                       /* Data Direction Register D Bit 0 */
    byte DDRD1       :1;                                       /* Data Direction Register D Bit 1 */
    byte DDRD2       :1;                                       /* Data Direction Register D Bit 2 */
    byte DDRD3       :1;                                       /* Data Direction Register D Bit 3 */
    byte DDRD4       :1;                                       /* Data Direction Register D Bit 4 */
    byte DDRD5       :1;                                       /* Data Direction Register D Bit 5 */
    byte DDRD6       :1;                                       /* Data Direction Register D Bit 6 */
    byte DDRD7       :1;                                       /* Data Direction Register D Bit 7 */
  } Bits;
} DDRDSTR;
extern volatile DDRDSTR _DDRD;
#define DDRD                            _DDRD.Byte
#define DDRD_DDRD0                      _DDRD.Bits.DDRD0
#define DDRD_DDRD1                      _DDRD.Bits.DDRD1
#define DDRD_DDRD2                      _DDRD.Bits.DDRD2
#define DDRD_DDRD3                      _DDRD.Bits.DDRD3
#define DDRD_DDRD4                      _DDRD.Bits.DDRD4
#define DDRD_DDRD5                      _DDRD.Bits.DDRD5
#define DDRD_DDRD6                      _DDRD.Bits.DDRD6
#define DDRD_DDRD7                      _DDRD.Bits.DDRD7

#define DDRD_DDRD0_MASK                 1
#define DDRD_DDRD1_MASK                 2
#define DDRD_DDRD2_MASK                 4
#define DDRD_DDRD3_MASK                 8
#define DDRD_DDRD4_MASK                 16
#define DDRD_DDRD5_MASK                 32
#define DDRD_DDRD6_MASK                 64
#define DDRD_DDRD7_MASK                 128


/*** PTE - Port E Data Register; 0x00000008 ***/
typedef union {
  byte Byte;
  struct {
    byte PTE0        :1;                                       /* Port E Data Bit 0 */
    byte PTE1        :1;                                       /* Port E Data Bit 1 */
    byte PTE2        :1;                                       /* Port E Data Bit 2 */
    byte PTE3        :1;                                       /* Port E Data Bit 3 */
    byte PTE4        :1;                                       /* Port E Data Bit 4 */
    byte PTE5        :1;                                       /* Port E Data Bit 5 */
    byte PTE6        :1;                                       /* Port E Data Bit 6 */
    byte PTE7        :1;                                       /* Port E Data Bit 7 */
  } Bits;
} PTESTR;
extern volatile PTESTR _PTE;
#define PTE                             _PTE.Byte
#define PTE_PTE0                        _PTE.Bits.PTE0
#define PTE_PTE1                        _PTE.Bits.PTE1
#define PTE_PTE2                        _PTE.Bits.PTE2
#define PTE_PTE3                        _PTE.Bits.PTE3
#define PTE_PTE4                        _PTE.Bits.PTE4
#define PTE_PTE5                        _PTE.Bits.PTE5
#define PTE_PTE6                        _PTE.Bits.PTE6
#define PTE_PTE7                        _PTE.Bits.PTE7

#define PTE_PTE0_MASK                   1
#define PTE_PTE1_MASK                   2
#define PTE_PTE2_MASK                   4
#define PTE_PTE3_MASK                   8
#define PTE_PTE4_MASK                   16
#define PTE_PTE5_MASK                   32
#define PTE_PTE6_MASK                   64
#define PTE_PTE7_MASK                   128


/*** DDRE - Data Direction Register E; 0x00000009 ***/
typedef union {
  byte Byte;
  struct {
    byte DDRE0       :1;                                       /* Data Direction Register E Bit 0 */
    byte DDRE1       :1;                                       /* Data Direction Register E Bit 1 */
    byte DDRE2       :1;                                       /* Data Direction Register E Bit 2 */
    byte DDRE3       :1;                                       /* Data Direction Register E Bit 3 */
    byte DDRE4       :1;                                       /* Data Direction Register E Bit 4 */
    byte DDRE5       :1;                                       /* Data Direction Register E Bit 5 */
    byte DDRE6       :1;                                       /* Data Direction Register E Bit 6 */
    byte DDRE7       :1;                                       /* Data Direction Register E Bit 7 */
  } Bits;
} DDRESTR;
extern volatile DDRESTR _DDRE;
#define DDRE                            _DDRE.Byte
#define DDRE_DDRE0                      _DDRE.Bits.DDRE0
#define DDRE_DDRE1                      _DDRE.Bits.DDRE1
#define DDRE_DDRE2                      _DDRE.Bits.DDRE2
#define DDRE_DDRE3                      _DDRE.Bits.DDRE3
#define DDRE_DDRE4                      _DDRE.Bits.DDRE4
#define DDRE_DDRE5                      _DDRE.Bits.DDRE5
#define DDRE_DDRE6                      _DDRE.Bits.DDRE6
#define DDRE_DDRE7                      _DDRE.Bits.DDRE7

#define DDRE_DDRE0_MASK                 1
#define DDRE_DDRE1_MASK                 2
#define DDRE_DDRE2_MASK                 4
#define DDRE_DDRE3_MASK                 8
#define DDRE_DDRE4_MASK                 16
#define DDRE_DDRE5_MASK                 32
#define DDRE_DDRE6_MASK                 64
#define DDRE_DDRE7_MASK                 128


/*** PTF - Port F Data Register; 0x0000000A ***/
typedef union {
  byte Byte;
  struct {
    byte PTF0        :1;                                       /* Port F Data Bit 0 */
    byte PTF1        :1;                                       /* Port F Data Bit 1 */
    byte PTF2        :1;                                       /* Port F Data Bit 2 */
    byte PTF3        :1;                                       /* Port F Data Bit 3 */
    byte PTF4        :1;                                       /* Port F Data Bit 4 */
    byte PTF5        :1;                                       /* Port F Data Bit 5 */
    byte PTF6        :1;                                       /* Port F Data Bit 6 */
    byte PTF7        :1;                                       /* Port F Data Bit 7 */
  } Bits;
} PTFSTR;
extern volatile PTFSTR _PTF;
#define PTF                             _PTF.Byte
#define PTF_PTF0                        _PTF.Bits.PTF0
#define PTF_PTF1                        _PTF.Bits.PTF1
#define PTF_PTF2                        _PTF.Bits.PTF2
#define PTF_PTF3                        _PTF.Bits.PTF3
#define PTF_PTF4                        _PTF.Bits.PTF4
#define PTF_PTF5                        _PTF.Bits.PTF5
#define PTF_PTF6                        _PTF.Bits.PTF6
#define PTF_PTF7                        _PTF.Bits.PTF7

#define PTF_PTF0_MASK                   1
#define PTF_PTF1_MASK                   2
#define PTF_PTF2_MASK                   4
#define PTF_PTF3_MASK                   8
#define PTF_PTF4_MASK                   16
#define PTF_PTF5_MASK                   32
#define PTF_PTF6_MASK                   64
#define PTF_PTF7_MASK                   128


/*** DDRF - Data Direction Register F; 0x0000000B ***/
typedef union {
  byte Byte;
  struct {
    byte DDRF0       :1;                                       /* Data Direction Register F Bit 0 */
    byte DDRF1       :1;                                       /* Data Direction Register F Bit 1 */
    byte DDRF2       :1;                                       /* Data Direction Register F Bit 2 */
    byte DDRF3       :1;                                       /* Data Direction Register F Bit 3 */
    byte DDRF4       :1;                                       /* Data Direction Register F Bit 4 */
    byte DDRF5       :1;                                       /* Data Direction Register F Bit 5 */
    byte DDRF6       :1;                                       /* Data Direction Register F Bit 6 */
    byte DDRF7       :1;                                       /* Data Direction Register F Bit 7 */
  } Bits;
} DDRFSTR;
extern volatile DDRFSTR _DDRF;
#define DDRF                            _DDRF.Byte
#define DDRF_DDRF0                      _DDRF.Bits.DDRF0
#define DDRF_DDRF1                      _DDRF.Bits.DDRF1
#define DDRF_DDRF2                      _DDRF.Bits.DDRF2
#define DDRF_DDRF3                      _DDRF.Bits.DDRF3
#define DDRF_DDRF4                      _DDRF.Bits.DDRF4
#define DDRF_DDRF5                      _DDRF.Bits.DDRF5
#define DDRF_DDRF6                      _DDRF.Bits.DDRF6
#define DDRF_DDRF7                      _DDRF.Bits.DDRF7

#define DDRF_DDRF0_MASK                 1
#define DDRF_DDRF1_MASK                 2
#define DDRF_DDRF2_MASK                 4
#define DDRF_DDRF3_MASK                 8
#define DDRF_DDRF4_MASK                 16
#define DDRF_DDRF5_MASK                 32
#define DDRF_DDRF6_MASK                 64
#define DDRF_DDRF7_MASK                 128


/*** LEDB - Port B LED Control Register; 0x0000000C ***/
typedef union {
  byte Byte;
  struct {
    byte LEDB0       :1;                                       /* Port B LED Drive Enable Bit 0 */
    byte LEDB1       :1;                                       /* Port B LED Drive Enable Bit 1 */
    byte LEDB2       :1;                                       /* Port B LED Drive Enable Bit 2 */
    byte LEDB3       :1;                                       /* Port B LED Drive Enable Bit 3 */
    byte LEDB4       :1;                                       /* Port B LED Drive Enable Bit 4 */
    byte LEDB5       :1;                                       /* Port B LED Drive Enable Bit 5 */
    byte             :1; 
    byte             :1; 
  } Bits;
  struct {
    byte grpLEDB :6;
    byte         :1;
    byte         :1;
  } MergedBits;
} LEDBSTR;
extern volatile LEDBSTR _LEDB;
#define LEDB                            _LEDB.Byte
#define LEDB_LEDB0                      _LEDB.Bits.LEDB0
#define LEDB_LEDB1                      _LEDB.Bits.LEDB1
#define LEDB_LEDB2                      _LEDB.Bits.LEDB2
#define LEDB_LEDB3                      _LEDB.Bits.LEDB3
#define LEDB_LEDB4                      _LEDB.Bits.LEDB4
#define LEDB_LEDB5                      _LEDB.Bits.LEDB5
#define LEDB_LEDB                       _LEDB.MergedBits.grpLEDB

#define LEDB_LEDB0_MASK                 1
#define LEDB_LEDB1_MASK                 2
#define LEDB_LEDB2_MASK                 4
#define LEDB_LEDB3_MASK                 8
#define LEDB_LEDB4_MASK                 16
#define LEDB_LEDB5_MASK                 32
#define LEDB_LEDB_MASK                  63
#define LEDB_LEDB_BITNUM                0


/*** LEDC - Port C LED Control Register; 0x0000000D ***/
typedef union {
  byte Byte;
  struct {
    byte LEDC0       :1;                                       /* Port C LED Drive Enable Bit 0 */
    byte LEDC1       :1;                                       /* Port C LED Drive Enable Bit 1 */
    byte LEDC2       :1;                                       /* Port C LED Drive Enable Bit 2 */
    byte LEDC3       :1;                                       /* Port C LED Drive Enable Bit 3 */
    byte LEDC4       :1;                                       /* Port C LED Drive Enable Bit 4 */
    byte LEDC5       :1;                                       /* Port C LED Drive Enable Bit 5 */
    byte LEDC6       :1;                                       /* Port C LED Drive Enable Bit 6 */
    byte LEDC7       :1;                                       /* Port C LED Drive Enable Bit 7 */
  } Bits;
} LEDCSTR;
extern volatile LEDCSTR _LEDC;
#define LEDC                            _LEDC.Byte
#define LEDC_LEDC0                      _LEDC.Bits.LEDC0
#define LEDC_LEDC1                      _LEDC.Bits.LEDC1
#define LEDC_LEDC2                      _LEDC.Bits.LEDC2
#define LEDC_LEDC3                      _LEDC.Bits.LEDC3
#define LEDC_LEDC4                      _LEDC.Bits.LEDC4
#define LEDC_LEDC5                      _LEDC.Bits.LEDC5
#define LEDC_LEDC6                      _LEDC.Bits.LEDC6
#define LEDC_LEDC7                      _LEDC.Bits.LEDC7

#define LEDC_LEDC0_MASK                 1
#define LEDC_LEDC1_MASK                 2
#define LEDC_LEDC2_MASK                 4
#define LEDC_LEDC3_MASK                 8
#define LEDC_LEDC4_MASK                 16
#define LEDC_LEDC5_MASK                 32
#define LEDC_LEDC6_MASK                 64
#define LEDC_LEDC7_MASK                 128


/*** LEDE - Port E LED Control Register; 0x0000000E ***/
typedef union {
  byte Byte;
  struct {
    byte LEDE0       :1;                                       /* Port E LED Drive Enable Bit 0 */
    byte LEDE1       :1;                                       /* Port E LED Drive Enable Bit 1 */
    byte LEDE2       :1;                                       /* Port E LED Drive Enable Bit 2 */
    byte LEDE3       :1;                                       /* Port E LED Drive Enable Bit 3 */
    byte LEDE4       :1;                                       /* Port E LED Drive Enable Bit 4 */
    byte LEDE5       :1;                                       /* Port E LED Drive Enable Bit 5 */
    byte LEDE6       :1;                                       /* Port E LED Drive Enable Bit 6 */
    byte LEDE7       :1;                                       /* Port E LED Drive Enable Bit 7 */
  } Bits;
} LEDESTR;
extern volatile LEDESTR _LEDE;
#define LEDE                            _LEDE.Byte
#define LEDE_LEDE0                      _LEDE.Bits.LEDE0
#define LEDE_LEDE1                      _LEDE.Bits.LEDE1
#define LEDE_LEDE2                      _LEDE.Bits.LEDE2
#define LEDE_LEDE3                      _LEDE.Bits.LEDE3
#define LEDE_LEDE4                      _LEDE.Bits.LEDE4
#define LEDE_LEDE5                      _LEDE.Bits.LEDE5
#define LEDE_LEDE6                      _LEDE.Bits.LEDE6
#define LEDE_LEDE7                      _LEDE.Bits.LEDE7

#define LEDE_LEDE0_MASK                 1
#define LEDE_LEDE1_MASK                 2
#define LEDE_LEDE2_MASK                 4
#define LEDE_LEDE3_MASK                 8
#define LEDE_LEDE4_MASK                 16
#define LEDE_LEDE5_MASK                 32
#define LEDE_LEDE6_MASK                 64
#define LEDE_LEDE7_MASK                 128


/*** LEDF - Port F LED Control Register; 0x0000000F ***/
typedef union {
  byte Byte;
  struct {
    byte LEDF0       :1;                                       /* Port F LED Drive Enable Bit 0 */
    byte LEDF1       :1;                                       /* Port F LED Drive Enable Bit 1 */
    byte LEDF2       :1;                                       /* Port F LED Drive Enable Bit 2 */
    byte LEDF3       :1;                                       /* Port F LED Drive Enable Bit 3 */
    byte LEDF4       :1;                                       /* Port F LED Drive Enable Bit 4 */
    byte LEDF5       :1;                                       /* Port F LED Drive Enable Bit 5 */
    byte LEDF6       :1;                                       /* Port F LED Drive Enable Bit 6 */
    byte LEDF7       :1;                                       /* Port F LED Drive Enable Bit 7 */
  } Bits;
} LEDFSTR;
extern volatile LEDFSTR _LEDF;
#define LEDF                            _LEDF.Byte
#define LEDF_LEDF0                      _LEDF.Bits.LEDF0
#define LEDF_LEDF1                      _LEDF.Bits.LEDF1
#define LEDF_LEDF2                      _LEDF.Bits.LEDF2
#define LEDF_LEDF3                      _LEDF.Bits.LEDF3
#define LEDF_LEDF4                      _LEDF.Bits.LEDF4
#define LEDF_LEDF5                      _LEDF.Bits.LEDF5
#define LEDF_LEDF6                      _LEDF.Bits.LEDF6
#define LEDF_LEDF7                      _LEDF.Bits.LEDF7

#define LEDF_LEDF0_MASK                 1
#define LEDF_LEDF1_MASK                 2
#define LEDF_LEDF2_MASK                 4
#define LEDF_LEDF3_MASK                 8
#define LEDF_LEDF4_MASK                 16
#define LEDF_LEDF5_MASK                 32
#define LEDF_LEDF6_MASK                 64
#define LEDF_LEDF7_MASK                 128


/*** SPCR - SPI Control Register; 0x00000010 ***/
typedef union {
  byte Byte;
  struct {
    byte SPTIE       :1;                                       /* SPI Transmit Interrupt Enable Bit */
    byte SPE         :1;                                       /* SPI Enable Bit */
    byte SPWOM       :1;                                       /* SPI Wired-OR Mode Bit */
    byte CPHA        :1;                                       /* Clock Phase Bit */
    byte CPOL        :1;                                       /* Clock Polarity Bit */
    byte SPMSTR      :1;                                       /* SPI Master Bit */
    byte             :1; 
    byte SPRIE       :1;                                       /* SPI Receiver Interrupt Enable Bit */
  } Bits;
} SPCRSTR;
extern volatile SPCRSTR _SPCR;
#define SPCR                            _SPCR.Byte
#define SPCR_SPTIE                      _SPCR.Bits.SPTIE
#define SPCR_SPE                        _SPCR.Bits.SPE
#define SPCR_SPWOM                      _SPCR.Bits.SPWOM
#define SPCR_CPHA                       _SPCR.Bits.CPHA
#define SPCR_CPOL                       _SPCR.Bits.CPOL
#define SPCR_SPMSTR                     _SPCR.Bits.SPMSTR
#define SPCR_SPRIE                      _SPCR.Bits.SPRIE

#define SPCR_SPTIE_MASK                 1
#define SPCR_SPE_MASK                   2
#define SPCR_SPWOM_MASK                 4
#define SPCR_CPHA_MASK                  8
#define SPCR_CPOL_MASK                  16
#define SPCR_SPMSTR_MASK                32
#define SPCR_SPRIE_MASK                 128


/*** SPSCR - SPI Status and Control Register; 0x00000011 ***/
typedef union {
  byte Byte;
  struct {
    byte SPR0        :1;                                       /* SPI Baud Rate Select Bit 0 */
    byte SPR1        :1;                                       /* SPI Baud Rate Select Bit 1 */
    byte MODFEN      :1;                                       /* Mode Fault Enable Bit */
    byte SPTE        :1;                                       /* SPI Transmitter Empty Bit */
    byte MODF        :1;                                       /* Mode Fault Bit */
    byte OVRF        :1;                                       /* Overflow Bit */
    byte ERRIE       :1;                                       /* Error Interrupt Enable Bit */
    byte SPRF        :1;                                       /* SPI Receiver Full Bit */
  } Bits;
  struct {
    byte grpSPR  :2;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} SPSCRSTR;
extern volatile SPSCRSTR _SPSCR;
#define SPSCR                           _SPSCR.Byte
#define SPSCR_SPR0                      _SPSCR.Bits.SPR0
#define SPSCR_SPR1                      _SPSCR.Bits.SPR1
#define SPSCR_MODFEN                    _SPSCR.Bits.MODFEN
#define SPSCR_SPTE                      _SPSCR.Bits.SPTE
#define SPSCR_MODF                      _SPSCR.Bits.MODF
#define SPSCR_OVRF                      _SPSCR.Bits.OVRF
#define SPSCR_ERRIE                     _SPSCR.Bits.ERRIE
#define SPSCR_SPRF                      _SPSCR.Bits.SPRF
#define SPSCR_SPR                       _SPSCR.MergedBits.grpSPR

#define SPSCR_SPR0_MASK                 1
#define SPSCR_SPR1_MASK                 2
#define SPSCR_MODFEN_MASK               4
#define SPSCR_SPTE_MASK                 8
#define SPSCR_MODF_MASK                 16
#define SPSCR_OVRF_MASK                 32
#define SPSCR_ERRIE_MASK                64
#define SPSCR_SPRF_MASK                 128
#define SPSCR_SPR_MASK                  3
#define SPSCR_SPR_BITNUM                0


/*** SPDR - SPI Data Register; 0x00000012 ***/
typedef union {
  byte Byte;
  struct {
    byte R0_T0       :1;                                       /* Receive/Transmit Data Bit 0 */
    byte R1_T1       :1;                                       /* Receive/Transmit Data Bit 1 */
    byte R2_T2       :1;                                       /* Receive/Transmit Data Bit 2 */
    byte R3_T3       :1;                                       /* Receive/Transmit Data Bit 3 */
    byte R4_T4       :1;                                       /* Receive/Transmit Data Bit 4 */
    byte R5_T5       :1;                                       /* Receive/Transmit Data Bit 5 */
    byte R6_T6       :1;                                       /* Receive/Transmit Data Bit 6 */
    byte R7_T7       :1;                                       /* Receive/Transmit Data Bit 7 */
  } Bits;
} SPDRSTR;
extern volatile SPDRSTR _SPDR;
#define SPDR                            _SPDR.Byte
#define SPDR_R0_T0                      _SPDR.Bits.R0_T0
#define SPDR_R1_T1                      _SPDR.Bits.R1_T1
#define SPDR_R2_T2                      _SPDR.Bits.R2_T2
#define SPDR_R3_T3                      _SPDR.Bits.R3_T3
#define SPDR_R4_T4                      _SPDR.Bits.R4_T4
#define SPDR_R5_T5                      _SPDR.Bits.R5_T5
#define SPDR_R6_T6                      _SPDR.Bits.R6_T6
#define SPDR_R7_T7                      _SPDR.Bits.R7_T7

#define SPDR_R0_T0_MASK                 1
#define SPDR_R1_T1_MASK                 2
#define SPDR_R2_T2_MASK                 4
#define SPDR_R3_T3_MASK                 8
#define SPDR_R4_T4_MASK                 16
#define SPDR_R5_T5_MASK                 32
#define SPDR_R6_T6_MASK                 64
#define SPDR_R7_T7_MASK                 128


/*** SCC1 - SCI Control Register 1; 0x00000013 ***/
typedef union {
  byte Byte;
  struct {
    byte PTY         :1;                                       /* Parity Bit */
    byte PEN         :1;                                       /* Parity Enable Bit */
    byte ILTY        :1;                                       /* Idle Line Type Bit */
    byte WAKE        :1;                                       /* Wakeup Condition Bit */
    byte M           :1;                                       /* Mode (Character Length) Bit */
    byte             :1; 
    byte ENSCI       :1;                                       /* Enable SCI Bit */
    byte LOOPS       :1;                                       /* Loop Mode Select Bit */
  } Bits;
} SCC1STR;
extern volatile SCC1STR _SCC1;
#define SCC1                            _SCC1.Byte
#define SCC1_PTY                        _SCC1.Bits.PTY
#define SCC1_PEN                        _SCC1.Bits.PEN
#define SCC1_ILTY                       _SCC1.Bits.ILTY
#define SCC1_WAKE                       _SCC1.Bits.WAKE
#define SCC1_M                          _SCC1.Bits.M
#define SCC1_ENSCI                      _SCC1.Bits.ENSCI
#define SCC1_LOOPS                      _SCC1.Bits.LOOPS

#define SCC1_PTY_MASK                   1
#define SCC1_PEN_MASK                   2
#define SCC1_ILTY_MASK                  4
#define SCC1_WAKE_MASK                  8
#define SCC1_M_MASK                     16
#define SCC1_ENSCI_MASK                 64
#define SCC1_LOOPS_MASK                 128


/*** SCC2 - SCI Control Register 2; 0x00000014 ***/
typedef union {
  byte Byte;
  struct {
    byte SBK         :1;                                       /* Send Break Bit */
    byte RWU         :1;                                       /* Receiver Wakeup Bit */
    byte RE          :1;                                       /* Receiver Enable Bit */
    byte TE          :1;                                       /* Transmitter Enable Bit */
    byte ILIE        :1;                                       /* Idle Line Interrupt Enable Bit */
    byte SCRIE       :1;                                       /* SCI Receive Interrupt Enable Bit */
    byte TCIE        :1;                                       /* Transmission Complete Interrupt Enable Bit */
    byte SCTIE       :1;                                       /* SCI Transmit Interrupt Enable Bit */
  } Bits;
} SCC2STR;
extern volatile SCC2STR _SCC2;
#define SCC2                            _SCC2.Byte
#define SCC2_SBK                        _SCC2.Bits.SBK
#define SCC2_RWU                        _SCC2.Bits.RWU
#define SCC2_RE                         _SCC2.Bits.RE
#define SCC2_TE                         _SCC2.Bits.TE
#define SCC2_ILIE                       _SCC2.Bits.ILIE
#define SCC2_SCRIE                      _SCC2.Bits.SCRIE
#define SCC2_TCIE                       _SCC2.Bits.TCIE
#define SCC2_SCTIE                      _SCC2.Bits.SCTIE

#define SCC2_SBK_MASK                   1
#define SCC2_RWU_MASK                   2
#define SCC2_RE_MASK                    4
#define SCC2_TE_MASK                    8
#define SCC2_ILIE_MASK                  16
#define SCC2_SCRIE_MASK                 32
#define SCC2_TCIE_MASK                  64
#define SCC2_SCTIE_MASK                 128


/*** SCC3 - SCI Control Register 3; 0x00000015 ***/
typedef union {
  byte Byte;
  struct {
    byte PEIE        :1;                                       /* Receiver Parity Error Interrupt Enable Bit */
    byte FEIE        :1;                                       /* Receiver Framing Error Interrupt Enable Bit */
    byte NEIE        :1;                                       /* Receiver Noise Error Interrupt Enable Bit */
    byte ORIE        :1;                                       /* Receiver Overrun Interrupt Enable Bit */
    byte             :1; 
    byte             :1; 
    byte T8          :1;                                       /* Transmitted Bit 8 */
    byte R8          :1;                                       /* Received Bit 8 */
  } Bits;
} SCC3STR;
extern volatile SCC3STR _SCC3;
#define SCC3                            _SCC3.Byte
#define SCC3_PEIE                       _SCC3.Bits.PEIE
#define SCC3_FEIE                       _SCC3.Bits.FEIE
#define SCC3_NEIE                       _SCC3.Bits.NEIE
#define SCC3_ORIE                       _SCC3.Bits.ORIE
#define SCC3_T8                         _SCC3.Bits.T8
#define SCC3_R8                         _SCC3.Bits.R8

#define SCC3_PEIE_MASK                  1
#define SCC3_FEIE_MASK                  2
#define SCC3_NEIE_MASK                  4
#define SCC3_ORIE_MASK                  8
#define SCC3_T8_MASK                    64
#define SCC3_R8_MASK                    128


/*** SCS1 - SCI Status Register 1; 0x00000016 ***/
typedef union {
  byte Byte;
  struct {
    byte PE          :1;                                       /* Receiver Parity Error Bit */
    byte FE          :1;                                       /* Receiver Framing Error Bit */
    byte NF          :1;                                       /* Receiver Noise Flag Bit */
    byte OR          :1;                                       /* Receiver Overrun Bit */
    byte IDLE        :1;                                       /* Receiver Idle Bit */
    byte SCRF        :1;                                       /* SCI Receiver Full Bit */
    byte TC          :1;                                       /* Transmission Complete Bit */
    byte SCTE        :1;                                       /* SCI Transmitter Empty Bit */
  } Bits;
} SCS1STR;
extern volatile SCS1STR _SCS1;
#define SCS1                            _SCS1.Byte
#define SCS1_PE                         _SCS1.Bits.PE
#define SCS1_FE                         _SCS1.Bits.FE
#define SCS1_NF                         _SCS1.Bits.NF
#define SCS1_OR                         _SCS1.Bits.OR
#define SCS1_IDLE                       _SCS1.Bits.IDLE
#define SCS1_SCRF                       _SCS1.Bits.SCRF
#define SCS1_TC                         _SCS1.Bits.TC
#define SCS1_SCTE                       _SCS1.Bits.SCTE

#define SCS1_PE_MASK                    1
#define SCS1_FE_MASK                    2
#define SCS1_NF_MASK                    4
#define SCS1_OR_MASK                    8
#define SCS1_IDLE_MASK                  16
#define SCS1_SCRF_MASK                  32
#define SCS1_TC_MASK                    64
#define SCS1_SCTE_MASK                  128


/*** SCS2 - SCI Status Register 2; 0x00000017 ***/
typedef union {
  byte Byte;
  struct {
    byte RPF         :1;                                       /* Reception in Progress Flag Bit */
    byte BKF         :1;                                       /* Break Flag Bit */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
} SCS2STR;
extern volatile SCS2STR _SCS2;
#define SCS2                            _SCS2.Byte
#define SCS2_RPF                        _SCS2.Bits.RPF
#define SCS2_BKF                        _SCS2.Bits.BKF

#define SCS2_RPF_MASK                   1
#define SCS2_BKF_MASK                   2


/*** SCDR - SCI Data Register; 0x00000018 ***/
typedef union {
  byte Byte;
  struct {
    byte R0_T0       :1;                                       /* Receive/Transmit Data Bit 0 */
    byte R1_T1       :1;                                       /* Receive/Transmit Data Bit 1 */
    byte R2_T2       :1;                                       /* Receive/Transmit Data Bit 2 */
    byte R3_T3       :1;                                       /* Receive/Transmit Data Bit 3 */
    byte R4_T4       :1;                                       /* Receive/Transmit Data Bit 4 */
    byte R5_T5       :1;                                       /* Receive/Transmit Data Bit 5 */
    byte R6_T6       :1;                                       /* Receive/Transmit Data Bit 6 */
    byte R7_T7       :1;                                       /* Receive/Transmit Data Bit 7 */
  } Bits;
} SCDRSTR;
extern volatile SCDRSTR _SCDR;
#define SCDR                            _SCDR.Byte
#define SCDR_R0_T0                      _SCDR.Bits.R0_T0
#define SCDR_R1_T1                      _SCDR.Bits.R1_T1
#define SCDR_R2_T2                      _SCDR.Bits.R2_T2
#define SCDR_R3_T3                      _SCDR.Bits.R3_T3
#define SCDR_R4_T4                      _SCDR.Bits.R4_T4
#define SCDR_R5_T5                      _SCDR.Bits.R5_T5
#define SCDR_R6_T6                      _SCDR.Bits.R6_T6
#define SCDR_R7_T7                      _SCDR.Bits.R7_T7

#define SCDR_R0_T0_MASK                 1
#define SCDR_R1_T1_MASK                 2
#define SCDR_R2_T2_MASK                 4
#define SCDR_R3_T3_MASK                 8
#define SCDR_R4_T4_MASK                 16
#define SCDR_R5_T5_MASK                 32
#define SCDR_R6_T6_MASK                 64
#define SCDR_R7_T7_MASK                 128


/*** SCBR - SCI Baud Rate Register; 0x00000019 ***/
typedef union {
  byte Byte;
  struct {
    byte SCR0        :1;                                       /* SCI Baud Rate Select Bit 0 */
    byte SCR1        :1;                                       /* SCI Baud Rate Select Bit 1 */
    byte SCR2        :1;                                       /* SCI Baud Rate Select Bit 2 */
    byte             :1; 
    byte SCP0        :1;                                       /* SCI Baud Rate Prescaler Bit 0 */
    byte SCP1        :1;                                       /* SCI Baud Rate Prescaler Bit 1 */
    byte             :1; 
    byte CKS         :1;                                       /* Baud Clock Input Select */
  } Bits;
  struct {
    byte grpSCR  :3;
    byte         :1;
    byte grpSCP  :2;
    byte         :1;
    byte         :1;
  } MergedBits;
} SCBRSTR;
extern volatile SCBRSTR _SCBR;
#define SCBR                            _SCBR.Byte
#define SCBR_SCR0                       _SCBR.Bits.SCR0
#define SCBR_SCR1                       _SCBR.Bits.SCR1
#define SCBR_SCR2                       _SCBR.Bits.SCR2
#define SCBR_SCP0                       _SCBR.Bits.SCP0
#define SCBR_SCP1                       _SCBR.Bits.SCP1
#define SCBR_CKS                        _SCBR.Bits.CKS
#define SCBR_SCR                        _SCBR.MergedBits.grpSCR
#define SCBR_SCP                        _SCBR.MergedBits.grpSCP

#define SCBR_SCR0_MASK                  1
#define SCBR_SCR1_MASK                  2
#define SCBR_SCR2_MASK                  4
#define SCBR_SCP0_MASK                  16
#define SCBR_SCP1_MASK                  32
#define SCBR_CKS_MASK                   128
#define SCBR_SCR_MASK                   7
#define SCBR_SCR_BITNUM                 0
#define SCBR_SCP_MASK                   48
#define SCBR_SCP_BITNUM                 4


/*** SCIRCR - SCI Infrared Control Register; 0x0000001A ***/
typedef union {
  byte Byte;
  struct {
    byte IREN        :1;                                       /* Infrared Enable Bit */
    byte TNP0        :1;                                       /* Transmitter Narrow Pulse Bit 0 */
    byte TNP1        :1;                                       /* Transmitter Narrow Pulse Bit 1 */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
  struct {
    byte         :1;
    byte grpTNP  :2;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} SCIRCRSTR;
extern volatile SCIRCRSTR _SCIRCR;
#define SCIRCR                          _SCIRCR.Byte
#define SCIRCR_IREN                     _SCIRCR.Bits.IREN
#define SCIRCR_TNP0                     _SCIRCR.Bits.TNP0
#define SCIRCR_TNP1                     _SCIRCR.Bits.TNP1
#define SCIRCR_TNP                      _SCIRCR.MergedBits.grpTNP

#define SCIRCR_IREN_MASK                1
#define SCIRCR_TNP0_MASK                2
#define SCIRCR_TNP1_MASK                4
#define SCIRCR_TNP_MASK                 6
#define SCIRCR_TNP_BITNUM               1


/*** KBSCR - Keyboard Status and Control Register; 0x0000001B ***/
typedef union {
  byte Byte;
  struct {
    byte MODEK       :1;                                       /* Keyboard Triggering Sensitivity Bit */
    byte IMASKK      :1;                                       /* Keyboard Interrupt Mask Bit */
    byte ACKK        :1;                                       /* Keyboard Acknowledge Bit */
    byte KEYF        :1;                                       /* Keyboard Flag Bit */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
} KBSCRSTR;
extern volatile KBSCRSTR _KBSCR;
#define KBSCR                           _KBSCR.Byte
#define KBSCR_MODEK                     _KBSCR.Bits.MODEK
#define KBSCR_IMASKK                    _KBSCR.Bits.IMASKK
#define KBSCR_ACKK                      _KBSCR.Bits.ACKK
#define KBSCR_KEYF                      _KBSCR.Bits.KEYF

#define KBSCR_MODEK_MASK                1
#define KBSCR_IMASKK_MASK               2
#define KBSCR_ACKK_MASK                 4
#define KBSCR_KEYF_MASK                 8


/*** KBIER - Keyobard Interrupt Enable Register; 0x0000001C ***/
typedef union {
  byte Byte;
  struct {
    byte KBIE0       :1;                                       /* Keyboard Interrut Enable Bit 0 */
    byte KBIE1       :1;                                       /* Keyboard Interrut Enable Bit 1 */
    byte KBIE2       :1;                                       /* Keyboard Interrut Enable Bit 2 */
    byte KBIE3       :1;                                       /* Keyboard Interrut Enable Bit 3 */
    byte KBIE4       :1;                                       /* Keyboard Interrut Enable Bit 4 */
    byte KBIE5       :1;                                       /* Keyboard Interrut Enable Bit 5 */
    byte KBIE6       :1;                                       /* Keyboard Interrut Enable Bit 6 */
    byte KBIE7       :1;                                       /* Keyboard Interrut Enable Bit 7 */
  } Bits;
} KBIERSTR;
extern volatile KBIERSTR _KBIER;
#define KBIER                           _KBIER.Byte
#define KBIER_KBIE0                     _KBIER.Bits.KBIE0
#define KBIER_KBIE1                     _KBIER.Bits.KBIE1
#define KBIER_KBIE2                     _KBIER.Bits.KBIE2
#define KBIER_KBIE3                     _KBIER.Bits.KBIE3
#define KBIER_KBIE4                     _KBIER.Bits.KBIE4
#define KBIER_KBIE5                     _KBIER.Bits.KBIE5
#define KBIER_KBIE6                     _KBIER.Bits.KBIE6
#define KBIER_KBIE7                     _KBIER.Bits.KBIE7

#define KBIER_KBIE0_MASK                1
#define KBIER_KBIE1_MASK                2
#define KBIER_KBIE2_MASK                4
#define KBIER_KBIE3_MASK                8
#define KBIER_KBIE4_MASK                16
#define KBIER_KBIE5_MASK                32
#define KBIER_KBIE6_MASK                64
#define KBIER_KBIE7_MASK                128


/*** CONFIG2 - Configuration Register 2; 0x0000001D ***/
typedef union {
  byte Byte;
  struct {
    byte LVISEL0     :1;                                       /* LVI Operating Mode Selection 0 */
    byte LVISEL1     :1;                                       /* LVI Operating Mode Selection 1 */
    byte PCEL        :1;                                       /* Port C Enable Low Nibble */
    byte PCEH        :1;                                       /* Port C Enable High Nibble */
    byte DIV2CLK     :1;                                       /* Divide-by-2 Clock Bypass */
    byte STOP_XCLKEN :1;                                       /* Crystal Oscillator Stop Mode Enable */
    byte STOP_IRCDIS :1;                                       /* Internal RC Oscillator Stop Mode Disable */
    byte PEE         :1;                                       /* Port E Enable */
  } Bits;
  struct {
    byte grpLVISEL :2;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} CONFIG2STR;
extern volatile CONFIG2STR _CONFIG2;
#define CONFIG2                         _CONFIG2.Byte
#define CONFIG2_LVISEL0                 _CONFIG2.Bits.LVISEL0
#define CONFIG2_LVISEL1                 _CONFIG2.Bits.LVISEL1
#define CONFIG2_PCEL                    _CONFIG2.Bits.PCEL
#define CONFIG2_PCEH                    _CONFIG2.Bits.PCEH
#define CONFIG2_DIV2CLK                 _CONFIG2.Bits.DIV2CLK
#define CONFIG2_STOP_XCLKEN             _CONFIG2.Bits.STOP_XCLKEN
#define CONFIG2_STOP_IRCDIS             _CONFIG2.Bits.STOP_IRCDIS
#define CONFIG2_PEE                     _CONFIG2.Bits.PEE
#define CONFIG2_LVISEL                  _CONFIG2.MergedBits.grpLVISEL

#define CONFIG2_LVISEL0_MASK            1
#define CONFIG2_LVISEL1_MASK            2
#define CONFIG2_PCEL_MASK               4
#define CONFIG2_PCEH_MASK               8
#define CONFIG2_DIV2CLK_MASK            16
#define CONFIG2_STOP_XCLKEN_MASK        32
#define CONFIG2_STOP_IRCDIS_MASK        64
#define CONFIG2_PEE_MASK                128
#define CONFIG2_LVISEL_MASK             3
#define CONFIG2_LVISEL_BITNUM           0


/*** INTSCR1 - IRQ Status and Control Register; 0x0000001E ***/
typedef union {
  byte Byte;
  struct {
    byte MODE        :1;                                       /* IRQ Edge/Level Select Bit */
    byte IMASK       :1;                                       /* IRQ Interrupt Mask Bit */
    byte ACK         :1;                                       /* IRQ Interrupt Request Acknowledge Bit */
    byte IRQF        :1;                                       /* IRQ Flag Bit */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
} INTSCR1STR;
extern volatile INTSCR1STR _INTSCR1;
#define INTSCR1                         _INTSCR1.Byte
#define INTSCR1_MODE                    _INTSCR1.Bits.MODE
#define INTSCR1_IMASK                   _INTSCR1.Bits.IMASK
#define INTSCR1_ACK                     _INTSCR1.Bits.ACK
#define INTSCR1_IRQF                    _INTSCR1.Bits.IRQF

#define INTSCR1_MODE_MASK               1
#define INTSCR1_IMASK_MASK              2
#define INTSCR1_ACK_MASK                4
#define INTSCR1_IRQF_MASK               8


/*** CONFIG1 - Configuration Register 1; 0x0000001F ***/
typedef union {
  byte Byte;
  struct {
    byte COPD        :1;                                       /* COP Disable Bit */
    byte STOP        :1;                                       /* STOP Instruction Enable Bit */
    byte SSREC       :1;                                       /* Short Stop Recovery Bit */
    byte             :1; 
    byte LVIPWRD     :1;                                       /* LVI Power Disable Bit */
    byte LVIRSTD     :1;                                       /* LVI Reset Disable Bit */
    byte LVISTOP     :1;                                       /* LVI Enable in Stop Mode Bit */
    byte COPRS       :1;                                       /* COP rate Select Bit */
  } Bits;
} CONFIG1STR;
extern volatile CONFIG1STR _CONFIG1;
#define CONFIG1                         _CONFIG1.Byte
#define CONFIG1_COPD                    _CONFIG1.Bits.COPD
#define CONFIG1_STOP                    _CONFIG1.Bits.STOP
#define CONFIG1_SSREC                   _CONFIG1.Bits.SSREC
#define CONFIG1_LVIPWRD                 _CONFIG1.Bits.LVIPWRD
#define CONFIG1_LVIRSTD                 _CONFIG1.Bits.LVIRSTD
#define CONFIG1_LVISTOP                 _CONFIG1.Bits.LVISTOP
#define CONFIG1_COPRS                   _CONFIG1.Bits.COPRS

#define CONFIG1_COPD_MASK               1
#define CONFIG1_STOP_MASK               2
#define CONFIG1_SSREC_MASK              4
#define CONFIG1_LVIPWRD_MASK            16
#define CONFIG1_LVIRSTD_MASK            32
#define CONFIG1_LVISTOP_MASK            64
#define CONFIG1_COPRS_MASK              128


/*** T1SC - TIM1 Status and Control Register; 0x00000020 ***/
typedef union {
  byte Byte;
  struct {
    byte PS0         :1;                                       /* Prescaler Select Bit 0 */
    byte PS1         :1;                                       /* Prescaler Select Bit 1 */
    byte PS2         :1;                                       /* Prescaler Select Bit 2 */
    byte             :1; 
    byte TRST        :1;                                       /* TIM1 Reset Bit */
    byte TSTOP       :1;                                       /* TIM1 Stop Bit */
    byte TOIE        :1;                                       /* TIM1 Overflow Interrupt Enable Bit */
    byte TOF         :1;                                       /* TIM1 Overflow Flag Bit */
  } Bits;
  struct {
    byte grpPS   :3;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} T1SCSTR;
extern volatile T1SCSTR _T1SC;
#define T1SC                            _T1SC.Byte
#define T1SC_PS0                        _T1SC.Bits.PS0
#define T1SC_PS1                        _T1SC.Bits.PS1
#define T1SC_PS2                        _T1SC.Bits.PS2
#define T1SC_TRST                       _T1SC.Bits.TRST
#define T1SC_TSTOP                      _T1SC.Bits.TSTOP
#define T1SC_TOIE                       _T1SC.Bits.TOIE
#define T1SC_TOF                        _T1SC.Bits.TOF
#define T1SC_PS                         _T1SC.MergedBits.grpPS

#define T1SC_PS0_MASK                   1
#define T1SC_PS1_MASK                   2
#define T1SC_PS2_MASK                   4
#define T1SC_TRST_MASK                  16
#define T1SC_TSTOP_MASK                 32
#define T1SC_TOIE_MASK                  64
#define T1SC_TOF_MASK                   128
#define T1SC_PS_MASK                    7
#define T1SC_PS_BITNUM                  0


/*** T1CNT - TIM1 Counter Register; 0x00000021 ***/
typedef union {
  word Word;
   /* Overlapped registers: */
  struct {
    /*** T1CNTH - TIM1 Counter High Register; 0x00000021 ***/
    union {
      byte Byte;
    } T1CNTHSTR;
    #define T1CNTH                      _T1CNT.Overlap_STR.T1CNTHSTR.Byte
    

    /*** T1CNTL - TIM1 Counter Low Register; 0x00000022 ***/
    union {
      byte Byte;
    } T1CNTLSTR;
    #define T1CNTL                      _T1CNT.Overlap_STR.T1CNTLSTR.Byte
    
  } Overlap_STR;

} T1CNTSTR;
extern volatile T1CNTSTR _T1CNT;
#define T1CNT                           _T1CNT.Word


/*** T1MOD - TIM1 Counter Modulo Register; 0x00000023 ***/
typedef union {
  word Word;
   /* Overlapped registers: */
  struct {
    /*** T1MODH - TIM1 Counter Modulo High Register; 0x00000023 ***/
    union {
      byte Byte;
    } T1MODHSTR;
    #define T1MODH                      _T1MOD.Overlap_STR.T1MODHSTR.Byte
    

    /*** T1MODL - TIM1 Counter Modulo Low Register; 0x00000024 ***/
    union {
      byte Byte;
    } T1MODLSTR;
    #define T1MODL                      _T1MOD.Overlap_STR.T1MODLSTR.Byte
    
  } Overlap_STR;

} T1MODSTR;
extern volatile T1MODSTR _T1MOD;
#define T1MOD                           _T1MOD.Word


/*** T1SC0 - TIM1 Channel 0 Status and Control Register; 0x00000025 ***/
typedef union {
  byte Byte;
  struct {
    byte CH0MAX      :1;                                       /* Channel 0 Maximum Duty Cycle Bit */
    byte TOV0        :1;                                       /* Toggle-On-Overflow Bit */
    byte ELS0A       :1;                                       /* Edge/Level Select Bit A */
    byte ELS0B       :1;                                       /* Edge/Level Select Bit B */
    byte MS0A        :1;                                       /* Mode Select Bit A */
    byte MS0B        :1;                                       /* Mode Select Bit B */
    byte CH0IE       :1;                                       /* Channel 0 Interrupt Enable Bit */
    byte CH0F        :1;                                       /* Channel 0 Flag Bit */
  } Bits;
  struct {
    byte         :1;
    byte grpTOV  :1;
    byte grpELS0x :2;
    byte grpMS0x :2;
    byte         :1;
    byte         :1;
  } MergedBits;
} T1SC0STR;
extern volatile T1SC0STR _T1SC0;
#define T1SC0                           _T1SC0.Byte
#define T1SC0_CH0MAX                    _T1SC0.Bits.CH0MAX
#define T1SC0_TOV0                      _T1SC0.Bits.TOV0
#define T1SC0_ELS0A                     _T1SC0.Bits.ELS0A
#define T1SC0_ELS0B                     _T1SC0.Bits.ELS0B
#define T1SC0_MS0A                      _T1SC0.Bits.MS0A
#define T1SC0_MS0B                      _T1SC0.Bits.MS0B
#define T1SC0_CH0IE                     _T1SC0.Bits.CH0IE
#define T1SC0_CH0F                      _T1SC0.Bits.CH0F
#define T1SC0_ELS0x                     _T1SC0.MergedBits.grpELS0x
#define T1SC0_MS0x                      _T1SC0.MergedBits.grpMS0x

#define T1SC0_CH0MAX_MASK               1
#define T1SC0_TOV0_MASK                 2
#define T1SC0_ELS0A_MASK                4
#define T1SC0_ELS0B_MASK                8
#define T1SC0_MS0A_MASK                 16
#define T1SC0_MS0B_MASK                 32
#define T1SC0_CH0IE_MASK                64
#define T1SC0_CH0F_MASK                 128
#define T1SC0_ELS0x_MASK                12
#define T1SC0_ELS0x_BITNUM              2
#define T1SC0_MS0x_MASK                 48
#define T1SC0_MS0x_BITNUM               4


/*** T1CH0 - TIM1 Channel 0 Register; 0x00000026 ***/
typedef union {
  word Word;
   /* Overlapped registers: */
  struct {
    /*** T1CH0H - TIM1 Channel 0 Register High; 0x00000026 ***/
    union {
      byte Byte;
    } T1CH0HSTR;
    #define T1CH0H                      _T1CH0.Overlap_STR.T1CH0HSTR.Byte
    

    /*** T1CH0L - TIM1 Channel 0 Register Low; 0x00000027 ***/
    union {
      byte Byte;
    } T1CH0LSTR;
    #define T1CH0L                      _T1CH0.Overlap_STR.T1CH0LSTR.Byte
    
  } Overlap_STR;

} T1CH0STR;
extern volatile T1CH0STR _T1CH0;
#define T1CH0                           _T1CH0.Word


/*** T1SC1 - TIM1 Channel 1 Status and Control Register; 0x00000028 ***/
typedef union {
  byte Byte;
  struct {
    byte CH1MAX      :1;                                       /* Channel 1 Maximum Duty Cycle Bit */
    byte TOV1        :1;                                       /* Toggle-On-Overflow Bit */
    byte ELS1A       :1;                                       /* Edge/Level Select Bit A */
    byte ELS1B       :1;                                       /* Edge/Level Select Bit B */
    byte MS1A        :1;                                       /* Mode Select Bit A */
    byte             :1; 
    byte CH1IE       :1;                                       /* Channel 1 Interrupt Enable Bit */
    byte CH1F        :1;                                       /* Channel 1 Flag Bit */
  } Bits;
  struct {
    byte         :1;
    byte grpTOV_1 :1;
    byte grpELS1x :2;
    byte grpMS1x :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} T1SC1STR;
extern volatile T1SC1STR _T1SC1;
#define T1SC1                           _T1SC1.Byte
#define T1SC1_CH1MAX                    _T1SC1.Bits.CH1MAX
#define T1SC1_TOV1                      _T1SC1.Bits.TOV1
#define T1SC1_ELS1A                     _T1SC1.Bits.ELS1A
#define T1SC1_ELS1B                     _T1SC1.Bits.ELS1B
#define T1SC1_MS1A                      _T1SC1.Bits.MS1A
#define T1SC1_CH1IE                     _T1SC1.Bits.CH1IE
#define T1SC1_CH1F                      _T1SC1.Bits.CH1F
#define T1SC1_ELS1x                     _T1SC1.MergedBits.grpELS1x

#define T1SC1_CH1MAX_MASK               1
#define T1SC1_TOV1_MASK                 2
#define T1SC1_ELS1A_MASK                4
#define T1SC1_ELS1B_MASK                8
#define T1SC1_MS1A_MASK                 16
#define T1SC1_CH1IE_MASK                64
#define T1SC1_CH1F_MASK                 128
#define T1SC1_ELS1x_MASK                12
#define T1SC1_ELS1x_BITNUM              2


/*** T1CH1 - TIM1 Channel 1 Register; 0x00000029 ***/
typedef union {
  word Word;
   /* Overlapped registers: */
  struct {
    /*** T1CH1H - TIM1 Channel 1 Register High; 0x00000029 ***/
    union {
      byte Byte;
    } T1CH1HSTR;
    #define T1CH1H                      _T1CH1.Overlap_STR.T1CH1HSTR.Byte
    

    /*** T1CH1L - TIM1 Channel 1 Register Low; 0x0000002A ***/
    union {
      byte Byte;
    } T1CH1LSTR;
    #define T1CH1L                      _T1CH1.Overlap_STR.T1CH1LSTR.Byte
    
  } Overlap_STR;

} T1CH1STR;
extern volatile T1CH1STR _T1CH1;
#define T1CH1                           _T1CH1.Word


/*** T2SC - TIM2 Status and Control Register; 0x0000002B ***/
typedef union {
  byte Byte;
  struct {
    byte PS0         :1;                                       /* Prescaler Select Bit 0 */
    byte PS1         :1;                                       /* Prescaler Select Bit 1 */
    byte PS2         :1;                                       /* Prescaler Select Bit 2 */
    byte             :1; 
    byte TRST        :1;                                       /* TIM2 Reset Bit */
    byte TSTOP       :1;                                       /* TIM2 Stop Bit */
    byte TOIE        :1;                                       /* TIM2 Overflow Interrupt Enable Bit */
    byte TOF         :1;                                       /* TIM2 Overflow Flag Bit */
  } Bits;
  struct {
    byte grpPS   :3;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} T2SCSTR;
extern volatile T2SCSTR _T2SC;
#define T2SC                            _T2SC.Byte
#define T2SC_PS0                        _T2SC.Bits.PS0
#define T2SC_PS1                        _T2SC.Bits.PS1
#define T2SC_PS2                        _T2SC.Bits.PS2
#define T2SC_TRST                       _T2SC.Bits.TRST
#define T2SC_TSTOP                      _T2SC.Bits.TSTOP
#define T2SC_TOIE                       _T2SC.Bits.TOIE
#define T2SC_TOF                        _T2SC.Bits.TOF
#define T2SC_PS                         _T2SC.MergedBits.grpPS

#define T2SC_PS0_MASK                   1
#define T2SC_PS1_MASK                   2
#define T2SC_PS2_MASK                   4
#define T2SC_TRST_MASK                  16
#define T2SC_TSTOP_MASK                 32
#define T2SC_TOIE_MASK                  64
#define T2SC_TOF_MASK                   128
#define T2SC_PS_MASK                    7
#define T2SC_PS_BITNUM                  0


/*** T2CNT - TIM2 Counter Register; 0x0000002C ***/
typedef union {
  word Word;
   /* Overlapped registers: */
  struct {
    /*** T2CNTH - TIM2 Counter High Register; 0x0000002C ***/
    union {
      byte Byte;
    } T2CNTHSTR;
    #define T2CNTH                      _T2CNT.Overlap_STR.T2CNTHSTR.Byte
    

    /*** T2CNTL - TIM2 Counter Low Register; 0x0000002D ***/
    union {
      byte Byte;
    } T2CNTLSTR;
    #define T2CNTL                      _T2CNT.Overlap_STR.T2CNTLSTR.Byte
    
  } Overlap_STR;

} T2CNTSTR;
extern volatile T2CNTSTR _T2CNT;
#define T2CNT                           _T2CNT.Word


/*** T2MOD - TIM2 Counter Modulo Register; 0x0000002E ***/
typedef union {
  word Word;
   /* Overlapped registers: */
  struct {
    /*** T2MODH - TIM2 Counter Modulo High Register; 0x0000002E ***/
    union {
      byte Byte;
    } T2MODHSTR;
    #define T2MODH                      _T2MOD.Overlap_STR.T2MODHSTR.Byte
    

    /*** T2MODL - TIM2 Counter Modulo Low Register; 0x0000002F ***/
    union {
      byte Byte;
    } T2MODLSTR;
    #define T2MODL                      _T2MOD.Overlap_STR.T2MODLSTR.Byte
    
  } Overlap_STR;

} T2MODSTR;
extern volatile T2MODSTR _T2MOD;
#define T2MOD                           _T2MOD.Word


/*** T2SC0 - TIM2 Channel 0 Status and Control Register; 0x00000030 ***/
typedef union {
  byte Byte;
  struct {
    byte CH0MAX      :1;                                       /* Channel 0 Maximum Duty Cycle Bit */
    byte TOV0        :1;                                       /* Toggle-On-Overflow Bit */
    byte ELS0A       :1;                                       /* Edge/Level Select Bit A */
    byte ELS0B       :1;                                       /* Edge/Level Select Bit B */
    byte MS0A        :1;                                       /* Mode Select Bit A */
    byte MS0B        :1;                                       /* Mode Select Bit B */
    byte CH0IE       :1;                                       /* Channel 0 Interrupt Enable Bit */
    byte CH0F        :1;                                       /* Channel 0 Flag Bit */
  } Bits;
  struct {
    byte         :1;
    byte grpTOV  :1;
    byte grpELS0x :2;
    byte grpMS0x :2;
    byte         :1;
    byte         :1;
  } MergedBits;
} T2SC0STR;
extern volatile T2SC0STR _T2SC0;
#define T2SC0                           _T2SC0.Byte
#define T2SC0_CH0MAX                    _T2SC0.Bits.CH0MAX
#define T2SC0_TOV0                      _T2SC0.Bits.TOV0
#define T2SC0_ELS0A                     _T2SC0.Bits.ELS0A
#define T2SC0_ELS0B                     _T2SC0.Bits.ELS0B
#define T2SC0_MS0A                      _T2SC0.Bits.MS0A
#define T2SC0_MS0B                      _T2SC0.Bits.MS0B
#define T2SC0_CH0IE                     _T2SC0.Bits.CH0IE
#define T2SC0_CH0F                      _T2SC0.Bits.CH0F
#define T2SC0_ELS0x                     _T2SC0.MergedBits.grpELS0x
#define T2SC0_MS0x                      _T2SC0.MergedBits.grpMS0x

#define T2SC0_CH0MAX_MASK               1
#define T2SC0_TOV0_MASK                 2
#define T2SC0_ELS0A_MASK                4
#define T2SC0_ELS0B_MASK                8
#define T2SC0_MS0A_MASK                 16
#define T2SC0_MS0B_MASK                 32
#define T2SC0_CH0IE_MASK                64
#define T2SC0_CH0F_MASK                 128
#define T2SC0_ELS0x_MASK                12
#define T2SC0_ELS0x_BITNUM              2
#define T2SC0_MS0x_MASK                 48
#define T2SC0_MS0x_BITNUM               4


/*** T2CH0 - TIM2 Channel 0 Register; 0x00000031 ***/
typedef union {
  word Word;
   /* Overlapped registers: */
  struct {
    /*** T2CH0H - TIM2 Channel 0 Register High; 0x00000031 ***/
    union {
      byte Byte;
    } T2CH0HSTR;
    #define T2CH0H                      _T2CH0.Overlap_STR.T2CH0HSTR.Byte
    

    /*** T2CH0L - TIM2 Channel 0 Register Low; 0x00000032 ***/
    union {
      byte Byte;
    } T2CH0LSTR;
    #define T2CH0L                      _T2CH0.Overlap_STR.T2CH0LSTR.Byte
    
  } Overlap_STR;

} T2CH0STR;
extern volatile T2CH0STR _T2CH0;
#define T2CH0                           _T2CH0.Word


/*** T2SC1 - TIM2 Channel 1 Status and Control Register; 0x00000033 ***/
typedef union {
  byte Byte;
  struct {
    byte CH1MAX      :1;                                       /* Channel 1 Maximum Duty Cycle Bit */
    byte TOV1        :1;                                       /* Toggle-On-Overflow Bit */
    byte ELS1A       :1;                                       /* Edge/Level Select Bit A */
    byte ELS1B       :1;                                       /* Edge/Level Select Bit B */
    byte MS1A        :1;                                       /* Mode Select Bit A */
    byte             :1; 
    byte CH1IE       :1;                                       /* Channel 1 Interrupt Enable Bit */
    byte CH1F        :1;                                       /* Channel 1 Flag Bit */
  } Bits;
  struct {
    byte         :1;
    byte grpTOV_1 :1;
    byte grpELS1x :2;
    byte grpMS1x :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} T2SC1STR;
extern volatile T2SC1STR _T2SC1;
#define T2SC1                           _T2SC1.Byte
#define T2SC1_CH1MAX                    _T2SC1.Bits.CH1MAX
#define T2SC1_TOV1                      _T2SC1.Bits.TOV1
#define T2SC1_ELS1A                     _T2SC1.Bits.ELS1A
#define T2SC1_ELS1B                     _T2SC1.Bits.ELS1B
#define T2SC1_MS1A                      _T2SC1.Bits.MS1A
#define T2SC1_CH1IE                     _T2SC1.Bits.CH1IE
#define T2SC1_CH1F                      _T2SC1.Bits.CH1F
#define T2SC1_ELS1x                     _T2SC1.MergedBits.grpELS1x

#define T2SC1_CH1MAX_MASK               1
#define T2SC1_TOV1_MASK                 2
#define T2SC1_ELS1A_MASK                4
#define T2SC1_ELS1B_MASK                8
#define T2SC1_MS1A_MASK                 16
#define T2SC1_CH1IE_MASK                64
#define T2SC1_CH1F_MASK                 128
#define T2SC1_ELS1x_MASK                12
#define T2SC1_ELS1x_BITNUM              2


/*** T2CH1 - TIM2 Channel 1 Register; 0x00000034 ***/
typedef union {
  word Word;
   /* Overlapped registers: */
  struct {
    /*** T2CH1H - TIM2 Channel 1 Register High; 0x00000034 ***/
    union {
      byte Byte;
    } T2CH1HSTR;
    #define T2CH1H                      _T2CH1.Overlap_STR.T2CH1HSTR.Byte
    

    /*** T2CH1L - TIM2 Channel 1 Register Low; 0x00000035 ***/
    union {
      byte Byte;
    } T2CH1LSTR;
    #define T2CH1L                      _T2CH1.Overlap_STR.T2CH1LSTR.Byte
    
  } Overlap_STR;

} T2CH1STR;
extern volatile T2CH1STR _T2CH1;
#define T2CH1                           _T2CH1.Word


/*** PCTL - PLL Control Register; 0x00000036 ***/
typedef union {
  byte Byte;
  struct {
    byte VPR0        :1;                                       /* VCO Power-of-Two Range Select Bit 0 */
    byte VPR1        :1;                                       /* VCO Power-of-Two Range Select Bit 1 */
    byte PRE0        :1;                                       /* Prescaler Program Bit 0 */
    byte PRE1        :1;                                       /* Prescaler Program Bit 1 */
    byte BCS         :1;                                       /* Base Clock Select Bit */
    byte PLLON       :1;                                       /* PLL On Bit */
    byte PLLF        :1;                                       /* PLL Flag Bit */
    byte PLLIE       :1;                                       /* PLL Interrupt Enable Bit */
  } Bits;
  struct {
    byte grpVPR  :2;
    byte grpPRE  :2;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} PCTLSTR;
extern volatile PCTLSTR _PCTL;
#define PCTL                            _PCTL.Byte
#define PCTL_VPR0                       _PCTL.Bits.VPR0
#define PCTL_VPR1                       _PCTL.Bits.VPR1
#define PCTL_PRE0                       _PCTL.Bits.PRE0
#define PCTL_PRE1                       _PCTL.Bits.PRE1
#define PCTL_BCS                        _PCTL.Bits.BCS
#define PCTL_PLLON                      _PCTL.Bits.PLLON
#define PCTL_PLLF                       _PCTL.Bits.PLLF
#define PCTL_PLLIE                      _PCTL.Bits.PLLIE
#define PCTL_VPR                        _PCTL.MergedBits.grpVPR
#define PCTL_PRE                        _PCTL.MergedBits.grpPRE

#define PCTL_VPR0_MASK                  1
#define PCTL_VPR1_MASK                  2
#define PCTL_PRE0_MASK                  4
#define PCTL_PRE1_MASK                  8
#define PCTL_BCS_MASK                   16
#define PCTL_PLLON_MASK                 32
#define PCTL_PLLF_MASK                  64
#define PCTL_PLLIE_MASK                 128
#define PCTL_VPR_MASK                   3
#define PCTL_VPR_BITNUM                 0
#define PCTL_PRE_MASK                   12
#define PCTL_PRE_BITNUM                 2


/*** PBWC - PLL Bandwidth Control Register; 0x00000037 ***/
typedef union {
  byte Byte;
  struct {
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte ACQ         :1;                                       /* Automatic Bandwidth Control Bit */
    byte LOCK        :1;                                       /* Lock Indicator Bit */
    byte AUTO        :1;                                       /* Acquisiton Mode Bit */
  } Bits;
} PBWCSTR;
extern volatile PBWCSTR _PBWC;
#define PBWC                            _PBWC.Byte
#define PBWC_ACQ                        _PBWC.Bits.ACQ
#define PBWC_LOCK                       _PBWC.Bits.LOCK
#define PBWC_AUTO                       _PBWC.Bits.AUTO

#define PBWC_ACQ_MASK                   32
#define PBWC_LOCK_MASK                  64
#define PBWC_AUTO_MASK                  128


/*** PMS - PLL Multiplier Select Register; 0x00000038 ***/
typedef union {
  word Word;
   /* Overlapped registers: */
  struct {
    /*** PMSH - PLL Multiplier Select Register High; 0x00000038 ***/
    union {
      byte Byte;
      struct {
        byte MUL8        :1;                                       /* PLL Multiplier Select Bit 8 */
        byte MUL9        :1;                                       /* PLL Multiplier Select Bit 9 */
        byte MUL10       :1;                                       /* PLL Multiplier Select Bit 10 */
        byte MUL11       :1;                                       /* PLL Multiplier Select Bit 11 */
        byte             :1; 
        byte             :1; 
        byte             :1; 
        byte             :1; 
      } Bits;
      struct {
        byte grpMUL_8 :4;
        byte     :1;
        byte     :1;
        byte     :1;
        byte     :1;
      } MergedBits;
    } PMSHSTR;
    #define PMSH                        _PMS.Overlap_STR.PMSHSTR.Byte
    #define PMSH_MUL8                   _PMS.Overlap_STR.PMSHSTR.Bits.MUL8
    #define PMSH_MUL9                   _PMS.Overlap_STR.PMSHSTR.Bits.MUL9
    #define PMSH_MUL10                  _PMS.Overlap_STR.PMSHSTR.Bits.MUL10
    #define PMSH_MUL11                  _PMS.Overlap_STR.PMSHSTR.Bits.MUL11
    #define PMSH_MUL_8                  _PMS.Overlap_STR.PMSHSTR.MergedBits.grpMUL_8
    #define PMSH_MUL                    PMSH_MUL_8
    
    #define PMSH_MUL8_MASK              1
    #define PMSH_MUL9_MASK              2
    #define PMSH_MUL10_MASK             4
    #define PMSH_MUL11_MASK             8
    #define PMSH_MUL_8_MASK             15
    #define PMSH_MUL_8_BITNUM           0
    

    /*** PMSL - PLL Multiplier Select Register Low; 0x00000039 ***/
    union {
      byte Byte;
      struct {
        byte MUL0        :1;                                       /* PLL Multiplier Select Bit 0 */
        byte MUL1        :1;                                       /* PLL Multiplier Select Bit 1 */
        byte MUL2        :1;                                       /* PLL Multiplier Select Bit 2 */
        byte MUL3        :1;                                       /* PLL Multiplier Select Bit 3 */
        byte MUL4        :1;                                       /* PLL Multiplier Select Bit 4 */
        byte MUL5        :1;                                       /* PLL Multiplier Select Bit 5 */
        byte MUL6        :1;                                       /* PLL Multiplier Select Bit 6 */
        byte MUL7        :1;                                       /* PLL Multiplier Select Bit 7 */
      } Bits;
    } PMSLSTR;
    #define PMSL                        _PMS.Overlap_STR.PMSLSTR.Byte
    #define PMSL_MUL0                   _PMS.Overlap_STR.PMSLSTR.Bits.MUL0
    #define PMSL_MUL1                   _PMS.Overlap_STR.PMSLSTR.Bits.MUL1
    #define PMSL_MUL2                   _PMS.Overlap_STR.PMSLSTR.Bits.MUL2
    #define PMSL_MUL3                   _PMS.Overlap_STR.PMSLSTR.Bits.MUL3
    #define PMSL_MUL4                   _PMS.Overlap_STR.PMSLSTR.Bits.MUL4
    #define PMSL_MUL5                   _PMS.Overlap_STR.PMSLSTR.Bits.MUL5
    #define PMSL_MUL6                   _PMS.Overlap_STR.PMSLSTR.Bits.MUL6
    #define PMSL_MUL7                   _PMS.Overlap_STR.PMSLSTR.Bits.MUL7
    
    #define PMSL_MUL0_MASK              1
    #define PMSL_MUL1_MASK              2
    #define PMSL_MUL2_MASK              4
    #define PMSL_MUL3_MASK              8
    #define PMSL_MUL4_MASK              16
    #define PMSL_MUL5_MASK              32
    #define PMSL_MUL6_MASK              64
    #define PMSL_MUL7_MASK              128
    
  } Overlap_STR;

} PMSSTR;
extern volatile PMSSTR _PMS;
#define PMS                             _PMS.Word


/*** PMRS - PLL VCO Range Select; 0x0000003A ***/
typedef union {
  byte Byte;
  struct {
    byte VRS0        :1;                                       /* VCO Range Select Bit 0 */
    byte VRS1        :1;                                       /* VCO Range Select Bit 1 */
    byte VRS2        :1;                                       /* VCO Range Select Bit 2 */
    byte VRS3        :1;                                       /* VCO Range Select Bit 3 */
    byte VRS4        :1;                                       /* VCO Range Select Bit 4 */
    byte VRS5        :1;                                       /* VCO Range Select Bit 5 */
    byte VRS6        :1;                                       /* VCO Range Select Bit 6 */
    byte VRS7        :1;                                       /* VCO Range Select Bit 7 */
  } Bits;
} PMRSSTR;
extern volatile PMRSSTR _PMRS;
#define PMRS                            _PMRS.Byte
#define PMRS_VRS0                       _PMRS.Bits.VRS0
#define PMRS_VRS1                       _PMRS.Bits.VRS1
#define PMRS_VRS2                       _PMRS.Bits.VRS2
#define PMRS_VRS3                       _PMRS.Bits.VRS3
#define PMRS_VRS4                       _PMRS.Bits.VRS4
#define PMRS_VRS5                       _PMRS.Bits.VRS5
#define PMRS_VRS6                       _PMRS.Bits.VRS6
#define PMRS_VRS7                       _PMRS.Bits.VRS7

#define PMRS_VRS0_MASK                  1
#define PMRS_VRS1_MASK                  2
#define PMRS_VRS2_MASK                  4
#define PMRS_VRS3_MASK                  8
#define PMRS_VRS4_MASK                  16
#define PMRS_VRS5_MASK                  32
#define PMRS_VRS6_MASK                  64
#define PMRS_VRS7_MASK                  128


/*** PMDS - PLL Reference Divider Select Register; 0x0000003B ***/
typedef union {
  byte Byte;
  struct {
    byte RDS0        :1;                                       /* Reference Divider Select Bit 0 */
    byte RDS1        :1;                                       /* Reference Divider Select Bit 1 */
    byte RDS2        :1;                                       /* Reference Divider Select Bit 2 */
    byte RDS3        :1;                                       /* Reference Divider Select Bit 3 */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
  struct {
    byte grpRDS  :4;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} PMDSSTR;
extern volatile PMDSSTR _PMDS;
#define PMDS                            _PMDS.Byte
#define PMDS_RDS0                       _PMDS.Bits.RDS0
#define PMDS_RDS1                       _PMDS.Bits.RDS1
#define PMDS_RDS2                       _PMDS.Bits.RDS2
#define PMDS_RDS3                       _PMDS.Bits.RDS3
#define PMDS_RDS                        _PMDS.MergedBits.grpRDS

#define PMDS_RDS0_MASK                  1
#define PMDS_RDS1_MASK                  2
#define PMDS_RDS2_MASK                  4
#define PMDS_RDS3_MASK                  8
#define PMDS_RDS_MASK                   15
#define PMDS_RDS_BITNUM                 0


/*** ADSCR - ADC Status and Control Register; 0x0000003C ***/
typedef union {
  byte Byte;
  struct {
    byte ADCH0       :1;                                       /* ADC Channel Select Bit 0 */
    byte ADCH1       :1;                                       /* ADC Channel Select Bit 1 */
    byte ADCH2       :1;                                       /* ADC Channel Select Bit 2 */
    byte ADCH3       :1;                                       /* ADC Channel Select Bit 3 */
    byte ADCH4       :1;                                       /* ADC Channel Select Bit 4 */
    byte ADCO        :1;                                       /* ADC Continuous Conversion Bit */
    byte AIEN        :1;                                       /* ADC Interrupt Enable Bit */
    byte COCO        :1;                                       /* Conversions Complete Bit */
  } Bits;
  struct {
    byte grpADCH :5;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} ADSCRSTR;
extern volatile ADSCRSTR _ADSCR;
#define ADSCR                           _ADSCR.Byte
#define ADSCR_ADCH0                     _ADSCR.Bits.ADCH0
#define ADSCR_ADCH1                     _ADSCR.Bits.ADCH1
#define ADSCR_ADCH2                     _ADSCR.Bits.ADCH2
#define ADSCR_ADCH3                     _ADSCR.Bits.ADCH3
#define ADSCR_ADCH4                     _ADSCR.Bits.ADCH4
#define ADSCR_ADCO                      _ADSCR.Bits.ADCO
#define ADSCR_AIEN                      _ADSCR.Bits.AIEN
#define ADSCR_COCO                      _ADSCR.Bits.COCO
#define ADSCR_ADCH                      _ADSCR.MergedBits.grpADCH

#define ADSCR_ADCH0_MASK                1
#define ADSCR_ADCH1_MASK                2
#define ADSCR_ADCH2_MASK                4
#define ADSCR_ADCH3_MASK                8
#define ADSCR_ADCH4_MASK                16
#define ADSCR_ADCO_MASK                 32
#define ADSCR_AIEN_MASK                 64
#define ADSCR_COCO_MASK                 128
#define ADSCR_ADCH_MASK                 31
#define ADSCR_ADCH_BITNUM               0


/*** ADR - ADC Data Register - Right-justified; 0x0000003D ***/
typedef union {
  word Word;
   /* Overlapped registers: */
  struct {
    /*** ADRH - ADC Data Register High - Right-justified mode; 0x0000003D ***/
    union {
      byte Byte;
      struct {
        byte BIT8        :1;                                       /* ADC Data Bit 8 */
        byte BIT9        :1;                                       /* ADC Data Bit 9 */
        byte BIT10       :1;                                       /* ADC Data Bit 10 */
        byte BIT11       :1;                                       /* ADC Data Bit 11 */
        byte BIT12       :1;                                       /* ADC Data Bit 12 */
        byte BIT13       :1;                                       /* ADC Data Bit 13 */
        byte BIT14       :1;                                       /* ADC Data Bit 14 */
        byte BIT15       :1;                                       /* ADC Data Bit 15 */
      } Bits;
    } ADRHSTR;
    #define ADRH                        _ADR.Overlap_STR.ADRHSTR.Byte
    #define ADRH_BIT8                   _ADR.Overlap_STR.ADRHSTR.Bits.BIT8
    #define ADRH_BIT9                   _ADR.Overlap_STR.ADRHSTR.Bits.BIT9
    #define ADRH_BIT10                  _ADR.Overlap_STR.ADRHSTR.Bits.BIT10
    #define ADRH_BIT11                  _ADR.Overlap_STR.ADRHSTR.Bits.BIT11
    #define ADRH_BIT12                  _ADR.Overlap_STR.ADRHSTR.Bits.BIT12
    #define ADRH_BIT13                  _ADR.Overlap_STR.ADRHSTR.Bits.BIT13
    #define ADRH_BIT14                  _ADR.Overlap_STR.ADRHSTR.Bits.BIT14
    #define ADRH_BIT15                  _ADR.Overlap_STR.ADRHSTR.Bits.BIT15
    
    #define ADRH_BIT8_MASK              1
    #define ADRH_BIT9_MASK              2
    #define ADRH_BIT10_MASK             4
    #define ADRH_BIT11_MASK             8
    #define ADRH_BIT12_MASK             16
    #define ADRH_BIT13_MASK             32
    #define ADRH_BIT14_MASK             64
    #define ADRH_BIT15_MASK             128
    

    /*** ADRL - ADC Data Register Low - Right-justified mode; 0x0000003E ***/
    union {
      byte Byte;
      struct {
        byte BIT0        :1;                                       /* ADC Data Bit 0 */
        byte BIT1        :1;                                       /* ADC Data Bit 1 */
        byte BIT2        :1;                                       /* ADC Data Bit 2 */
        byte BIT3        :1;                                       /* ADC Data Bit 3 */
        byte BIT4        :1;                                       /* ADC Data Bit 4 */
        byte BIT5        :1;                                       /* ADC Data Bit 5 */
        byte BIT6        :1;                                       /* ADC Data Bit 6 */
        byte BIT7        :1;                                       /* ADC Data Bit 7 */
      } Bits;
    } ADRLSTR;
    #define ADRL                        _ADR.Overlap_STR.ADRLSTR.Byte
    #define ADRL_BIT0                   _ADR.Overlap_STR.ADRLSTR.Bits.BIT0
    #define ADRL_BIT1                   _ADR.Overlap_STR.ADRLSTR.Bits.BIT1
    #define ADRL_BIT2                   _ADR.Overlap_STR.ADRLSTR.Bits.BIT2
    #define ADRL_BIT3                   _ADR.Overlap_STR.ADRLSTR.Bits.BIT3
    #define ADRL_BIT4                   _ADR.Overlap_STR.ADRLSTR.Bits.BIT4
    #define ADRL_BIT5                   _ADR.Overlap_STR.ADRLSTR.Bits.BIT5
    #define ADRL_BIT6                   _ADR.Overlap_STR.ADRLSTR.Bits.BIT6
    #define ADRL_BIT7                   _ADR.Overlap_STR.ADRLSTR.Bits.BIT7
    
    #define ADRL_BIT0_MASK              1
    #define ADRL_BIT1_MASK              2
    #define ADRL_BIT2_MASK              4
    #define ADRL_BIT3_MASK              8
    #define ADRL_BIT4_MASK              16
    #define ADRL_BIT5_MASK              32
    #define ADRL_BIT6_MASK              64
    #define ADRL_BIT7_MASK              128
    
  } Overlap_STR;

} ADRSTR;
extern volatile ADRSTR _ADR;
#define ADR                             _ADR.Word


/*** ADCLK - ADC Input Clock Register; 0x0000003F ***/
typedef union {
  byte Byte;
  struct {
    byte             :1; 
    byte             :1; 
    byte MODE0       :1;                                       /* Modes of Result Justification Bit 0 */
    byte MODE1       :1;                                       /* Modes of Result Justification Bit 1 */
    byte ADICLK      :1;                                       /* ADC Input Clock Register Bit */
    byte ADIV0       :1;                                       /* ADC Clock Prescaler Bit 0 */
    byte ADIV1       :1;                                       /* ADC Clock Prescaler Bit 1 */
    byte ADIV2       :1;                                       /* ADC Clock Prescaler Bit 2 */
  } Bits;
  struct {
    byte         :1;
    byte         :1;
    byte grpMODE :2;
    byte         :1;
    byte grpADIV :3;
  } MergedBits;
} ADCLKSTR;
extern volatile ADCLKSTR _ADCLK;
#define ADCLK                           _ADCLK.Byte
#define ADCLK_MODE0                     _ADCLK.Bits.MODE0
#define ADCLK_MODE1                     _ADCLK.Bits.MODE1
#define ADCLK_ADICLK                    _ADCLK.Bits.ADICLK
#define ADCLK_ADIV0                     _ADCLK.Bits.ADIV0
#define ADCLK_ADIV1                     _ADCLK.Bits.ADIV1
#define ADCLK_ADIV2                     _ADCLK.Bits.ADIV2
#define ADCLK_MODE                      _ADCLK.MergedBits.grpMODE
#define ADCLK_ADIV                      _ADCLK.MergedBits.grpADIV

#define ADCLK_MODE0_MASK                4
#define ADCLK_MODE1_MASK                8
#define ADCLK_ADICLK_MASK               16
#define ADCLK_ADIV0_MASK                32
#define ADCLK_ADIV1_MASK                64
#define ADCLK_ADIV2_MASK                128
#define ADCLK_MODE_MASK                 12
#define ADCLK_MODE_BITNUM               2
#define ADCLK_ADIV_MASK                 224
#define ADCLK_ADIV_BITNUM               5


/*** RTCCOMR - RTC Calibration Control Register; 0x00000040 ***/
typedef union {
  byte Byte;
  struct {
    byte RTCWE0      :1;                                       /* RTC module write enable status Bit 0 */
    byte RTCWE1      :1;                                       /* RTC module write enable status Bit 1 */
    byte OUTF0       :1;                                       /* Calibration mode clock output selection Bit 0 */
    byte OUTF1       :1;                                       /* Calibration mode clock output selection Bit 1 */
    byte AUTOCAL     :1;                                       /* RTC Automatic Calibration Enable */
    byte CAL         :1;                                       /* RTC Calibration Mode */
    byte             :1; 
    byte             :1; 
  } Bits;
  struct {
    byte grpRTCWE :2;
    byte grpOUTF :2;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} RTCCOMRSTR;
extern volatile RTCCOMRSTR _RTCCOMR;
#define RTCCOMR                         _RTCCOMR.Byte
#define RTCCOMR_RTCWE0                  _RTCCOMR.Bits.RTCWE0
#define RTCCOMR_RTCWE1                  _RTCCOMR.Bits.RTCWE1
#define RTCCOMR_OUTF0                   _RTCCOMR.Bits.OUTF0
#define RTCCOMR_OUTF1                   _RTCCOMR.Bits.OUTF1
#define RTCCOMR_AUTOCAL                 _RTCCOMR.Bits.AUTOCAL
#define RTCCOMR_CAL                     _RTCCOMR.Bits.CAL
#define RTCCOMR_RTCWE                   _RTCCOMR.MergedBits.grpRTCWE
#define RTCCOMR_OUTF                    _RTCCOMR.MergedBits.grpOUTF

#define RTCCOMR_RTCWE0_MASK             1
#define RTCCOMR_RTCWE1_MASK             2
#define RTCCOMR_OUTF0_MASK              4
#define RTCCOMR_OUTF1_MASK              8
#define RTCCOMR_AUTOCAL_MASK            16
#define RTCCOMR_CAL_MASK                32
#define RTCCOMR_RTCWE_MASK              3
#define RTCCOMR_RTCWE_BITNUM            0
#define RTCCOMR_OUTF_MASK               12
#define RTCCOMR_OUTF_BITNUM             2


/*** RTCCDAT - RTC Calibration Data Register; 0x00000041 ***/
typedef union {
  byte Byte;
  struct {
    byte E0          :1;                                       /* RTC compensation value Bit 0 */
    byte E1          :1;                                       /* RTC compensation value Bit 1 */
    byte E2          :1;                                       /* RTC compensation value Bit 2 */
    byte E3          :1;                                       /* RTC compensation value Bit 3 */
    byte E4          :1;                                       /* RTC compensation value Bit 4 */
    byte E5          :1;                                       /* RTC compensation value Bit 5 */
    byte             :1; 
    byte EOVL        :1;                                       /* E register overflow */
  } Bits;
  struct {
    byte grpE    :6;
    byte         :1;
    byte         :1;
  } MergedBits;
} RTCCDATSTR;
extern volatile RTCCDATSTR _RTCCDAT;
#define RTCCDAT                         _RTCCDAT.Byte
#define RTCCDAT_E0                      _RTCCDAT.Bits.E0
#define RTCCDAT_E1                      _RTCCDAT.Bits.E1
#define RTCCDAT_E2                      _RTCCDAT.Bits.E2
#define RTCCDAT_E3                      _RTCCDAT.Bits.E3
#define RTCCDAT_E4                      _RTCCDAT.Bits.E4
#define RTCCDAT_E5                      _RTCCDAT.Bits.E5
#define RTCCDAT_EOVL                    _RTCCDAT.Bits.EOVL
#define RTCCDAT_E                       _RTCCDAT.MergedBits.grpE

#define RTCCDAT_E0_MASK                 1
#define RTCCDAT_E1_MASK                 2
#define RTCCDAT_E2_MASK                 4
#define RTCCDAT_E3_MASK                 8
#define RTCCDAT_E4_MASK                 16
#define RTCCDAT_E5_MASK                 32
#define RTCCDAT_EOVL_MASK               128
#define RTCCDAT_E_MASK                  63
#define RTCCDAT_E_BITNUM                0


/*** RTCCR1 - RTC Control Register 1; 0x00000042 ***/
typedef union {
  byte Byte;
  struct {
    byte TB2IE       :1;                                       /* Timebase 2 Interrupt Enable */
    byte TB1IE       :1;                                       /* Timebase 1 Interrupt Enable */
    byte SECIE       :1;                                       /* Second Interrupt Enable */
    byte MINIE       :1;                                       /* Minute Interrupt Enable */
    byte HRIE        :1;                                       /* Hour Interrupt Enable */
    byte DAYIE       :1;                                       /* Day Interrupt Enable */
    byte CHRIE       :1;                                       /* Chronograph Interrupt Enable */
    byte ALMIE       :1;                                       /* Alarm Interrupt Enable */
  } Bits;
} RTCCR1STR;
extern volatile RTCCR1STR _RTCCR1;
#define RTCCR1                          _RTCCR1.Byte
#define RTCCR1_TB2IE                    _RTCCR1.Bits.TB2IE
#define RTCCR1_TB1IE                    _RTCCR1.Bits.TB1IE
#define RTCCR1_SECIE                    _RTCCR1.Bits.SECIE
#define RTCCR1_MINIE                    _RTCCR1.Bits.MINIE
#define RTCCR1_HRIE                     _RTCCR1.Bits.HRIE
#define RTCCR1_DAYIE                    _RTCCR1.Bits.DAYIE
#define RTCCR1_CHRIE                    _RTCCR1.Bits.CHRIE
#define RTCCR1_ALMIE                    _RTCCR1.Bits.ALMIE

#define RTCCR1_TB2IE_MASK               1
#define RTCCR1_TB1IE_MASK               2
#define RTCCR1_SECIE_MASK               4
#define RTCCR1_MINIE_MASK               8
#define RTCCR1_HRIE_MASK                16
#define RTCCR1_DAYIE_MASK               32
#define RTCCR1_CHRIE_MASK               64
#define RTCCR1_ALMIE_MASK               128


/*** RTCCR2 - RTC Control Register 2; 0x00000043 ***/
typedef union {
  byte Byte;
  struct {
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte TBH         :1;                                       /* Timebase High Frequency Set Select */
    byte RTCE        :1;                                       /* Real Time Clock Enable */
    byte CHRE        :1;                                       /* Chronograph Enable */
    byte CHRCLR      :1;                                       /* Chronograph Counter Clear */
    byte COMEN       :1;                                       /* Crystal Frequency Select Bit 0 */
  } Bits;
} RTCCR2STR;
extern volatile RTCCR2STR _RTCCR2;
#define RTCCR2                          _RTCCR2.Byte
#define RTCCR2_TBH                      _RTCCR2.Bits.TBH
#define RTCCR2_RTCE                     _RTCCR2.Bits.RTCE
#define RTCCR2_CHRE                     _RTCCR2.Bits.CHRE
#define RTCCR2_CHRCLR                   _RTCCR2.Bits.CHRCLR
#define RTCCR2_COMEN                    _RTCCR2.Bits.COMEN

#define RTCCR2_TBH_MASK                 8
#define RTCCR2_RTCE_MASK                16
#define RTCCR2_CHRE_MASK                32
#define RTCCR2_CHRCLR_MASK              64
#define RTCCR2_COMEN_MASK               128


/*** RTCSR - RTC Status Register; 0x00000044 ***/
typedef union {
  byte Byte;
  struct {
    byte TB2F        :1;                                       /* Timebase 2 Flag */
    byte TB1F        :1;                                       /* Timebase 1 Flag */
    byte SECF        :1;                                       /* Second Flag */
    byte MINF        :1;                                       /* Minute Flag */
    byte HRF         :1;                                       /* Hour Flag */
    byte DAYF        :1;                                       /* Day Flag */
    byte CHRF        :1;                                       /* Chronograph Flag */
    byte ALMF        :1;                                       /* Alarm Flag */
  } Bits;
} RTCSRSTR;
extern volatile RTCSRSTR _RTCSR;
#define RTCSR                           _RTCSR.Byte
#define RTCSR_TB2F                      _RTCSR.Bits.TB2F
#define RTCSR_TB1F                      _RTCSR.Bits.TB1F
#define RTCSR_SECF                      _RTCSR.Bits.SECF
#define RTCSR_MINF                      _RTCSR.Bits.MINF
#define RTCSR_HRF                       _RTCSR.Bits.HRF
#define RTCSR_DAYF                      _RTCSR.Bits.DAYF
#define RTCSR_CHRF                      _RTCSR.Bits.CHRF
#define RTCSR_ALMF                      _RTCSR.Bits.ALMF

#define RTCSR_TB2F_MASK                 1
#define RTCSR_TB1F_MASK                 2
#define RTCSR_SECF_MASK                 4
#define RTCSR_MINF_MASK                 8
#define RTCSR_HRF_MASK                  16
#define RTCSR_DAYF_MASK                 32
#define RTCSR_CHRF_MASK                 64
#define RTCSR_ALMF_MASK                 128


/*** ALMR - Alarm Minute Register; 0x00000045 ***/
typedef union {
  byte Byte;
  struct {
    byte AM0         :1;                                       /* Alarm Minute Bit 0 */
    byte AM1         :1;                                       /* Alarm Minute Bit 1 */
    byte AM2         :1;                                       /* Alarm Minute Bit 2 */
    byte AM3         :1;                                       /* Alarm Minute Bit 3 */
    byte AM4         :1;                                       /* Alarm Minute Bit 4 */
    byte AM5         :1;                                       /* Alarm Minute Bit 5 */
    byte             :1; 
    byte             :1; 
  } Bits;
  struct {
    byte grpAM   :6;
    byte         :1;
    byte         :1;
  } MergedBits;
} ALMRSTR;
extern volatile ALMRSTR _ALMR;
#define ALMR                            _ALMR.Byte
#define ALMR_AM0                        _ALMR.Bits.AM0
#define ALMR_AM1                        _ALMR.Bits.AM1
#define ALMR_AM2                        _ALMR.Bits.AM2
#define ALMR_AM3                        _ALMR.Bits.AM3
#define ALMR_AM4                        _ALMR.Bits.AM4
#define ALMR_AM5                        _ALMR.Bits.AM5
#define ALMR_AM                         _ALMR.MergedBits.grpAM

#define ALMR_AM0_MASK                   1
#define ALMR_AM1_MASK                   2
#define ALMR_AM2_MASK                   4
#define ALMR_AM3_MASK                   8
#define ALMR_AM4_MASK                   16
#define ALMR_AM5_MASK                   32
#define ALMR_AM_MASK                    63
#define ALMR_AM_BITNUM                  0


/*** ALHR - Alarm Hour Register; 0x00000046 ***/
typedef union {
  byte Byte;
  struct {
    byte AH0         :1;                                       /* Alarm Hour Bit 0 */
    byte AH1         :1;                                       /* Alarm Hour Bit 1 */
    byte AH2         :1;                                       /* Alarm Hour Bit 2 */
    byte AH3         :1;                                       /* Alarm Hour Bit 3 */
    byte AH4         :1;                                       /* Alarm Hour Bit 4 */
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
  struct {
    byte grpAH   :5;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} ALHRSTR;
extern volatile ALHRSTR _ALHR;
#define ALHR                            _ALHR.Byte
#define ALHR_AH0                        _ALHR.Bits.AH0
#define ALHR_AH1                        _ALHR.Bits.AH1
#define ALHR_AH2                        _ALHR.Bits.AH2
#define ALHR_AH3                        _ALHR.Bits.AH3
#define ALHR_AH4                        _ALHR.Bits.AH4
#define ALHR_AH                         _ALHR.MergedBits.grpAH

#define ALHR_AH0_MASK                   1
#define ALHR_AH1_MASK                   2
#define ALHR_AH2_MASK                   4
#define ALHR_AH3_MASK                   8
#define ALHR_AH4_MASK                   16
#define ALHR_AH_MASK                    31
#define ALHR_AH_BITNUM                  0


/*** SECR - Second Register; 0x00000047 ***/
typedef union {
  byte Byte;
  struct {
    byte SEC0        :1;                                       /* Second Bit 0 */
    byte SEC1        :1;                                       /* Second Bit 1 */
    byte SEC2        :1;                                       /* Second Bit 2 */
    byte SEC3        :1;                                       /* Second Bit 3 */
    byte SEC4        :1;                                       /* Second Bit 4 */
    byte SEC5        :1;                                       /* Second Bit 5 */
    byte             :1; 
    byte             :1; 
  } Bits;
  struct {
    byte grpSEC  :6;
    byte         :1;
    byte         :1;
  } MergedBits;
} SECRSTR;
extern volatile SECRSTR _SECR;
#define SECR                            _SECR.Byte
#define SECR_SEC0                       _SECR.Bits.SEC0
#define SECR_SEC1                       _SECR.Bits.SEC1
#define SECR_SEC2                       _SECR.Bits.SEC2
#define SECR_SEC3                       _SECR.Bits.SEC3
#define SECR_SEC4                       _SECR.Bits.SEC4
#define SECR_SEC5                       _SECR.Bits.SEC5
#define SECR_SEC                        _SECR.MergedBits.grpSEC

#define SECR_SEC0_MASK                  1
#define SECR_SEC1_MASK                  2
#define SECR_SEC2_MASK                  4
#define SECR_SEC3_MASK                  8
#define SECR_SEC4_MASK                  16
#define SECR_SEC5_MASK                  32
#define SECR_SEC_MASK                   63
#define SECR_SEC_BITNUM                 0


/*** MINR - Minute Register; 0x00000048 ***/
typedef union {
  byte Byte;
  struct {
    byte MIN0        :1;                                       /* Minute Bit 0 */
    byte MIN1        :1;                                       /* Minute Bit 1 */
    byte MIN2        :1;                                       /* Minute Bit 2 */
    byte MIN3        :1;                                       /* Minute Bit 3 */
    byte MIN4        :1;                                       /* Minute Bit 4 */
    byte MIN5        :1;                                       /* Minute Bit 5 */
    byte             :1; 
    byte             :1; 
  } Bits;
  struct {
    byte grpMIN  :6;
    byte         :1;
    byte         :1;
  } MergedBits;
} MINRSTR;
extern volatile MINRSTR _MINR;
#define MINR                            _MINR.Byte
#define MINR_MIN0                       _MINR.Bits.MIN0
#define MINR_MIN1                       _MINR.Bits.MIN1
#define MINR_MIN2                       _MINR.Bits.MIN2
#define MINR_MIN3                       _MINR.Bits.MIN3
#define MINR_MIN4                       _MINR.Bits.MIN4
#define MINR_MIN5                       _MINR.Bits.MIN5
#define MINR_MIN                        _MINR.MergedBits.grpMIN

#define MINR_MIN0_MASK                  1
#define MINR_MIN1_MASK                  2
#define MINR_MIN2_MASK                  4
#define MINR_MIN3_MASK                  8
#define MINR_MIN4_MASK                  16
#define MINR_MIN5_MASK                  32
#define MINR_MIN_MASK                   63
#define MINR_MIN_BITNUM                 0


/*** HRR - Hour Register; 0x00000049 ***/
typedef union {
  byte Byte;
  struct {
    byte HR0         :1;                                       /* Hour Bit 0 */
    byte HR1         :1;                                       /* Hour Bit 1 */
    byte HR2         :1;                                       /* Hour Bit 2 */
    byte HR3         :1;                                       /* Hour Bit 3 */
    byte HR4         :1;                                       /* Hour Bit 4 */
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
  struct {
    byte grpHR   :5;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} HRRSTR;
extern volatile HRRSTR _HRR;
#define HRR                             _HRR.Byte
#define HRR_HR0                         _HRR.Bits.HR0
#define HRR_HR1                         _HRR.Bits.HR1
#define HRR_HR2                         _HRR.Bits.HR2
#define HRR_HR3                         _HRR.Bits.HR3
#define HRR_HR4                         _HRR.Bits.HR4
#define HRR_HR                          _HRR.MergedBits.grpHR

#define HRR_HR0_MASK                    1
#define HRR_HR1_MASK                    2
#define HRR_HR2_MASK                    4
#define HRR_HR3_MASK                    8
#define HRR_HR4_MASK                    16
#define HRR_HR_MASK                     31
#define HRR_HR_BITNUM                   0


/*** DAYR - Day Register; 0x0000004A ***/
typedef union {
  byte Byte;
  struct {
    byte DAY0        :1;                                       /* Day Bit 0 */
    byte DAY1        :1;                                       /* Day Bit 1 */
    byte DAY2        :1;                                       /* Day Bit 2 */
    byte DAY3        :1;                                       /* Day Bit 3 */
    byte DAY4        :1;                                       /* Day Bit 4 */
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
  struct {
    byte grpDAY  :5;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} DAYRSTR;
extern volatile DAYRSTR _DAYR;
#define DAYR                            _DAYR.Byte
#define DAYR_DAY0                       _DAYR.Bits.DAY0
#define DAYR_DAY1                       _DAYR.Bits.DAY1
#define DAYR_DAY2                       _DAYR.Bits.DAY2
#define DAYR_DAY3                       _DAYR.Bits.DAY3
#define DAYR_DAY4                       _DAYR.Bits.DAY4
#define DAYR_DAY                        _DAYR.MergedBits.grpDAY

#define DAYR_DAY0_MASK                  1
#define DAYR_DAY1_MASK                  2
#define DAYR_DAY2_MASK                  4
#define DAYR_DAY3_MASK                  8
#define DAYR_DAY4_MASK                  16
#define DAYR_DAY_MASK                   31
#define DAYR_DAY_BITNUM                 0


/*** MTHR - Monh Register; 0x0000004B ***/
typedef union {
  byte Byte;
  struct {
    byte MTH0        :1;                                       /* Month Bit 0 */
    byte MTH1        :1;                                       /* Month Bit 1 */
    byte MTH2        :1;                                       /* Month Bit 2 */
    byte MTH3        :1;                                       /* Month Bit 3 */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
  struct {
    byte grpMTH  :4;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} MTHRSTR;
extern volatile MTHRSTR _MTHR;
#define MTHR                            _MTHR.Byte
#define MTHR_MTH0                       _MTHR.Bits.MTH0
#define MTHR_MTH1                       _MTHR.Bits.MTH1
#define MTHR_MTH2                       _MTHR.Bits.MTH2
#define MTHR_MTH3                       _MTHR.Bits.MTH3
#define MTHR_MTH                        _MTHR.MergedBits.grpMTH

#define MTHR_MTH0_MASK                  1
#define MTHR_MTH1_MASK                  2
#define MTHR_MTH2_MASK                  4
#define MTHR_MTH3_MASK                  8
#define MTHR_MTH_MASK                   15
#define MTHR_MTH_BITNUM                 0


/*** YRR - Year Register; 0x0000004C ***/
typedef union {
  byte Byte;
  struct {
    byte YR0         :1;                                       /* Year Bit 0 */
    byte YR1         :1;                                       /* Year Bit 1 */
    byte YR2         :1;                                       /* Year Bit 2 */
    byte YR3         :1;                                       /* Year Bit 3 */
    byte YR4         :1;                                       /* Year Bit 4 */
    byte YR5         :1;                                       /* Year Bit 5 */
    byte YR6         :1;                                       /* Year Bit 6 */
    byte YR7         :1;                                       /* Year Bit 7 */
  } Bits;
} YRRSTR;
extern volatile YRRSTR _YRR;
#define YRR                             _YRR.Byte
#define YRR_YR0                         _YRR.Bits.YR0
#define YRR_YR1                         _YRR.Bits.YR1
#define YRR_YR2                         _YRR.Bits.YR2
#define YRR_YR3                         _YRR.Bits.YR3
#define YRR_YR4                         _YRR.Bits.YR4
#define YRR_YR5                         _YRR.Bits.YR5
#define YRR_YR6                         _YRR.Bits.YR6
#define YRR_YR7                         _YRR.Bits.YR7

#define YRR_YR0_MASK                    1
#define YRR_YR1_MASK                    2
#define YRR_YR2_MASK                    4
#define YRR_YR3_MASK                    8
#define YRR_YR4_MASK                    16
#define YRR_YR5_MASK                    32
#define YRR_YR6_MASK                    64
#define YRR_YR7_MASK                    128


/*** DOWR - Day-Of-Week Register; 0x0000004D ***/
typedef union {
  byte Byte;
  struct {
    byte DOW0        :1;                                       /* Day-Of-Week Bit 0 */
    byte DOW1        :1;                                       /* Day-Of-Week Bit 1 */
    byte DOW2        :1;                                       /* Day-Of-Week Bit 2 */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
  struct {
    byte grpDOW  :3;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} DOWRSTR;
extern volatile DOWRSTR _DOWR;
#define DOWR                            _DOWR.Byte
#define DOWR_DOW0                       _DOWR.Bits.DOW0
#define DOWR_DOW1                       _DOWR.Bits.DOW1
#define DOWR_DOW2                       _DOWR.Bits.DOW2
#define DOWR_DOW                        _DOWR.MergedBits.grpDOW

#define DOWR_DOW0_MASK                  1
#define DOWR_DOW1_MASK                  2
#define DOWR_DOW2_MASK                  4
#define DOWR_DOW_MASK                   7
#define DOWR_DOW_BITNUM                 0


/*** CHRR - Chronograph Data Register; 0x0000004E ***/
typedef union {
  byte Byte;
  struct {
    byte CHR0        :1;                                       /* Chronograph Bit 0 */
    byte CHR1        :1;                                       /* Chronograph Bit 1 */
    byte CHR2        :1;                                       /* Chronograph Bit 2 */
    byte CHR3        :1;                                       /* Chronograph Bit 3 */
    byte CHR4        :1;                                       /* Chronograph Bit 4 */
    byte CHR5        :1;                                       /* Chronograph Bit 5 */
    byte CHR6        :1;                                       /* Chronograph Bit 6 */
    byte             :1; 
  } Bits;
  struct {
    byte grpCHR  :7;
    byte         :1;
  } MergedBits;
} CHRRSTR;
extern volatile CHRRSTR _CHRR;
#define CHRR                            _CHRR.Byte
#define CHRR_CHR0                       _CHRR.Bits.CHR0
#define CHRR_CHR1                       _CHRR.Bits.CHR1
#define CHRR_CHR2                       _CHRR.Bits.CHR2
#define CHRR_CHR3                       _CHRR.Bits.CHR3
#define CHRR_CHR4                       _CHRR.Bits.CHR4
#define CHRR_CHR5                       _CHRR.Bits.CHR5
#define CHRR_CHR6                       _CHRR.Bits.CHR6
#define CHRR_CHR                        _CHRR.MergedBits.grpCHR

#define CHRR_CHR0_MASK                  1
#define CHRR_CHR1_MASK                  2
#define CHRR_CHR2_MASK                  4
#define CHRR_CHR3_MASK                  8
#define CHRR_CHR4_MASK                  16
#define CHRR_CHR5_MASK                  32
#define CHRR_CHR6_MASK                  64
#define CHRR_CHR_MASK                   127
#define CHRR_CHR_BITNUM                 0


/*** LCDCLK - LCD Clock Register; 0x0000004F ***/
typedef union {
  byte Byte;
  struct {
    byte LCLK0       :1;                                       /* LCD Waweform Base Clock Select 0 */
    byte LCLK1       :1;                                       /* LCD Waweform Base Clock Select 1 */
    byte LCLK2       :1;                                       /* LCD Waweform Base Clock Select 2 */
    byte DUTY0       :1;                                       /* Duty Cycle Select Bit 0 */
    byte DUTY1       :1;                                       /* Duty Cycle Select Bit 1 */
    byte FCCLT0      :1;                                       /* Fast Charde Duty Cycle Select Bit 0 */
    byte FCCLT1      :1;                                       /* Fast Charde Duty Cycle Select Bit 1 */
    byte             :1; 
  } Bits;
  struct {
    byte grpLCLK :3;
    byte grpDUTY :2;
    byte grpFCCLT :2;
    byte         :1;
  } MergedBits;
} LCDCLKSTR;
extern volatile LCDCLKSTR _LCDCLK;
#define LCDCLK                          _LCDCLK.Byte
#define LCDCLK_LCLK0                    _LCDCLK.Bits.LCLK0
#define LCDCLK_LCLK1                    _LCDCLK.Bits.LCLK1
#define LCDCLK_LCLK2                    _LCDCLK.Bits.LCLK2
#define LCDCLK_DUTY0                    _LCDCLK.Bits.DUTY0
#define LCDCLK_DUTY1                    _LCDCLK.Bits.DUTY1
#define LCDCLK_FCCLT0                   _LCDCLK.Bits.FCCLT0
#define LCDCLK_FCCLT1                   _LCDCLK.Bits.FCCLT1
#define LCDCLK_LCLK                     _LCDCLK.MergedBits.grpLCLK
#define LCDCLK_DUTY                     _LCDCLK.MergedBits.grpDUTY
#define LCDCLK_FCCLT                    _LCDCLK.MergedBits.grpFCCLT

#define LCDCLK_LCLK0_MASK               1
#define LCDCLK_LCLK1_MASK               2
#define LCDCLK_LCLK2_MASK               4
#define LCDCLK_DUTY0_MASK               8
#define LCDCLK_DUTY1_MASK               16
#define LCDCLK_FCCLT0_MASK              32
#define LCDCLK_FCCLT1_MASK              64
#define LCDCLK_LCLK_MASK                7
#define LCDCLK_LCLK_BITNUM              0
#define LCDCLK_DUTY_MASK                24
#define LCDCLK_DUTY_BITNUM              3
#define LCDCLK_FCCLT_MASK               96
#define LCDCLK_FCCLT_BITNUM             5


/*** LCDCR - LCD Control Register; 0x00000051 ***/
typedef union {
  byte Byte;
  struct {
    byte LCCON0      :1;                                       /* LCD Contrast Control Bit 0 */
    byte LCCON1      :1;                                       /* LCD Contrast Control Bit 1 */
    byte LCCON2      :1;                                       /* LCD Contrast Control Bit 2 */
    byte LCCON3      :1;                                       /* LCD Contrast Control Bit 3 */
    byte LC          :1;                                       /* Low Current */
    byte FC          :1;                                       /* Fast Charge */
    byte             :1; 
    byte LCDE        :1;                                       /* LCD Enable */
  } Bits;
  struct {
    byte grpLCCON :4;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} LCDCRSTR;
extern volatile LCDCRSTR _LCDCR;
#define LCDCR                           _LCDCR.Byte
#define LCDCR_LCCON0                    _LCDCR.Bits.LCCON0
#define LCDCR_LCCON1                    _LCDCR.Bits.LCCON1
#define LCDCR_LCCON2                    _LCDCR.Bits.LCCON2
#define LCDCR_LCCON3                    _LCDCR.Bits.LCCON3
#define LCDCR_LC                        _LCDCR.Bits.LC
#define LCDCR_FC                        _LCDCR.Bits.FC
#define LCDCR_LCDE                      _LCDCR.Bits.LCDE
#define LCDCR_LCCON                     _LCDCR.MergedBits.grpLCCON

#define LCDCR_LCCON0_MASK               1
#define LCDCR_LCCON1_MASK               2
#define LCDCR_LCCON2_MASK               4
#define LCDCR_LCCON3_MASK               8
#define LCDCR_LC_MASK                   16
#define LCDCR_FC_MASK                   32
#define LCDCR_LCDE_MASK                 128
#define LCDCR_LCCON_MASK                15
#define LCDCR_LCCON_BITNUM              0


/*** LDAT1 - LCD Data Register 1; 0x00000052 ***/
typedef union {
  byte Byte;
  struct {
    byte F0B0        :1;                                       /* LCD Segment 0 Data Bit 0 */
    byte F0B1        :1;                                       /* LCD Segment 0 Data Bit 1 */
    byte F0B2        :1;                                       /* LCD Segment 0 Data Bit 2 */
    byte F0B3        :1;                                       /* LCD Segment 0 Data Bit 3 */
    byte F1B0        :1;                                       /* LCD Segment 1 Data Bit 0 */
    byte F1B1        :1;                                       /* LCD Segment 1 Data Bit 1 */
    byte F1B2        :1;                                       /* LCD Segment 1 Data Bit 2 */
    byte F1B3        :1;                                       /* LCD Segment 1 Data Bit 3 */
  } Bits;
  struct {
    byte grpF0B  :4;
    byte grpF1B  :4;
  } MergedBits;
} LDAT1STR;
extern volatile LDAT1STR _LDAT1;
#define LDAT1                           _LDAT1.Byte
#define LDAT1_F0B0                      _LDAT1.Bits.F0B0
#define LDAT1_F0B1                      _LDAT1.Bits.F0B1
#define LDAT1_F0B2                      _LDAT1.Bits.F0B2
#define LDAT1_F0B3                      _LDAT1.Bits.F0B3
#define LDAT1_F1B0                      _LDAT1.Bits.F1B0
#define LDAT1_F1B1                      _LDAT1.Bits.F1B1
#define LDAT1_F1B2                      _LDAT1.Bits.F1B2
#define LDAT1_F1B3                      _LDAT1.Bits.F1B3
#define LDAT1_F0B                       _LDAT1.MergedBits.grpF0B
#define LDAT1_F1B                       _LDAT1.MergedBits.grpF1B

#define LDAT1_F0B0_MASK                 1
#define LDAT1_F0B1_MASK                 2
#define LDAT1_F0B2_MASK                 4
#define LDAT1_F0B3_MASK                 8
#define LDAT1_F1B0_MASK                 16
#define LDAT1_F1B1_MASK                 32
#define LDAT1_F1B2_MASK                 64
#define LDAT1_F1B3_MASK                 128
#define LDAT1_F0B_MASK                  15
#define LDAT1_F0B_BITNUM                0
#define LDAT1_F1B_MASK                  240
#define LDAT1_F1B_BITNUM                4


/*** LDAT2 - LCD Data Register 2; 0x00000053 ***/
typedef union {
  byte Byte;
  struct {
    byte F2B0        :1;                                       /* LCD Segment 2 Data Bit 0 */
    byte F2B1        :1;                                       /* LCD Segment 2 Data Bit 1 */
    byte F2B2        :1;                                       /* LCD Segment 2 Data Bit 2 */
    byte F2B3        :1;                                       /* LCD Segment 2 Data Bit 3 */
    byte F3B0        :1;                                       /* LCD Segment 3 Data Bit 0 */
    byte F3B1        :1;                                       /* LCD Segment 3 Data Bit 1 */
    byte F3B2        :1;                                       /* LCD Segment 3 Data Bit 2 */
    byte F3B3        :1;                                       /* LCD Segment 3 Data Bit 3 */
  } Bits;
  struct {
    byte grpF2B  :4;
    byte grpF3B  :4;
  } MergedBits;
} LDAT2STR;
extern volatile LDAT2STR _LDAT2;
#define LDAT2                           _LDAT2.Byte
#define LDAT2_F2B0                      _LDAT2.Bits.F2B0
#define LDAT2_F2B1                      _LDAT2.Bits.F2B1
#define LDAT2_F2B2                      _LDAT2.Bits.F2B2
#define LDAT2_F2B3                      _LDAT2.Bits.F2B3
#define LDAT2_F3B0                      _LDAT2.Bits.F3B0
#define LDAT2_F3B1                      _LDAT2.Bits.F3B1
#define LDAT2_F3B2                      _LDAT2.Bits.F3B2
#define LDAT2_F3B3                      _LDAT2.Bits.F3B3
#define LDAT2_F2B                       _LDAT2.MergedBits.grpF2B
#define LDAT2_F3B                       _LDAT2.MergedBits.grpF3B

#define LDAT2_F2B0_MASK                 1
#define LDAT2_F2B1_MASK                 2
#define LDAT2_F2B2_MASK                 4
#define LDAT2_F2B3_MASK                 8
#define LDAT2_F3B0_MASK                 16
#define LDAT2_F3B1_MASK                 32
#define LDAT2_F3B2_MASK                 64
#define LDAT2_F3B3_MASK                 128
#define LDAT2_F2B_MASK                  15
#define LDAT2_F2B_BITNUM                0
#define LDAT2_F3B_MASK                  240
#define LDAT2_F3B_BITNUM                4


/*** LDAT3 - LCD Data Register 3; 0x00000054 ***/
typedef union {
  byte Byte;
  struct {
    byte F4B0        :1;                                       /* LCD Segment 4 Data Bit 0 */
    byte F4B1        :1;                                       /* LCD Segment 4 Data Bit 1 */
    byte F4B2        :1;                                       /* LCD Segment 4 Data Bit 2 */
    byte F4B3        :1;                                       /* LCD Segment 4 Data Bit 3 */
    byte F5B0        :1;                                       /* LCD Segment 5 Data Bit 0 */
    byte F5B1        :1;                                       /* LCD Segment 5 Data Bit 1 */
    byte F5B2        :1;                                       /* LCD Segment 5 Data Bit 2 */
    byte F5B3        :1;                                       /* LCD Segment 5 Data Bit 3 */
  } Bits;
  struct {
    byte grpF4B  :4;
    byte grpF5B  :4;
  } MergedBits;
} LDAT3STR;
extern volatile LDAT3STR _LDAT3;
#define LDAT3                           _LDAT3.Byte
#define LDAT3_F4B0                      _LDAT3.Bits.F4B0
#define LDAT3_F4B1                      _LDAT3.Bits.F4B1
#define LDAT3_F4B2                      _LDAT3.Bits.F4B2
#define LDAT3_F4B3                      _LDAT3.Bits.F4B3
#define LDAT3_F5B0                      _LDAT3.Bits.F5B0
#define LDAT3_F5B1                      _LDAT3.Bits.F5B1
#define LDAT3_F5B2                      _LDAT3.Bits.F5B2
#define LDAT3_F5B3                      _LDAT3.Bits.F5B3
#define LDAT3_F4B                       _LDAT3.MergedBits.grpF4B
#define LDAT3_F5B                       _LDAT3.MergedBits.grpF5B

#define LDAT3_F4B0_MASK                 1
#define LDAT3_F4B1_MASK                 2
#define LDAT3_F4B2_MASK                 4
#define LDAT3_F4B3_MASK                 8
#define LDAT3_F5B0_MASK                 16
#define LDAT3_F5B1_MASK                 32
#define LDAT3_F5B2_MASK                 64
#define LDAT3_F5B3_MASK                 128
#define LDAT3_F4B_MASK                  15
#define LDAT3_F4B_BITNUM                0
#define LDAT3_F5B_MASK                  240
#define LDAT3_F5B_BITNUM                4


/*** LDAT4 - LCD Data Register 4; 0x00000055 ***/
typedef union {
  byte Byte;
  struct {
    byte F6B0        :1;                                       /* LCD Segment 6 Data Bit 0 */
    byte F6B1        :1;                                       /* LCD Segment 6 Data Bit 1 */
    byte F6B2        :1;                                       /* LCD Segment 6 Data Bit 2 */
    byte F6B3        :1;                                       /* LCD Segment 6 Data Bit 3 */
    byte F7B0        :1;                                       /* LCD Segment 7 Data Bit 0 */
    byte F7B1        :1;                                       /* LCD Segment 7 Data Bit 1 */
    byte F7B2        :1;                                       /* LCD Segment 7 Data Bit 2 */
    byte F7B3        :1;                                       /* LCD Segment 7 Data Bit 3 */
  } Bits;
  struct {
    byte grpF6B  :4;
    byte grpF7B  :4;
  } MergedBits;
} LDAT4STR;
extern volatile LDAT4STR _LDAT4;
#define LDAT4                           _LDAT4.Byte
#define LDAT4_F6B0                      _LDAT4.Bits.F6B0
#define LDAT4_F6B1                      _LDAT4.Bits.F6B1
#define LDAT4_F6B2                      _LDAT4.Bits.F6B2
#define LDAT4_F6B3                      _LDAT4.Bits.F6B3
#define LDAT4_F7B0                      _LDAT4.Bits.F7B0
#define LDAT4_F7B1                      _LDAT4.Bits.F7B1
#define LDAT4_F7B2                      _LDAT4.Bits.F7B2
#define LDAT4_F7B3                      _LDAT4.Bits.F7B3
#define LDAT4_F6B                       _LDAT4.MergedBits.grpF6B
#define LDAT4_F7B                       _LDAT4.MergedBits.grpF7B

#define LDAT4_F6B0_MASK                 1
#define LDAT4_F6B1_MASK                 2
#define LDAT4_F6B2_MASK                 4
#define LDAT4_F6B3_MASK                 8
#define LDAT4_F7B0_MASK                 16
#define LDAT4_F7B1_MASK                 32
#define LDAT4_F7B2_MASK                 64
#define LDAT4_F7B3_MASK                 128
#define LDAT4_F6B_MASK                  15
#define LDAT4_F6B_BITNUM                0
#define LDAT4_F7B_MASK                  240
#define LDAT4_F7B_BITNUM                4


/*** LDAT5 - LCD Data Register 5; 0x00000056 ***/
typedef union {
  byte Byte;
  struct {
    byte F8B0        :1;                                       /* LCD Segment 8 Data Bit 0 */
    byte F8B1        :1;                                       /* LCD Segment 8 Data Bit 1 */
    byte F8B2        :1;                                       /* LCD Segment 8 Data Bit 2 */
    byte F8B3        :1;                                       /* LCD Segment 8 Data Bit 3 */
    byte F9B0        :1;                                       /* LCD Segment 9 Data Bit 0 */
    byte F9B1        :1;                                       /* LCD Segment 9 Data Bit 1 */
    byte F9B2        :1;                                       /* LCD Segment 9 Data Bit 2 */
    byte F9B3        :1;                                       /* LCD Segment 9 Data Bit 3 */
  } Bits;
  struct {
    byte grpF8B  :4;
    byte grpF9B  :4;
  } MergedBits;
} LDAT5STR;
extern volatile LDAT5STR _LDAT5;
#define LDAT5                           _LDAT5.Byte
#define LDAT5_F8B0                      _LDAT5.Bits.F8B0
#define LDAT5_F8B1                      _LDAT5.Bits.F8B1
#define LDAT5_F8B2                      _LDAT5.Bits.F8B2
#define LDAT5_F8B3                      _LDAT5.Bits.F8B3
#define LDAT5_F9B0                      _LDAT5.Bits.F9B0
#define LDAT5_F9B1                      _LDAT5.Bits.F9B1
#define LDAT5_F9B2                      _LDAT5.Bits.F9B2
#define LDAT5_F9B3                      _LDAT5.Bits.F9B3
#define LDAT5_F8B                       _LDAT5.MergedBits.grpF8B
#define LDAT5_F9B                       _LDAT5.MergedBits.grpF9B

#define LDAT5_F8B0_MASK                 1
#define LDAT5_F8B1_MASK                 2
#define LDAT5_F8B2_MASK                 4
#define LDAT5_F8B3_MASK                 8
#define LDAT5_F9B0_MASK                 16
#define LDAT5_F9B1_MASK                 32
#define LDAT5_F9B2_MASK                 64
#define LDAT5_F9B3_MASK                 128
#define LDAT5_F8B_MASK                  15
#define LDAT5_F8B_BITNUM                0
#define LDAT5_F9B_MASK                  240
#define LDAT5_F9B_BITNUM                4


/*** LDAT6 - LCD Data Register 6; 0x00000057 ***/
typedef union {
  byte Byte;
  struct {
    byte F10B0       :1;                                       /* LCD Segment 10 Data Bit 0 */
    byte F10B1       :1;                                       /* LCD Segment 10 Data Bit 1 */
    byte F10B2       :1;                                       /* LCD Segment 10 Data Bit 2 */
    byte F10B3       :1;                                       /* LCD Segment 10 Data Bit 3 */
    byte F11B0       :1;                                       /* LCD Segment 11 Data Bit 0 */
    byte F11B1       :1;                                       /* LCD Segment 11 Data Bit 1 */
    byte F11B2       :1;                                       /* LCD Segment 11 Data Bit 2 */
    byte F11B3       :1;                                       /* LCD Segment 11 Data Bit 3 */
  } Bits;
  struct {
    byte grpF10B :4;
    byte grpF11B :4;
  } MergedBits;
} LDAT6STR;
extern volatile LDAT6STR _LDAT6;
#define LDAT6                           _LDAT6.Byte
#define LDAT6_F10B0                     _LDAT6.Bits.F10B0
#define LDAT6_F10B1                     _LDAT6.Bits.F10B1
#define LDAT6_F10B2                     _LDAT6.Bits.F10B2
#define LDAT6_F10B3                     _LDAT6.Bits.F10B3
#define LDAT6_F11B0                     _LDAT6.Bits.F11B0
#define LDAT6_F11B1                     _LDAT6.Bits.F11B1
#define LDAT6_F11B2                     _LDAT6.Bits.F11B2
#define LDAT6_F11B3                     _LDAT6.Bits.F11B3
#define LDAT6_F10B                      _LDAT6.MergedBits.grpF10B
#define LDAT6_F11B                      _LDAT6.MergedBits.grpF11B

#define LDAT6_F10B0_MASK                1
#define LDAT6_F10B1_MASK                2
#define LDAT6_F10B2_MASK                4
#define LDAT6_F10B3_MASK                8
#define LDAT6_F11B0_MASK                16
#define LDAT6_F11B1_MASK                32
#define LDAT6_F11B2_MASK                64
#define LDAT6_F11B3_MASK                128
#define LDAT6_F10B_MASK                 15
#define LDAT6_F10B_BITNUM               0
#define LDAT6_F11B_MASK                 240
#define LDAT6_F11B_BITNUM               4


/*** LDAT7 - LCD Data Register 7; 0x00000058 ***/
typedef union {
  byte Byte;
  struct {
    byte F12B0       :1;                                       /* LCD Segment 12 Data Bit 0 */
    byte F12B1       :1;                                       /* LCD Segment 12 Data Bit 1 */
    byte F12B2       :1;                                       /* LCD Segment 12 Data Bit 2 */
    byte F12B3       :1;                                       /* LCD Segment 12 Data Bit 3 */
    byte F13B0       :1;                                       /* LCD Segment 13 Data Bit 0 */
    byte F13B1       :1;                                       /* LCD Segment 13 Data Bit 1 */
    byte F13B2       :1;                                       /* LCD Segment 13 Data Bit 2 */
    byte F13B3       :1;                                       /* LCD Segment 13 Data Bit 3 */
  } Bits;
  struct {
    byte grpF12B :4;
    byte grpF13B :4;
  } MergedBits;
} LDAT7STR;
extern volatile LDAT7STR _LDAT7;
#define LDAT7                           _LDAT7.Byte
#define LDAT7_F12B0                     _LDAT7.Bits.F12B0
#define LDAT7_F12B1                     _LDAT7.Bits.F12B1
#define LDAT7_F12B2                     _LDAT7.Bits.F12B2
#define LDAT7_F12B3                     _LDAT7.Bits.F12B3
#define LDAT7_F13B0                     _LDAT7.Bits.F13B0
#define LDAT7_F13B1                     _LDAT7.Bits.F13B1
#define LDAT7_F13B2                     _LDAT7.Bits.F13B2
#define LDAT7_F13B3                     _LDAT7.Bits.F13B3
#define LDAT7_F12B                      _LDAT7.MergedBits.grpF12B
#define LDAT7_F13B                      _LDAT7.MergedBits.grpF13B

#define LDAT7_F12B0_MASK                1
#define LDAT7_F12B1_MASK                2
#define LDAT7_F12B2_MASK                4
#define LDAT7_F12B3_MASK                8
#define LDAT7_F13B0_MASK                16
#define LDAT7_F13B1_MASK                32
#define LDAT7_F13B2_MASK                64
#define LDAT7_F13B3_MASK                128
#define LDAT7_F12B_MASK                 15
#define LDAT7_F12B_BITNUM               0
#define LDAT7_F13B_MASK                 240
#define LDAT7_F13B_BITNUM               4


/*** LDAT8 - LCD Data Register 8; 0x00000059 ***/
typedef union {
  byte Byte;
  struct {
    byte F14B0       :1;                                       /* LCD Segment 14 Data Bit 0 */
    byte F14B1       :1;                                       /* LCD Segment 14 Data Bit 1 */
    byte F14B2       :1;                                       /* LCD Segment 14 Data Bit 2 */
    byte F14B3       :1;                                       /* LCD Segment 14 Data Bit 3 */
    byte F15B0       :1;                                       /* LCD Segment 15 Data Bit 0 */
    byte F15B1       :1;                                       /* LCD Segment 15 Data Bit 1 */
    byte F15B2       :1;                                       /* LCD Segment 15 Data Bit 2 */
    byte F15B3       :1;                                       /* LCD Segment 15 Data Bit 3 */
  } Bits;
  struct {
    byte grpF14B :4;
    byte grpF15B :4;
  } MergedBits;
} LDAT8STR;
extern volatile LDAT8STR _LDAT8;
#define LDAT8                           _LDAT8.Byte
#define LDAT8_F14B0                     _LDAT8.Bits.F14B0
#define LDAT8_F14B1                     _LDAT8.Bits.F14B1
#define LDAT8_F14B2                     _LDAT8.Bits.F14B2
#define LDAT8_F14B3                     _LDAT8.Bits.F14B3
#define LDAT8_F15B0                     _LDAT8.Bits.F15B0
#define LDAT8_F15B1                     _LDAT8.Bits.F15B1
#define LDAT8_F15B2                     _LDAT8.Bits.F15B2
#define LDAT8_F15B3                     _LDAT8.Bits.F15B3
#define LDAT8_F14B                      _LDAT8.MergedBits.grpF14B
#define LDAT8_F15B                      _LDAT8.MergedBits.grpF15B

#define LDAT8_F14B0_MASK                1
#define LDAT8_F14B1_MASK                2
#define LDAT8_F14B2_MASK                4
#define LDAT8_F14B3_MASK                8
#define LDAT8_F15B0_MASK                16
#define LDAT8_F15B1_MASK                32
#define LDAT8_F15B2_MASK                64
#define LDAT8_F15B3_MASK                128
#define LDAT8_F14B_MASK                 15
#define LDAT8_F14B_BITNUM               0
#define LDAT8_F15B_MASK                 240
#define LDAT8_F15B_BITNUM               4


/*** LDAT9 - LCD Data Register 9; 0x0000005A ***/
typedef union {
  byte Byte;
  struct {
    byte F16B0       :1;                                       /* LCD Segment 16 Data Bit 0 */
    byte F16B1       :1;                                       /* LCD Segment 16 Data Bit 1 */
    byte F16B2       :1;                                       /* LCD Segment 16 Data Bit 2 */
    byte F16B3       :1;                                       /* LCD Segment 16 Data Bit 3 */
    byte F17B0       :1;                                       /* LCD Segment 17 Data Bit 0 */
    byte F17B1       :1;                                       /* LCD Segment 17 Data Bit 1 */
    byte F17B2       :1;                                       /* LCD Segment 17 Data Bit 2 */
    byte F17B3       :1;                                       /* LCD Segment 17 Data Bit 3 */
  } Bits;
  struct {
    byte grpF16B :4;
    byte grpF17B :4;
  } MergedBits;
} LDAT9STR;
extern volatile LDAT9STR _LDAT9;
#define LDAT9                           _LDAT9.Byte
#define LDAT9_F16B0                     _LDAT9.Bits.F16B0
#define LDAT9_F16B1                     _LDAT9.Bits.F16B1
#define LDAT9_F16B2                     _LDAT9.Bits.F16B2
#define LDAT9_F16B3                     _LDAT9.Bits.F16B3
#define LDAT9_F17B0                     _LDAT9.Bits.F17B0
#define LDAT9_F17B1                     _LDAT9.Bits.F17B1
#define LDAT9_F17B2                     _LDAT9.Bits.F17B2
#define LDAT9_F17B3                     _LDAT9.Bits.F17B3
#define LDAT9_F16B                      _LDAT9.MergedBits.grpF16B
#define LDAT9_F17B                      _LDAT9.MergedBits.grpF17B

#define LDAT9_F16B0_MASK                1
#define LDAT9_F16B1_MASK                2
#define LDAT9_F16B2_MASK                4
#define LDAT9_F16B3_MASK                8
#define LDAT9_F17B0_MASK                16
#define LDAT9_F17B1_MASK                32
#define LDAT9_F17B2_MASK                64
#define LDAT9_F17B3_MASK                128
#define LDAT9_F16B_MASK                 15
#define LDAT9_F16B_BITNUM               0
#define LDAT9_F17B_MASK                 240
#define LDAT9_F17B_BITNUM               4


/*** LDAT10 - LCD Data Register 10; 0x0000005B ***/
typedef union {
  byte Byte;
  struct {
    byte F18B0       :1;                                       /* LCD Segment 18 Data Bit 0 */
    byte F18B1       :1;                                       /* LCD Segment 18 Data Bit 1 */
    byte F18B2       :1;                                       /* LCD Segment 18 Data Bit 2 */
    byte F18B3       :1;                                       /* LCD Segment 18 Data Bit 3 */
    byte F19B0       :1;                                       /* LCD Segment 19 Data Bit 0 */
    byte F19B1       :1;                                       /* LCD Segment 19 Data Bit 1 */
    byte F19B2       :1;                                       /* LCD Segment 19 Data Bit 2 */
    byte F19B3       :1;                                       /* LCD Segment 19 Data Bit 3 */
  } Bits;
  struct {
    byte grpF18B :4;
    byte grpF19B :4;
  } MergedBits;
} LDAT10STR;
extern volatile LDAT10STR _LDAT10;
#define LDAT10                          _LDAT10.Byte
#define LDAT10_F18B0                    _LDAT10.Bits.F18B0
#define LDAT10_F18B1                    _LDAT10.Bits.F18B1
#define LDAT10_F18B2                    _LDAT10.Bits.F18B2
#define LDAT10_F18B3                    _LDAT10.Bits.F18B3
#define LDAT10_F19B0                    _LDAT10.Bits.F19B0
#define LDAT10_F19B1                    _LDAT10.Bits.F19B1
#define LDAT10_F19B2                    _LDAT10.Bits.F19B2
#define LDAT10_F19B3                    _LDAT10.Bits.F19B3
#define LDAT10_F18B                     _LDAT10.MergedBits.grpF18B
#define LDAT10_F19B                     _LDAT10.MergedBits.grpF19B

#define LDAT10_F18B0_MASK               1
#define LDAT10_F18B1_MASK               2
#define LDAT10_F18B2_MASK               4
#define LDAT10_F18B3_MASK               8
#define LDAT10_F19B0_MASK               16
#define LDAT10_F19B1_MASK               32
#define LDAT10_F19B2_MASK               64
#define LDAT10_F19B3_MASK               128
#define LDAT10_F18B_MASK                15
#define LDAT10_F18B_BITNUM              0
#define LDAT10_F19B_MASK                240
#define LDAT10_F19B_BITNUM              4


/*** LDAT11 - LCD Data Register 11; 0x0000005C ***/
typedef union {
  byte Byte;
  struct {
    byte F20B0       :1;                                       /* LCD Segment 20 Data Bit 0 */
    byte F20B1       :1;                                       /* LCD Segment 20 Data Bit 1 */
    byte F20B2       :1;                                       /* LCD Segment 20 Data Bit 2 */
    byte F20B3       :1;                                       /* LCD Segment 20 Data Bit 3 */
    byte F21B0       :1;                                       /* LCD Segment 21 Data Bit 0 */
    byte F21B1       :1;                                       /* LCD Segment 21 Data Bit 1 */
    byte F21B2       :1;                                       /* LCD Segment 21 Data Bit 2 */
    byte F21B3       :1;                                       /* LCD Segment 21 Data Bit 3 */
  } Bits;
  struct {
    byte grpF20B :4;
    byte grpF21B :4;
  } MergedBits;
} LDAT11STR;
extern volatile LDAT11STR _LDAT11;
#define LDAT11                          _LDAT11.Byte
#define LDAT11_F20B0                    _LDAT11.Bits.F20B0
#define LDAT11_F20B1                    _LDAT11.Bits.F20B1
#define LDAT11_F20B2                    _LDAT11.Bits.F20B2
#define LDAT11_F20B3                    _LDAT11.Bits.F20B3
#define LDAT11_F21B0                    _LDAT11.Bits.F21B0
#define LDAT11_F21B1                    _LDAT11.Bits.F21B1
#define LDAT11_F21B2                    _LDAT11.Bits.F21B2
#define LDAT11_F21B3                    _LDAT11.Bits.F21B3
#define LDAT11_F20B                     _LDAT11.MergedBits.grpF20B
#define LDAT11_F21B                     _LDAT11.MergedBits.grpF21B

#define LDAT11_F20B0_MASK               1
#define LDAT11_F20B1_MASK               2
#define LDAT11_F20B2_MASK               4
#define LDAT11_F20B3_MASK               8
#define LDAT11_F21B0_MASK               16
#define LDAT11_F21B1_MASK               32
#define LDAT11_F21B2_MASK               64
#define LDAT11_F21B3_MASK               128
#define LDAT11_F20B_MASK                15
#define LDAT11_F20B_BITNUM              0
#define LDAT11_F21B_MASK                240
#define LDAT11_F21B_BITNUM              4


/*** LDAT12 - LCD Data Register 12; 0x0000005D ***/
typedef union {
  byte Byte;
  struct {
    byte F22B0       :1;                                       /* LCD Segment 22 Data Bit 0 */
    byte F22B1       :1;                                       /* LCD Segment 22 Data Bit 1 */
    byte F22B2       :1;                                       /* LCD Segment 22 Data Bit 2 */
    byte F22B3       :1;                                       /* LCD Segment 22 Data Bit 3 */
    byte F23B0       :1;                                       /* LCD Segment 23 Data Bit 0 */
    byte F23B1       :1;                                       /* LCD Segment 23 Data Bit 1 */
    byte F23B2       :1;                                       /* LCD Segment 23 Data Bit 2 */
    byte F23B3       :1;                                       /* LCD Segment 23 Data Bit 3 */
  } Bits;
  struct {
    byte grpF22B :4;
    byte grpF23B :4;
  } MergedBits;
} LDAT12STR;
extern volatile LDAT12STR _LDAT12;
#define LDAT12                          _LDAT12.Byte
#define LDAT12_F22B0                    _LDAT12.Bits.F22B0
#define LDAT12_F22B1                    _LDAT12.Bits.F22B1
#define LDAT12_F22B2                    _LDAT12.Bits.F22B2
#define LDAT12_F22B3                    _LDAT12.Bits.F22B3
#define LDAT12_F23B0                    _LDAT12.Bits.F23B0
#define LDAT12_F23B1                    _LDAT12.Bits.F23B1
#define LDAT12_F23B2                    _LDAT12.Bits.F23B2
#define LDAT12_F23B3                    _LDAT12.Bits.F23B3
#define LDAT12_F22B                     _LDAT12.MergedBits.grpF22B
#define LDAT12_F23B                     _LDAT12.MergedBits.grpF23B

#define LDAT12_F22B0_MASK               1
#define LDAT12_F22B1_MASK               2
#define LDAT12_F22B2_MASK               4
#define LDAT12_F22B3_MASK               8
#define LDAT12_F23B0_MASK               16
#define LDAT12_F23B1_MASK               32
#define LDAT12_F23B2_MASK               64
#define LDAT12_F23B3_MASK               128
#define LDAT12_F22B_MASK                15
#define LDAT12_F22B_BITNUM              0
#define LDAT12_F23B_MASK                240
#define LDAT12_F23B_BITNUM              4


/*** LDAT13 - LCD Data Register 13; 0x0000005E ***/
typedef union {
  byte Byte;
  struct {
    byte F24B0       :1;                                       /* LCD Segment 24 Data Bit 0 */
    byte F24B1       :1;                                       /* LCD Segment 24 Data Bit 1 */
    byte F24B2       :1;                                       /* LCD Segment 24 Data Bit 2 */
    byte F24B3       :1;                                       /* LCD Segment 24 Data Bit 3 */
    byte F25B0       :1;                                       /* LCD Segment 25 Data Bit 0 */
    byte F25B1       :1;                                       /* LCD Segment 25 Data Bit 1 */
    byte F25B2       :1;                                       /* LCD Segment 25 Data Bit 2 */
    byte F25B3       :1;                                       /* LCD Segment 25 Data Bit 3 */
  } Bits;
  struct {
    byte grpF24B :4;
    byte grpF25B :4;
  } MergedBits;
} LDAT13STR;
extern volatile LDAT13STR _LDAT13;
#define LDAT13                          _LDAT13.Byte
#define LDAT13_F24B0                    _LDAT13.Bits.F24B0
#define LDAT13_F24B1                    _LDAT13.Bits.F24B1
#define LDAT13_F24B2                    _LDAT13.Bits.F24B2
#define LDAT13_F24B3                    _LDAT13.Bits.F24B3
#define LDAT13_F25B0                    _LDAT13.Bits.F25B0
#define LDAT13_F25B1                    _LDAT13.Bits.F25B1
#define LDAT13_F25B2                    _LDAT13.Bits.F25B2
#define LDAT13_F25B3                    _LDAT13.Bits.F25B3
#define LDAT13_F24B                     _LDAT13.MergedBits.grpF24B
#define LDAT13_F25B                     _LDAT13.MergedBits.grpF25B

#define LDAT13_F24B0_MASK               1
#define LDAT13_F24B1_MASK               2
#define LDAT13_F24B2_MASK               4
#define LDAT13_F24B3_MASK               8
#define LDAT13_F25B0_MASK               16
#define LDAT13_F25B1_MASK               32
#define LDAT13_F25B2_MASK               64
#define LDAT13_F25B3_MASK               128
#define LDAT13_F24B_MASK                15
#define LDAT13_F24B_BITNUM              0
#define LDAT13_F25B_MASK                240
#define LDAT13_F25B_BITNUM              4


/*** LDAT14 - LCD Data Register 14; 0x0000005F ***/
typedef union {
  byte Byte;
  struct {
    byte F26B0       :1;                                       /* LCD Segment 26 Data Bit 0 */
    byte F26B1       :1;                                       /* LCD Segment 26 Data Bit 1 */
    byte F26B2       :1;                                       /* LCD Segment 26 Data Bit 2 */
    byte F26B3       :1;                                       /* LCD Segment 26 Data Bit 3 */
    byte F27B0       :1;                                       /* LCD Segment 27 Data Bit 0 */
    byte F27B1       :1;                                       /* LCD Segment 27 Data Bit 1 */
    byte F27B2       :1;                                       /* LCD Segment 27 Data Bit 2 */
    byte F27B3       :1;                                       /* LCD Segment 27 Data Bit 3 */
  } Bits;
  struct {
    byte grpF26B :4;
    byte grpF27B :4;
  } MergedBits;
} LDAT14STR;
extern volatile LDAT14STR _LDAT14;
#define LDAT14                          _LDAT14.Byte
#define LDAT14_F26B0                    _LDAT14.Bits.F26B0
#define LDAT14_F26B1                    _LDAT14.Bits.F26B1
#define LDAT14_F26B2                    _LDAT14.Bits.F26B2
#define LDAT14_F26B3                    _LDAT14.Bits.F26B3
#define LDAT14_F27B0                    _LDAT14.Bits.F27B0
#define LDAT14_F27B1                    _LDAT14.Bits.F27B1
#define LDAT14_F27B2                    _LDAT14.Bits.F27B2
#define LDAT14_F27B3                    _LDAT14.Bits.F27B3
#define LDAT14_F26B                     _LDAT14.MergedBits.grpF26B
#define LDAT14_F27B                     _LDAT14.MergedBits.grpF27B

#define LDAT14_F26B0_MASK               1
#define LDAT14_F26B1_MASK               2
#define LDAT14_F26B2_MASK               4
#define LDAT14_F26B3_MASK               8
#define LDAT14_F27B0_MASK               16
#define LDAT14_F27B1_MASK               32
#define LDAT14_F27B2_MASK               64
#define LDAT14_F27B3_MASK               128
#define LDAT14_F26B_MASK                15
#define LDAT14_F26B_BITNUM              0
#define LDAT14_F27B_MASK                240
#define LDAT14_F27B_BITNUM              4


/*** LDAT15 - LCD Data Register 15; 0x00000060 ***/
typedef union {
  byte Byte;
  struct {
    byte F28B0       :1;                                       /* LCD Segment 28 Data Bit 0 */
    byte F28B1       :1;                                       /* LCD Segment 28 Data Bit 1 */
    byte F28B2       :1;                                       /* LCD Segment 28 Data Bit 2 */
    byte F28B3       :1;                                       /* LCD Segment 28 Data Bit 3 */
    byte F29B0       :1;                                       /* LCD Segment 29 Data Bit 0 */
    byte F29B1       :1;                                       /* LCD Segment 29 Data Bit 1 */
    byte F29B2       :1;                                       /* LCD Segment 29 Data Bit 2 */
    byte F29B3       :1;                                       /* LCD Segment 29 Data Bit 3 */
  } Bits;
  struct {
    byte grpF28B :4;
    byte grpF29B :4;
  } MergedBits;
} LDAT15STR;
extern volatile LDAT15STR _LDAT15;
#define LDAT15                          _LDAT15.Byte
#define LDAT15_F28B0                    _LDAT15.Bits.F28B0
#define LDAT15_F28B1                    _LDAT15.Bits.F28B1
#define LDAT15_F28B2                    _LDAT15.Bits.F28B2
#define LDAT15_F28B3                    _LDAT15.Bits.F28B3
#define LDAT15_F29B0                    _LDAT15.Bits.F29B0
#define LDAT15_F29B1                    _LDAT15.Bits.F29B1
#define LDAT15_F29B2                    _LDAT15.Bits.F29B2
#define LDAT15_F29B3                    _LDAT15.Bits.F29B3
#define LDAT15_F28B                     _LDAT15.MergedBits.grpF28B
#define LDAT15_F29B                     _LDAT15.MergedBits.grpF29B

#define LDAT15_F28B0_MASK               1
#define LDAT15_F28B1_MASK               2
#define LDAT15_F28B2_MASK               4
#define LDAT15_F28B3_MASK               8
#define LDAT15_F29B0_MASK               16
#define LDAT15_F29B1_MASK               32
#define LDAT15_F29B2_MASK               64
#define LDAT15_F29B3_MASK               128
#define LDAT15_F28B_MASK                15
#define LDAT15_F28B_BITNUM              0
#define LDAT15_F29B_MASK                240
#define LDAT15_F29B_BITNUM              4


/*** LDAT16 - LCD Data Register 16; 0x00000061 ***/
typedef union {
  byte Byte;
  struct {
    byte F30B0       :1;                                       /* LCD Segment 30 Data Bit 0 */
    byte F30B1       :1;                                       /* LCD Segment 30 Data Bit 1 */
    byte F30B2       :1;                                       /* LCD Segment 30 Data Bit 2 */
    byte F30B3       :1;                                       /* LCD Segment 30 Data Bit 3 */
    byte F31B0       :1;                                       /* LCD Segment 31 Data Bit 0 */
    byte F31B1       :1;                                       /* LCD Segment 31 Data Bit 1 */
    byte F31B2       :1;                                       /* LCD Segment 31 Data Bit 2 */
    byte F31B3       :1;                                       /* LCD Segment 31 Data Bit 3 */
  } Bits;
  struct {
    byte grpF30B :4;
    byte grpF31B :4;
  } MergedBits;
} LDAT16STR;
extern volatile LDAT16STR _LDAT16;
#define LDAT16                          _LDAT16.Byte
#define LDAT16_F30B0                    _LDAT16.Bits.F30B0
#define LDAT16_F30B1                    _LDAT16.Bits.F30B1
#define LDAT16_F30B2                    _LDAT16.Bits.F30B2
#define LDAT16_F30B3                    _LDAT16.Bits.F30B3
#define LDAT16_F31B0                    _LDAT16.Bits.F31B0
#define LDAT16_F31B1                    _LDAT16.Bits.F31B1
#define LDAT16_F31B2                    _LDAT16.Bits.F31B2
#define LDAT16_F31B3                    _LDAT16.Bits.F31B3
#define LDAT16_F30B                     _LDAT16.MergedBits.grpF30B
#define LDAT16_F31B                     _LDAT16.MergedBits.grpF31B

#define LDAT16_F30B0_MASK               1
#define LDAT16_F30B1_MASK               2
#define LDAT16_F30B2_MASK               4
#define LDAT16_F30B3_MASK               8
#define LDAT16_F31B0_MASK               16
#define LDAT16_F31B1_MASK               32
#define LDAT16_F31B2_MASK               64
#define LDAT16_F31B3_MASK               128
#define LDAT16_F30B_MASK                15
#define LDAT16_F30B_BITNUM              0
#define LDAT16_F31B_MASK                240
#define LDAT16_F31B_BITNUM              4


/*** LDAT17 - LCD Data Register 17; 0x00000062 ***/
typedef union {
  byte Byte;
  struct {
    byte F32B0       :1;                                       /* LCD Segment 32 Data Bit 0 */
    byte F32B1       :1;                                       /* LCD Segment 32 Data Bit 1 */
    byte F32B2       :1;                                       /* LCD Segment 32 Data Bit 2 */
    byte F32B3       :1;                                       /* LCD Segment 32 Data Bit 3 */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
  struct {
    byte grpF32B :4;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} LDAT17STR;
extern volatile LDAT17STR _LDAT17;
#define LDAT17                          _LDAT17.Byte
#define LDAT17_F32B0                    _LDAT17.Bits.F32B0
#define LDAT17_F32B1                    _LDAT17.Bits.F32B1
#define LDAT17_F32B2                    _LDAT17.Bits.F32B2
#define LDAT17_F32B3                    _LDAT17.Bits.F32B3
#define LDAT17_F32B                     _LDAT17.MergedBits.grpF32B

#define LDAT17_F32B0_MASK               1
#define LDAT17_F32B1_MASK               2
#define LDAT17_F32B2_MASK               4
#define LDAT17_F32B3_MASK               8
#define LDAT17_F32B_MASK                15
#define LDAT17_F32B_BITNUM              0


/*** MIMCR - Multi-Master IIC Master Control Register; 0x0000006A ***/
typedef union {
  byte Byte;
  struct {
    byte MMBR0       :1;                                       /* Baud Rate Select Bit 0 */
    byte MMBR1       :1;                                       /* Baud Rate Select Bit 1 */
    byte MMBR2       :1;                                       /* Baud Rate Select Bit 2 */
    byte MMRW        :1;                                       /* Master Read/Write */
    byte MMAST       :1;                                       /* Master Control Bit */
    byte MMBB        :1;                                       /* Bus Busy Flag */
    byte MMNAKIF     :1;                                       /* No Acknowledge Interrupt Flag */
    byte MMALIF      :1;                                       /* Multi-Master Arbitration Lost Interrupt Flag */
  } Bits;
  struct {
    byte grpMMBR :3;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} MIMCRSTR;
extern volatile MIMCRSTR _MIMCR;
#define MIMCR                           _MIMCR.Byte
#define MIMCR_MMBR0                     _MIMCR.Bits.MMBR0
#define MIMCR_MMBR1                     _MIMCR.Bits.MMBR1
#define MIMCR_MMBR2                     _MIMCR.Bits.MMBR2
#define MIMCR_MMRW                      _MIMCR.Bits.MMRW
#define MIMCR_MMAST                     _MIMCR.Bits.MMAST
#define MIMCR_MMBB                      _MIMCR.Bits.MMBB
#define MIMCR_MMNAKIF                   _MIMCR.Bits.MMNAKIF
#define MIMCR_MMALIF                    _MIMCR.Bits.MMALIF
#define MIMCR_MMBR                      _MIMCR.MergedBits.grpMMBR

#define MIMCR_MMBR0_MASK                1
#define MIMCR_MMBR1_MASK                2
#define MIMCR_MMBR2_MASK                4
#define MIMCR_MMRW_MASK                 8
#define MIMCR_MMAST_MASK                16
#define MIMCR_MMBB_MASK                 32
#define MIMCR_MMNAKIF_MASK              64
#define MIMCR_MMALIF_MASK               128
#define MIMCR_MMBR_MASK                 7
#define MIMCR_MMBR_BITNUM               0


/*** MMADR - Multi-Master IIC Address Register; 0x0000006B ***/
typedef union {
  byte Byte;
  struct {
    byte MMEXTAD     :1;                                       /* Multi-Master Expanded Address */
    byte MMAD1       :1;                                       /* Multi-Master Address Bit 1 */
    byte MMAD2       :1;                                       /* Multi-Master Address Bit 2 */
    byte MMAD3       :1;                                       /* Multi-Master Address Bit 3 */
    byte MMAD4       :1;                                       /* Multi-Master Address Bit 4 */
    byte MMAD5       :1;                                       /* Multi-Master Address Bit 5 */
    byte MMAD6       :1;                                       /* Multi-Master Address Bit 6 */
    byte MMAD7       :1;                                       /* Multi-Master Address Bit 7 */
  } Bits;
  struct {
    byte         :1;
    byte grpMMAD_1 :7;
  } MergedBits;
} MMADRSTR;
extern volatile MMADRSTR _MMADR;
#define MMADR                           _MMADR.Byte
#define MMADR_MMEXTAD                   _MMADR.Bits.MMEXTAD
#define MMADR_MMAD1                     _MMADR.Bits.MMAD1
#define MMADR_MMAD2                     _MMADR.Bits.MMAD2
#define MMADR_MMAD3                     _MMADR.Bits.MMAD3
#define MMADR_MMAD4                     _MMADR.Bits.MMAD4
#define MMADR_MMAD5                     _MMADR.Bits.MMAD5
#define MMADR_MMAD6                     _MMADR.Bits.MMAD6
#define MMADR_MMAD7                     _MMADR.Bits.MMAD7
#define MMADR_MMAD_1                    _MMADR.MergedBits.grpMMAD_1
#define MMADR_MMAD                      MMADR_MMAD_1

#define MMADR_MMEXTAD_MASK              1
#define MMADR_MMAD1_MASK                2
#define MMADR_MMAD2_MASK                4
#define MMADR_MMAD3_MASK                8
#define MMADR_MMAD4_MASK                16
#define MMADR_MMAD5_MASK                32
#define MMADR_MMAD6_MASK                64
#define MMADR_MMAD7_MASK                128
#define MMADR_MMAD_1_MASK               254
#define MMADR_MMAD_1_BITNUM             1


/*** MMCR - Multi-Master IIC Control Register; 0x0000006C ***/
typedef union {
  byte Byte;
  struct {
    byte             :1; 
    byte             :1; 
    byte REPSEN      :1;                                       /* Repeated Start Enable */
    byte MMTXAK      :1;                                       /* Transmit Acknowledge Enable */
    byte             :1; 
    byte             :1; 
    byte MMIEN       :1;                                       /* Multi-Master IIC Interrupt Enable */
    byte MMEN        :1;                                       /* Multi-Master IIC Enable */
  } Bits;
} MMCRSTR;
extern volatile MMCRSTR _MMCR;
#define MMCR                            _MMCR.Byte
#define MMCR_REPSEN                     _MMCR.Bits.REPSEN
#define MMCR_MMTXAK                     _MMCR.Bits.MMTXAK
#define MMCR_MMIEN                      _MMCR.Bits.MMIEN
#define MMCR_MMEN                       _MMCR.Bits.MMEN

#define MMCR_REPSEN_MASK                4
#define MMCR_MMTXAK_MASK                8
#define MMCR_MMIEN_MASK                 64
#define MMCR_MMEN_MASK                  128


/*** MMSR - Multi-Master IIC Status Register; 0x0000006D ***/
typedef union {
  byte Byte;
  struct {
    byte MMRXBF      :1;                                       /* Multi-Master Receive Buffer Full */
    byte MMTXBE      :1;                                       /* Multi-Master Transmit Buffer Empty */
    byte             :1; 
    byte MMRXAK      :1;                                       /* Multi-Master Receive Acknowledge */
    byte MMSRW       :1;                                       /* Multi-Master Slave Read/Write */
    byte MMATCH      :1;                                       /* Multi-Master Address Match */
    byte MMTXIF      :1;                                       /* Multi-Master Transmit Interrupt Flag */
    byte MMRXIF      :1;                                       /* Multi-Master IIC Receive Interrupt Flag */
  } Bits;
} MMSRSTR;
extern volatile MMSRSTR _MMSR;
#define MMSR                            _MMSR.Byte
#define MMSR_MMRXBF                     _MMSR.Bits.MMRXBF
#define MMSR_MMTXBE                     _MMSR.Bits.MMTXBE
#define MMSR_MMRXAK                     _MMSR.Bits.MMRXAK
#define MMSR_MMSRW                      _MMSR.Bits.MMSRW
#define MMSR_MMATCH                     _MMSR.Bits.MMATCH
#define MMSR_MMTXIF                     _MMSR.Bits.MMTXIF
#define MMSR_MMRXIF                     _MMSR.Bits.MMRXIF

#define MMSR_MMRXBF_MASK                1
#define MMSR_MMTXBE_MASK                2
#define MMSR_MMRXAK_MASK                8
#define MMSR_MMSRW_MASK                 16
#define MMSR_MMATCH_MASK                32
#define MMSR_MMTXIF_MASK                64
#define MMSR_MMRXIF_MASK                128


/*** MMDTR - Multi-Master IIC Data Transmit Register; 0x0000006E ***/
typedef union {
  byte Byte;
  struct {
    byte MMTD0       :1;                                       /* Data Bit 0 */
    byte MMTD1       :1;                                       /* Data Bit 1 */
    byte MMTD2       :1;                                       /* Data Bit 2 */
    byte MMTD3       :1;                                       /* Data Bit 3 */
    byte MMTD4       :1;                                       /* Data Bit 4 */
    byte MMTD5       :1;                                       /* Data Bit 5 */
    byte MMTD6       :1;                                       /* Data Bit 6 */
    byte MMTD7       :1;                                       /* Data Bit 7 */
  } Bits;
} MMDTRSTR;
extern volatile MMDTRSTR _MMDTR;
#define MMDTR                           _MMDTR.Byte
#define MMDTR_MMTD0                     _MMDTR.Bits.MMTD0
#define MMDTR_MMTD1                     _MMDTR.Bits.MMTD1
#define MMDTR_MMTD2                     _MMDTR.Bits.MMTD2
#define MMDTR_MMTD3                     _MMDTR.Bits.MMTD3
#define MMDTR_MMTD4                     _MMDTR.Bits.MMTD4
#define MMDTR_MMTD5                     _MMDTR.Bits.MMTD5
#define MMDTR_MMTD6                     _MMDTR.Bits.MMTD6
#define MMDTR_MMTD7                     _MMDTR.Bits.MMTD7

#define MMDTR_MMTD0_MASK                1
#define MMDTR_MMTD1_MASK                2
#define MMDTR_MMTD2_MASK                4
#define MMDTR_MMTD3_MASK                8
#define MMDTR_MMTD4_MASK                16
#define MMDTR_MMTD5_MASK                32
#define MMDTR_MMTD6_MASK                64
#define MMDTR_MMTD7_MASK                128


/*** MMDRR - Multi-Master IIC Data Receive Register; 0x0000006F ***/
typedef union {
  byte Byte;
  struct {
    byte MMTD0       :1;                                       /* Data Bit 0 */
    byte MMTD1       :1;                                       /* Data Bit 1 */
    byte MMTD2       :1;                                       /* Data Bit 2 */
    byte MMTD3       :1;                                       /* Data Bit 3 */
    byte MMTD4       :1;                                       /* Data Bit 4 */
    byte MMTD5       :1;                                       /* Data Bit 5 */
    byte MMTD6       :1;                                       /* Data Bit 6 */
    byte MMTD7       :1;                                       /* Data Bit 7 */
  } Bits;
} MMDRRSTR;
extern volatile MMDRRSTR _MMDRR;
#define MMDRR                           _MMDRR.Byte
#define MMDRR_MMTD0                     _MMDRR.Bits.MMTD0
#define MMDRR_MMTD1                     _MMDRR.Bits.MMTD1
#define MMDRR_MMTD2                     _MMDRR.Bits.MMTD2
#define MMDRR_MMTD3                     _MMDRR.Bits.MMTD3
#define MMDRR_MMTD4                     _MMDRR.Bits.MMTD4
#define MMDRR_MMTD5                     _MMDRR.Bits.MMTD5
#define MMDRR_MMTD6                     _MMDRR.Bits.MMTD6
#define MMDRR_MMTD7                     _MMDRR.Bits.MMTD7

#define MMDRR_MMTD0_MASK                1
#define MMDRR_MMTD1_MASK                2
#define MMDRR_MMTD2_MASK                4
#define MMDRR_MMTD3_MASK                8
#define MMDRR_MMTD4_MASK                16
#define MMDRR_MMTD5_MASK                32
#define MMDRR_MMTD6_MASK                64
#define MMDRR_MMTD7_MASK                128


/*** SBSR - SIM Break Status Register; 0x0000FE00 ***/
typedef union {
  byte Byte;
  struct {
    byte             :1; 
    byte SBSW        :1;                                       /* SIM Break Stop/Wait */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
} SBSRSTR;
extern volatile SBSRSTR _SBSR;
#define SBSR                            _SBSR.Byte
#define SBSR_SBSW                       _SBSR.Bits.SBSW

#define SBSR_SBSW_MASK                  2


/*** SRSR - SIM Reset Status Register; 0x0000FE01 ***/
typedef union {
  byte Byte;
  struct {
    byte             :1; 
    byte LVI         :1;                                       /* Low-Voltage Inhibit Reset Bit */
    byte             :1; 
    byte ILAD        :1;                                       /* Illegal Address Reset Bit */
    byte ILOP        :1;                                       /* Illegal Opcode Reset Bit */
    byte COP         :1;                                       /* Computer Operating Properly Reset Bit */
    byte PIN         :1;                                       /* External Reset Bit */
    byte POR         :1;                                       /* Power-On Reset Bit */
  } Bits;
} SRSRSTR;
extern volatile SRSRSTR _SRSR;
#define SRSR                            _SRSR.Byte
#define SRSR_LVI                        _SRSR.Bits.LVI
#define SRSR_ILAD                       _SRSR.Bits.ILAD
#define SRSR_ILOP                       _SRSR.Bits.ILOP
#define SRSR_COP                        _SRSR.Bits.COP
#define SRSR_PIN                        _SRSR.Bits.PIN
#define SRSR_POR                        _SRSR.Bits.POR

#define SRSR_LVI_MASK                   2
#define SRSR_ILAD_MASK                  8
#define SRSR_ILOP_MASK                  16
#define SRSR_COP_MASK                   32
#define SRSR_PIN_MASK                   64
#define SRSR_POR_MASK                   128


/*** SBFCR - SIM Break Flag Control Register; 0x0000FE03 ***/
typedef union {
  byte Byte;
  struct {
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte BCFE        :1;                                       /* Break Clear Flag Enable Bit */
  } Bits;
} SBFCRSTR;
extern volatile SBFCRSTR _SBFCR;
#define SBFCR                           _SBFCR.Byte
#define SBFCR_BCFE                      _SBFCR.Bits.BCFE

#define SBFCR_BCFE_MASK                 128


/*** INT1 - Interrupt Status Register 1; 0x0000FE04 ***/
typedef union {
  byte Byte;
  struct {
    byte             :1; 
    byte             :1; 
    byte IF1         :1;                                       /* Interrupt Flag 1 */
    byte IF2         :1;                                       /* Interrupt Flag 2 */
    byte IF3         :1;                                       /* Interrupt Flag 3 */
    byte IF4         :1;                                       /* Interrupt Flag 4 */
    byte IF5         :1;                                       /* Interrupt Flag 5 */
    byte IF6         :1;                                       /* Interrupt Flag 6 */
  } Bits;
  struct {
    byte         :1;
    byte         :1;
    byte grpIF_1 :6;
  } MergedBits;
} INT1STR;
extern volatile INT1STR _INT1;
#define INT1                            _INT1.Byte
#define INT1_IF1                        _INT1.Bits.IF1
#define INT1_IF2                        _INT1.Bits.IF2
#define INT1_IF3                        _INT1.Bits.IF3
#define INT1_IF4                        _INT1.Bits.IF4
#define INT1_IF5                        _INT1.Bits.IF5
#define INT1_IF6                        _INT1.Bits.IF6
#define INT1_IF_1                       _INT1.MergedBits.grpIF_1
#define INT1_IF                         INT1_IF_1

#define INT1_IF1_MASK                   4
#define INT1_IF2_MASK                   8
#define INT1_IF3_MASK                   16
#define INT1_IF4_MASK                   32
#define INT1_IF5_MASK                   64
#define INT1_IF6_MASK                   128
#define INT1_IF_1_MASK                  252
#define INT1_IF_1_BITNUM                2


/*** INT2 - Interrupt Status Register 2; 0x0000FE05 ***/
typedef union {
  byte Byte;
  struct {
    byte IF7         :1;                                       /* Interrupt Flag 7 */
    byte IF8         :1;                                       /* Interrupt Flag 8 */
    byte IF9         :1;                                       /* Interrupt Flag 9 */
    byte IF10        :1;                                       /* Interrupt Flag 10 */
    byte IF11        :1;                                       /* Interrupt Flag 11 */
    byte IF12        :1;                                       /* Interrupt Flag 12 */
    byte IF13        :1;                                       /* Interrupt Flag 13 */
    byte IF14        :1;                                       /* Interrupt Flag 14 */
  } Bits;
} INT2STR;
extern volatile INT2STR _INT2;
#define INT2                            _INT2.Byte
#define INT2_IF7                        _INT2.Bits.IF7
#define INT2_IF8                        _INT2.Bits.IF8
#define INT2_IF9                        _INT2.Bits.IF9
#define INT2_IF10                       _INT2.Bits.IF10
#define INT2_IF11                       _INT2.Bits.IF11
#define INT2_IF12                       _INT2.Bits.IF12
#define INT2_IF13                       _INT2.Bits.IF13
#define INT2_IF14                       _INT2.Bits.IF14

#define INT2_IF7_MASK                   1
#define INT2_IF8_MASK                   2
#define INT2_IF9_MASK                   4
#define INT2_IF10_MASK                  8
#define INT2_IF11_MASK                  16
#define INT2_IF12_MASK                  32
#define INT2_IF13_MASK                  64
#define INT2_IF14_MASK                  128


/*** INT3 - Interrupt Status Register 3; 0x0000FE06 ***/
typedef union {
  byte Byte;
  struct {
    byte IF15        :1;                                       /* Interrupt Flag 15 */
    byte IF16        :1;                                       /* Interrupt Flag 16 */
    byte IF17        :1;                                       /* Interrupt Flag 17 */
    byte IF18        :1;                                       /* Interrupt Flag 18 */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
  struct {
    byte grpIF_15 :4;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} INT3STR;
extern volatile INT3STR _INT3;
#define INT3                            _INT3.Byte
#define INT3_IF15                       _INT3.Bits.IF15
#define INT3_IF16                       _INT3.Bits.IF16
#define INT3_IF17                       _INT3.Bits.IF17
#define INT3_IF18                       _INT3.Bits.IF18
#define INT3_IF_15                      _INT3.MergedBits.grpIF_15
#define INT3_IF                         INT3_IF_15

#define INT3_IF15_MASK                  1
#define INT3_IF16_MASK                  2
#define INT3_IF17_MASK                  4
#define INT3_IF18_MASK                  8
#define INT3_IF_15_MASK                 15
#define INT3_IF_15_BITNUM               0


/*** FLCR - FLASH Control Register; 0x0000FE08 ***/
typedef union {
  byte Byte;
  struct {
    byte PGM         :1;                                       /* Program Control Bit */
    byte ERASE       :1;                                       /* Erase Control Bit */
    byte MARGIN      :1;                                       /* Margin Read Control Bit */
    byte HVEN        :1;                                       /* High-Voltage Enable Bit */
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
  } Bits;
} FLCRSTR;
extern volatile FLCRSTR _FLCR;
#define FLCR                            _FLCR.Byte
#define FLCR_PGM                        _FLCR.Bits.PGM
#define FLCR_ERASE                      _FLCR.Bits.ERASE
#define FLCR_MARGIN                     _FLCR.Bits.MARGIN
#define FLCR_HVEN                       _FLCR.Bits.HVEN

#define FLCR_PGM_MASK                   1
#define FLCR_ERASE_MASK                 2
#define FLCR_MARGIN_MASK                4
#define FLCR_HVEN_MASK                  8


/*** BRK - Break Address Register; 0x0000FE0C ***/
typedef union {
  word Word;
   /* Overlapped registers: */
  struct {
    /*** BRKH - Break Address High Register; 0x0000FE0C ***/
    union {
      byte Byte;
      struct {
        byte MUL8        :1;                                       /* Break Address Register Bit 8 */
        byte MUL9        :1;                                       /* Break Address Register Bit 9 */
        byte MUL10       :1;                                       /* Break Address Register Bit 10 */
        byte MUL11       :1;                                       /* Break Address Register Bit 11 */
        byte MUL12       :1;                                       /* Break Address Register Bit 12 */
        byte MUL13       :1;                                       /* Break Address Register Bit 13 */
        byte MUL14       :1;                                       /* Break Address Register Bit 14 */
        byte MUL15       :1;                                       /* Break Address Register Bit 15 */
      } Bits;
    } BRKHSTR;
    #define BRKH                        _BRK.Overlap_STR.BRKHSTR.Byte
    #define BRKH_MUL8                   _BRK.Overlap_STR.BRKHSTR.Bits.MUL8
    #define BRKH_MUL9                   _BRK.Overlap_STR.BRKHSTR.Bits.MUL9
    #define BRKH_MUL10                  _BRK.Overlap_STR.BRKHSTR.Bits.MUL10
    #define BRKH_MUL11                  _BRK.Overlap_STR.BRKHSTR.Bits.MUL11
    #define BRKH_MUL12                  _BRK.Overlap_STR.BRKHSTR.Bits.MUL12
    #define BRKH_MUL13                  _BRK.Overlap_STR.BRKHSTR.Bits.MUL13
    #define BRKH_MUL14                  _BRK.Overlap_STR.BRKHSTR.Bits.MUL14
    #define BRKH_MUL15                  _BRK.Overlap_STR.BRKHSTR.Bits.MUL15
    
    #define BRKH_MUL8_MASK              1
    #define BRKH_MUL9_MASK              2
    #define BRKH_MUL10_MASK             4
    #define BRKH_MUL11_MASK             8
    #define BRKH_MUL12_MASK             16
    #define BRKH_MUL13_MASK             32
    #define BRKH_MUL14_MASK             64
    #define BRKH_MUL15_MASK             128
    

    /*** BRKL - Break Address Low Register; 0x0000FE0D ***/
    union {
      byte Byte;
      struct {
        byte MUL0        :1;                                       /* Break Address Register Bit 0 */
        byte MUL1        :1;                                       /* Break Address Register Bit 1 */
        byte MUL2        :1;                                       /* Break Address Register Bit 2 */
        byte MUL3        :1;                                       /* Break Address Register Bit 3 */
        byte MUL4        :1;                                       /* Break Address Register Bit 4 */
        byte MUL5        :1;                                       /* Break Address Register Bit 5 */
        byte MUL6        :1;                                       /* Break Address Register Bit 6 */
        byte MUL7        :1;                                       /* Break Address Register Bit 7 */
      } Bits;
    } BRKLSTR;
    #define BRKL                        _BRK.Overlap_STR.BRKLSTR.Byte
    #define BRKL_MUL0                   _BRK.Overlap_STR.BRKLSTR.Bits.MUL0
    #define BRKL_MUL1                   _BRK.Overlap_STR.BRKLSTR.Bits.MUL1
    #define BRKL_MUL2                   _BRK.Overlap_STR.BRKLSTR.Bits.MUL2
    #define BRKL_MUL3                   _BRK.Overlap_STR.BRKLSTR.Bits.MUL3
    #define BRKL_MUL4                   _BRK.Overlap_STR.BRKLSTR.Bits.MUL4
    #define BRKL_MUL5                   _BRK.Overlap_STR.BRKLSTR.Bits.MUL5
    #define BRKL_MUL6                   _BRK.Overlap_STR.BRKLSTR.Bits.MUL6
    #define BRKL_MUL7                   _BRK.Overlap_STR.BRKLSTR.Bits.MUL7
    
    #define BRKL_MUL0_MASK              1
    #define BRKL_MUL1_MASK              2
    #define BRKL_MUL2_MASK              4
    #define BRKL_MUL3_MASK              8
    #define BRKL_MUL4_MASK              16
    #define BRKL_MUL5_MASK              32
    #define BRKL_MUL6_MASK              64
    #define BRKL_MUL7_MASK              128
    
  } Overlap_STR;

} BRKSTR;
extern volatile BRKSTR _BRK;
#define BRK                             _BRK.Word


/*** BRKSCR - Break Status and Control Register; 0x0000FE0E ***/
typedef union {
  byte Byte;
  struct {
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte BRKA        :1;                                       /* Break Active Bit */
    byte BRKE        :1;                                       /* Break Enable Bit */
  } Bits;
} BRKSCRSTR;
extern volatile BRKSCRSTR _BRKSCR;
#define BRKSCR                          _BRKSCR.Byte
#define BRKSCR_BRKA                     _BRKSCR.Bits.BRKA
#define BRKSCR_BRKE                     _BRKSCR.Bits.BRKE

#define BRKSCR_BRKA_MASK                64
#define BRKSCR_BRKE_MASK                128


/*** LVISR - LVI Status Register; 0x0000FE0F ***/
typedef union {
  byte Byte;
  struct {
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte             :1; 
    byte LVIIAK      :1;                                       /* LVI Interrupt Acknowledge */
    byte LVIIF       :1;                                       /* LVI Interrupt Flag */
    byte LVIIE       :1;                                       /* LVI Interrupt Enable Bit */
    byte LVIOUT      :1;                                       /* LVI Output Bit */
  } Bits;
} LVISRSTR;
extern volatile LVISRSTR _LVISR;
#define LVISR                           _LVISR.Byte
#define LVISR_LVIIAK                    _LVISR.Bits.LVIIAK
#define LVISR_LVIIF                     _LVISR.Bits.LVIIF
#define LVISR_LVIIE                     _LVISR.Bits.LVIIE
#define LVISR_LVIOUT                    _LVISR.Bits.LVIOUT

#define LVISR_LVIIAK_MASK               16
#define LVISR_LVIIF_MASK                32
#define LVISR_LVIIE_MASK                64
#define LVISR_LVIOUT_MASK               128


/*** FLBPR - FLASH Block Protect Register; 0x0000FFCF ***/
typedef union {
  byte Byte;
  struct {
    byte BPR0        :1;                                       /* Block Protect Register Bit 0 */
    byte BPR1        :1;                                       /* Block Protect Register Bit 1 */
    byte BPR2        :1;                                       /* Block Protect Register Bit 2 */
    byte BPR3        :1;                                       /* Block Protect Register Bit 3 */
    byte BPR4        :1;                                       /* Block Protect Register Bit 4 */
    byte BPR5        :1;                                       /* Block Protect Register Bit 5 */
    byte BPR6        :1;                                       /* Block Protect Register Bit 6 */
    byte BPR7        :1;                                       /* Block Protect Register Bit 7 */
  } Bits;
} FLBPRSTR;
/* Tip for register initialization in the user code:  const byte FLBPR_INIT @0x0000FFCF = <FLBPR_INITVAL>; */
#define _FLBPR (*(const FLBPRSTR * __far)0x0000FFCF)
#define FLBPR                           _FLBPR.Byte
#define FLBPR_BPR0                      _FLBPR.Bits.BPR0
#define FLBPR_BPR1                      _FLBPR.Bits.BPR1
#define FLBPR_BPR2                      _FLBPR.Bits.BPR2
#define FLBPR_BPR3                      _FLBPR.Bits.BPR3
#define FLBPR_BPR4                      _FLBPR.Bits.BPR4
#define FLBPR_BPR5                      _FLBPR.Bits.BPR5
#define FLBPR_BPR6                      _FLBPR.Bits.BPR6
#define FLBPR_BPR7                      _FLBPR.Bits.BPR7

#define FLBPR_BPR0_MASK                 1
#define FLBPR_BPR1_MASK                 2
#define FLBPR_BPR2_MASK                 4
#define FLBPR_BPR3_MASK                 8
#define FLBPR_BPR4_MASK                 16
#define FLBPR_BPR5_MASK                 32
#define FLBPR_BPR6_MASK                 64
#define FLBPR_BPR7_MASK                 128


/*** COPCTL - COP Control Register; 0x0000FFFF ***/
typedef union {
  byte Byte;
  struct {
    byte BIT0        :1;                                       /* Bit 0 */
    byte BIT1        :1;                                       /* Bit 1 */
    byte BIT2        :1;                                       /* Bit 2 */
    byte BIT3        :1;                                       /* Bit 3 */
    byte BIT4        :1;                                       /* Bit 4 */
    byte BIT5        :1;                                       /* Bit 5 */
    byte BIT6        :1;                                       /* Bit 6 */
    byte BIT7        :1;                                       /* Bit 7 */
  } Bits;
} COPCTLSTR;
extern volatile COPCTLSTR _COPCTL;
#define COPCTL                          _COPCTL.Byte
#define COPCTL_BIT0                     _COPCTL.Bits.BIT0
#define COPCTL_BIT1                     _COPCTL.Bits.BIT1
#define COPCTL_BIT2                     _COPCTL.Bits.BIT2
#define COPCTL_BIT3                     _COPCTL.Bits.BIT3
#define COPCTL_BIT4                     _COPCTL.Bits.BIT4
#define COPCTL_BIT5                     _COPCTL.Bits.BIT5
#define COPCTL_BIT6                     _COPCTL.Bits.BIT6
#define COPCTL_BIT7                     _COPCTL.Bits.BIT7

#define COPCTL_BIT0_MASK                1
#define COPCTL_BIT1_MASK                2
#define COPCTL_BIT2_MASK                4
#define COPCTL_BIT3_MASK                8
#define COPCTL_BIT4_MASK                16
#define COPCTL_BIT5_MASK                32
#define COPCTL_BIT6_MASK                64
#define COPCTL_BIT7_MASK                128



/***********************************************/
/**   D E P R E C I A T E D   S Y M B O L S   **/
/***********************************************/
/* ---------------------------------------------------------------------------------------------------
Exceptions in bit names of timer status and control registers
due to backward compatibility with previous releases  */
#define T1SC0_CHxMAX _T1SC0.Bits.CH0MAX
#define T1SC0_TOVx _T1SC0.Bits.TOV0
#define T1SC0_ELSxA _T1SC0.Bits.ELS0A
#define T1SC0_ELSxB _T1SC0.Bits.ELS0B
#define T1SC0_MSxA _T1SC0.Bits.MS0A
#define T1SC0_MSxB _T1SC0.Bits.MS0B
#define T1SC0_CHxIE _T1SC0.Bits.CH0IE
#define T1SC0_CHxF _T1SC0.Bits.CH0F

#define T1SC1_CHxMAX _T1SC1.Bits.CH1MAX
#define T1SC1_TOVx _T1SC1.Bits.TOV1
#define T1SC1_ELSxA _T1SC1.Bits.ELS1A
#define T1SC1_ELSxB _T1SC1.Bits.ELS1B
#define T1SC1_MSxA _T1SC1.Bits.MS1A
#define T1SC1_CHxIE _T1SC1.Bits.CH1IE
#define T1SC1_CHxF _T1SC1.Bits.CH1F

#define T2SC0_CHxMAX _T2SC0.Bits.CH0MAX
#define T2SC0_TOVx _T2SC0.Bits.TOV0
#define T2SC0_ELSxA _T2SC0.Bits.ELS0A
#define T2SC0_ELSxB _T2SC0.Bits.ELS0B
#define T2SC0_MSxA _T2SC0.Bits.MS0A
#define T2SC0_MSxB _T2SC0.Bits.MS0B
#define T2SC0_CHxIE _T2SC0.Bits.CH0IE
#define T2SC0_CHxF _T2SC0.Bits.CH0F

#define T2SC1_CHxMAX _T2SC1.Bits.CH1MAX
#define T2SC1_TOVx _T2SC1.Bits.TOV1
#define T2SC1_ELSxA _T2SC1.Bits.ELS1A
#define T2SC1_ELSxB _T2SC1.Bits.ELS1B
#define T2SC1_MSxA _T2SC1.Bits.MS1A
#define T2SC1_CHxIE _T2SC1.Bits.CH1IE
#define T2SC1_CHxF _T2SC1.Bits.CH1F

/* --------------------------------------------------------------------------- */
/* The following symbols were removed, because they were invalid or irrelevant */
/* --------------------------------------------------------------------------- */
/*
 * Follows changes from the database 2.87.066 version */
#define ADSCR_CH0                        ADSCR_ADCH0
#define ADSCR_CH0_MASK                   ADSCR_ADCH0_MASK
#define ADSCR_CH1                        ADSCR_ADCH1
#define ADSCR_CH1_MASK                   ADSCR_ADCH1_MASK
#define ADSCR_CH2                        ADSCR_ADCH2
#define ADSCR_CH2_MASK                   ADSCR_ADCH2_MASK
#define ADSCR_CH3                        ADSCR_ADCH3
#define ADSCR_CH3_MASK                   ADSCR_ADCH3_MASK
#define ADSCR_CH4                        ADSCR_ADCH4
#define ADSCR_CH4_MASK                   ADSCR_ADCH4_MASK
#define ADSCR_CH                         ADSCR_ADCH
#define ADSCR_CH_BITNUM                  ADSCR_ADCH_BITNUM
#define ADSCR_CH_MASK                    ADSCR_ADCH_MASK


/* **** 11.9.2009 12:42:41 */

#define T1CH_ARR                         This_symb_has_been_depreciated
#define T2CH_ARR                         This_symb_has_been_depreciated
#endif
